1*8116c33cSisaki /* $NetBSD: t___sync_nand.c,v 1.1 2019/02/26 10:01:41 isaki Exp $ */
2*8116c33cSisaki
3*8116c33cSisaki /*
4*8116c33cSisaki * Copyright (C) 2019 Tetsuya Isaki. All rights reserved.
5*8116c33cSisaki *
6*8116c33cSisaki * Redistribution and use in source and binary forms, with or without
7*8116c33cSisaki * modification, are permitted provided that the following conditions
8*8116c33cSisaki * are met:
9*8116c33cSisaki * 1. Redistributions of source code must retain the above copyright
10*8116c33cSisaki * notice, this list of conditions and the following disclaimer.
11*8116c33cSisaki * 2. Redistributions in binary form must reproduce the above copyright
12*8116c33cSisaki * notice, this list of conditions and the following disclaimer in the
13*8116c33cSisaki * documentation and/or other materials provided with the distribution.
14*8116c33cSisaki *
15*8116c33cSisaki * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16*8116c33cSisaki * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17*8116c33cSisaki * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18*8116c33cSisaki * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19*8116c33cSisaki * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20*8116c33cSisaki * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21*8116c33cSisaki * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22*8116c33cSisaki * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23*8116c33cSisaki * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24*8116c33cSisaki * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25*8116c33cSisaki * SUCH DAMAGE.
26*8116c33cSisaki */
27*8116c33cSisaki
28*8116c33cSisaki #include <sys/cdefs.h>
29*8116c33cSisaki __RCSID("$NetBSD: t___sync_nand.c,v 1.1 2019/02/26 10:01:41 isaki Exp $");
30*8116c33cSisaki
31*8116c33cSisaki #include <atf-c.h>
32*8116c33cSisaki #include <inttypes.h>
33*8116c33cSisaki #include <machine/types.h> // for __HAVE_ATOMIC64_OPS
34*8116c33cSisaki
35*8116c33cSisaki /*
36*8116c33cSisaki * These tests don't examine the atomicity.
37*8116c33cSisaki */
38*8116c33cSisaki
39*8116c33cSisaki /* XXX
40*8116c33cSisaki * Depending on a combination of arch and compiler, __sync_* is
41*8116c33cSisaki * implemented as compiler's builtin function. In that case, even
42*8116c33cSisaki * if libc exports the function symbol, it is not used. As a result
43*8116c33cSisaki * this tests will examine compiler's builtin functions.
44*8116c33cSisaki * It's better to run only when target is actually in libc.
45*8116c33cSisaki */
46*8116c33cSisaki
47*8116c33cSisaki #define DST (0x1122334455667788UL)
48*8116c33cSisaki #define SRC (0xf0f0f0f0f0f0f0f0UL)
49*8116c33cSisaki #define EXPECT (0xefdfcfbfaf9f8f7fUL)
50*8116c33cSisaki
51*8116c33cSisaki #define atf_sync_prefetch(NAME, TYPE, FMT) \
52*8116c33cSisaki ATF_TC(NAME); \
53*8116c33cSisaki ATF_TC_HEAD(NAME, tc) \
54*8116c33cSisaki { \
55*8116c33cSisaki atf_tc_set_md_var(tc, "descr", #NAME); \
56*8116c33cSisaki } \
57*8116c33cSisaki ATF_TC_BODY(NAME, tc) \
58*8116c33cSisaki { \
59*8116c33cSisaki volatile TYPE val; \
60*8116c33cSisaki TYPE src; \
61*8116c33cSisaki TYPE res; \
62*8116c33cSisaki TYPE expval; \
63*8116c33cSisaki TYPE expres; \
64*8116c33cSisaki val = (TYPE)DST; \
65*8116c33cSisaki src = (TYPE)SRC; \
66*8116c33cSisaki expval = (TYPE)EXPECT; \
67*8116c33cSisaki expres = (TYPE)DST; \
68*8116c33cSisaki res = NAME(&val, src); \
69*8116c33cSisaki ATF_REQUIRE_MSG(val == expval, \
70*8116c33cSisaki "val expects 0x%" FMT " but 0x%" FMT, expval, val); \
71*8116c33cSisaki ATF_REQUIRE_MSG(res == expres, \
72*8116c33cSisaki "res expects 0x%" FMT " but 0x%" FMT, expres, res); \
73*8116c33cSisaki }
74*8116c33cSisaki
75*8116c33cSisaki atf_sync_prefetch(__sync_fetch_and_nand_1, uint8_t, PRIx8);
76*8116c33cSisaki atf_sync_prefetch(__sync_fetch_and_nand_2, uint16_t, PRIx16);
77*8116c33cSisaki atf_sync_prefetch(__sync_fetch_and_nand_4, uint32_t, PRIx32);
78*8116c33cSisaki #if defined(__HAVE_ATOMIC64_OPS)
79*8116c33cSisaki atf_sync_prefetch(__sync_fetch_and_nand_8, uint64_t, PRIx64);
80*8116c33cSisaki #endif
81*8116c33cSisaki
82*8116c33cSisaki #define atf_sync_postfetch(NAME, TYPE, FMT) \
83*8116c33cSisaki ATF_TC(NAME); \
84*8116c33cSisaki ATF_TC_HEAD(NAME, tc) \
85*8116c33cSisaki { \
86*8116c33cSisaki atf_tc_set_md_var(tc, "descr", #NAME); \
87*8116c33cSisaki } \
88*8116c33cSisaki ATF_TC_BODY(NAME, tc) \
89*8116c33cSisaki { \
90*8116c33cSisaki volatile TYPE val; \
91*8116c33cSisaki TYPE src; \
92*8116c33cSisaki TYPE res; \
93*8116c33cSisaki TYPE exp; \
94*8116c33cSisaki val = (TYPE)DST; \
95*8116c33cSisaki src = (TYPE)SRC; \
96*8116c33cSisaki exp = (TYPE)EXPECT; \
97*8116c33cSisaki res = NAME(&val, src); \
98*8116c33cSisaki ATF_REQUIRE_MSG(val == exp, \
99*8116c33cSisaki "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
100*8116c33cSisaki ATF_REQUIRE_MSG(res == exp, \
101*8116c33cSisaki "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
102*8116c33cSisaki }
103*8116c33cSisaki
104*8116c33cSisaki atf_sync_postfetch(__sync_nand_and_fetch_1, uint8_t, PRIx8);
105*8116c33cSisaki atf_sync_postfetch(__sync_nand_and_fetch_2, uint16_t, PRIx16);
106*8116c33cSisaki atf_sync_postfetch(__sync_nand_and_fetch_4, uint32_t, PRIx32);
107*8116c33cSisaki #ifdef __HAVE_ATOMIC64_OPS
108*8116c33cSisaki atf_sync_postfetch(__sync_nand_and_fetch_8, uint64_t, PRIx64);
109*8116c33cSisaki #endif
110*8116c33cSisaki
ATF_TP_ADD_TCS(tp)111*8116c33cSisaki ATF_TP_ADD_TCS(tp)
112*8116c33cSisaki {
113*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_1);
114*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_2);
115*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_4);
116*8116c33cSisaki #ifdef __HAVE_ATOMIC64_OPS
117*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_fetch_and_nand_8);
118*8116c33cSisaki #endif
119*8116c33cSisaki
120*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_1);
121*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_2);
122*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_4);
123*8116c33cSisaki #ifdef __HAVE_ATOMIC64_OPS
124*8116c33cSisaki ATF_TP_ADD_TC(tp, __sync_nand_and_fetch_8);
125*8116c33cSisaki #endif
126*8116c33cSisaki
127*8116c33cSisaki return atf_no_error();
128*8116c33cSisaki }
129