xref: /netbsd-src/sys/modules/ath_hal/ath_hal.ldscript (revision b1c34fd0899bef70cb344eb7e1a51ca879efb291) 
1*b1c34fd0Sjmcneill/*	$NetBSD: ath_hal.ldscript,v 1.1 2011/02/20 03:58:33 jmcneill Exp $	*/
2*b1c34fd0Sjmcneill
3*b1c34fd0SjmcneillSECTIONS
4*b1c34fd0Sjmcneill{
5*b1c34fd0Sjmcneill   /* Pre-loaded modules must have merged BSS and data. */
6*b1c34fd0Sjmcneill   .data 0 :
7*b1c34fd0Sjmcneill   {
8*b1c34fd0Sjmcneill     *(.data)
9*b1c34fd0Sjmcneill     *(.bss)
10*b1c34fd0Sjmcneill     *(.bss.*)
11*b1c34fd0Sjmcneill     *(COMMON)
12*b1c34fd0Sjmcneill   }
13*b1c34fd0Sjmcneill
14*b1c34fd0Sjmcneill   link_set_ah_rfs :
15*b1c34fd0Sjmcneill   {
16*b1c34fd0Sjmcneill     __start_link_set_ah_rfs = .;
17*b1c34fd0Sjmcneill     *(link_set_ah_rfs);
18*b1c34fd0Sjmcneill     __stop_link_set_ah_rfs = .;
19*b1c34fd0Sjmcneill   }
20*b1c34fd0Sjmcneill
21*b1c34fd0Sjmcneill   link_set_ah_chips :
22*b1c34fd0Sjmcneill   {
23*b1c34fd0Sjmcneill     __start_link_set_ah_chips = .;
24*b1c34fd0Sjmcneill     *(link_set_ah_chips);
25*b1c34fd0Sjmcneill     __stop_link_set_ah_chips = .;
26*b1c34fd0Sjmcneill   }
27*b1c34fd0Sjmcneill
28*b1c34fd0Sjmcneill   . = ALIGN(64);	/* COHERENCY_UNIT */
29*b1c34fd0Sjmcneill   .data.cacheline_aligned	: { *(.data.cacheline_aligned) }
30*b1c34fd0Sjmcneill   . = ALIGN(64);	/* COHERENCY_UNIT */
31*b1c34fd0Sjmcneill   .data.read_mostly		: { *(.data.read_mostly) }
32*b1c34fd0Sjmcneill   . = ALIGN(64);	/* COHERENCY_UNIT */
33*b1c34fd0Sjmcneill   /* Pre-loaded modules do not need the following. */
34*b1c34fd0Sjmcneill   /DISCARD/ :
35*b1c34fd0Sjmcneill   {
36*b1c34fd0Sjmcneill     *(.comment)
37*b1c34fd0Sjmcneill   }
38*b1c34fd0Sjmcneill}
39