xref: /netbsd-src/sys/external/bsd/drm2/pci/drm_pci.c (revision c9d323e3a94e1f782abfcf73668dbc92247ab145)
1*c9d323e3Sriastradh /*	$NetBSD: drm_pci.c,v 1.48 2022/10/28 21:58:48 riastradh Exp $	*/
26cb10275Sriastradh 
36cb10275Sriastradh /*-
46cb10275Sriastradh  * Copyright (c) 2013 The NetBSD Foundation, Inc.
56cb10275Sriastradh  * All rights reserved.
66cb10275Sriastradh  *
76cb10275Sriastradh  * This code is derived from software contributed to The NetBSD Foundation
86cb10275Sriastradh  * by Taylor R. Campbell.
96cb10275Sriastradh  *
106cb10275Sriastradh  * Redistribution and use in source and binary forms, with or without
116cb10275Sriastradh  * modification, are permitted provided that the following conditions
126cb10275Sriastradh  * are met:
136cb10275Sriastradh  * 1. Redistributions of source code must retain the above copyright
146cb10275Sriastradh  *    notice, this list of conditions and the following disclaimer.
156cb10275Sriastradh  * 2. Redistributions in binary form must reproduce the above copyright
166cb10275Sriastradh  *    notice, this list of conditions and the following disclaimer in the
176cb10275Sriastradh  *    documentation and/or other materials provided with the distribution.
186cb10275Sriastradh  *
196cb10275Sriastradh  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
206cb10275Sriastradh  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
216cb10275Sriastradh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
226cb10275Sriastradh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
236cb10275Sriastradh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
246cb10275Sriastradh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
256cb10275Sriastradh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
266cb10275Sriastradh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
276cb10275Sriastradh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
286cb10275Sriastradh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
296cb10275Sriastradh  * POSSIBILITY OF SUCH DAMAGE.
306cb10275Sriastradh  */
316cb10275Sriastradh 
326cb10275Sriastradh #include <sys/cdefs.h>
33*c9d323e3Sriastradh __KERNEL_RCSID(0, "$NetBSD: drm_pci.c,v 1.48 2022/10/28 21:58:48 riastradh Exp $");
346cb10275Sriastradh 
356cb10275Sriastradh #include <sys/types.h>
366cb10275Sriastradh #include <sys/errno.h>
376cb10275Sriastradh #include <sys/systm.h>
386cb10275Sriastradh 
396cb10275Sriastradh #include <dev/pci/pcivar.h>
406cb10275Sriastradh 
415fd19f0eSriastradh #include <linux/err.h>
420ef8d66dSriastradh #include <drm/drm_agpsupport.h>
43f21b21b0Sriastradh #include <drm/drm_device.h>
44e620fd87Sriastradh #include <drm/drm_drv.h>
4526e846f0Sriastradh #include <drm/drm_legacy.h>
46f21b21b0Sriastradh #include <drm/drm_pci.h>
476cb10275Sriastradh 
48755701a2Sriastradh #include "../dist/drm/drm_internal.h"
49755701a2Sriastradh 
50f6bba051Snonaka struct drm_bus_irq_cookie {
51f6bba051Snonaka 	pci_intr_handle_t *intr_handles;
52f6bba051Snonaka 	void *ih_cookie;
53f6bba051Snonaka };
54f6bba051Snonaka 
556cb10275Sriastradh static const struct pci_attach_args *
drm_pci_attach_args(struct drm_device * dev)566cb10275Sriastradh drm_pci_attach_args(struct drm_device *dev)
576cb10275Sriastradh {
586cb10275Sriastradh 	return &dev->pdev->pd_pa;
596cb10275Sriastradh }
606cb10275Sriastradh 
616cb10275Sriastradh int
drm_pci_attach(struct drm_device * dev,struct pci_dev * pdev)621cf7f83eSriastradh drm_pci_attach(struct drm_device *dev, struct pci_dev *pdev)
636cb10275Sriastradh {
64daf16ae8Sriastradh 	device_t self = dev->dev;
651cf7f83eSriastradh 	const struct pci_attach_args *pa = &pdev->pd_pa;
666cb10275Sriastradh 	unsigned int unit;
6777b5597aSriastradh 	int ret;
686cb10275Sriastradh 
69d46aeca2Sriastradh 	/* Ensure the drm agp hooks are initialized.  */
70f9948655Sriastradh 	/* XXX errno NetBSD->Linux */
71d46aeca2Sriastradh 	ret = -drm_guarantee_initialized();
72f9948655Sriastradh 	if (ret)
73daf16ae8Sriastradh 		return ret;
7477b5597aSriastradh 
756cb10275Sriastradh 	dev->pdev = pdev;
766cb10275Sriastradh 
776cb10275Sriastradh 	/* XXX Set the power state to D0?  */
786cb10275Sriastradh 
7977b5597aSriastradh 	/* Set up the bus space and bus DMA tags.  */
806cb10275Sriastradh 	dev->bst = pa->pa_memt;
816cb10275Sriastradh 	dev->bus_dmat = (pci_dma64_available(pa)? pa->pa_dmat64 : pa->pa_dmat);
826d235455Sriastradh 	dev->bus_dmat32 = pa->pa_dmat;
836cb10275Sriastradh 	dev->dmat = dev->bus_dmat;
846cb10275Sriastradh 	dev->dmat_subregion_p = false;
856d235455Sriastradh 	dev->dmat_subregion_min = 0;
866d235455Sriastradh 	dev->dmat_subregion_max = __type_max(bus_addr_t);
876cb10275Sriastradh 
8877b5597aSriastradh 	/* Find all the memory maps.  */
8977b5597aSriastradh 	CTASSERT(PCI_NUM_RESOURCES < (SIZE_MAX / sizeof(dev->bus_maps[0])));
9077b5597aSriastradh 	dev->bus_maps = kmem_zalloc(PCI_NUM_RESOURCES *
9177b5597aSriastradh 	    sizeof(dev->bus_maps[0]), KM_SLEEP);
9277b5597aSriastradh 	dev->bus_nmaps = PCI_NUM_RESOURCES;
9377b5597aSriastradh 	for (unit = 0; unit < PCI_NUM_RESOURCES; unit++) {
946cb10275Sriastradh 		struct drm_bus_map *const bm = &dev->bus_maps[unit];
956cb10275Sriastradh 		const int reg = PCI_BAR(unit);
966cb10275Sriastradh 		const pcireg_t type =
976cb10275Sriastradh 		    pci_mapreg_type(pa->pa_pc, pa->pa_tag, reg);
986cb10275Sriastradh 
996cb10275Sriastradh 		/* Reject non-memory mappings.  */
1006cb10275Sriastradh 		if ((type & PCI_MAPREG_TYPE_MEM) != PCI_MAPREG_TYPE_MEM) {
1016cb10275Sriastradh 			aprint_debug_dev(self, "map %u has non-memory type:"
1026cb10275Sriastradh 			    " 0x%"PRIxMAX"\n", unit, (uintmax_t)type);
1036cb10275Sriastradh 			continue;
1046cb10275Sriastradh 		}
1056cb10275Sriastradh 
10671c39f78Sriastradh 		/*
10771c39f78Sriastradh 		 * If it's a 64-bit mapping, don't interpret the second
10871c39f78Sriastradh 		 * half of it as another BAR in the next iteration of
10971c39f78Sriastradh 		 * the loop -- move on to the next unit.
11071c39f78Sriastradh 		 */
11171c39f78Sriastradh 		if (PCI_MAPREG_MEM_TYPE(type) == PCI_MAPREG_MEM_TYPE_64BIT)
11271c39f78Sriastradh 			unit++;
11371c39f78Sriastradh 
114231b70a7Sriastradh 		/* Inquire about it.  We'll map it in drm_legacy_ioremap.  */
1156cb10275Sriastradh 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg, type,
1166cb10275Sriastradh 			&bm->bm_base, &bm->bm_size, &bm->bm_flags) != 0) {
1176cb10275Sriastradh 			aprint_debug_dev(self, "map %u failed\n", unit);
1186cb10275Sriastradh 			continue;
1196cb10275Sriastradh 		}
1206cb10275Sriastradh 
1216cb10275Sriastradh 		/* Assume since it is a memory mapping it can be linear.  */
1226cb10275Sriastradh 		bm->bm_flags |= BUS_SPACE_MAP_LINEAR;
1236cb10275Sriastradh 	}
1246cb10275Sriastradh 
12577b5597aSriastradh 	/* Set up AGP stuff if requested.  */
12677b5597aSriastradh 	if (drm_core_check_feature(dev, DRIVER_USE_AGP)) {
12790436669Sriastradh 		if (pci_find_capability(dev->pdev, PCI_CAP_ID_AGP))
12877b5597aSriastradh 			dev->agp = drm_agp_init(dev);
12977b5597aSriastradh 		if (dev->agp)
13077b5597aSriastradh 			dev->agp->agp_mtrr = arch_phys_wc_add(dev->agp->base,
13177b5597aSriastradh 				dev->agp->agp_info.aki_info.ai_aperture_size);
13277b5597aSriastradh 	}
13377b5597aSriastradh 
13477b5597aSriastradh 	/* Success!  */
13577b5597aSriastradh 	return 0;
1366cb10275Sriastradh }
1376cb10275Sriastradh 
138daf16ae8Sriastradh void
drm_pci_detach(struct drm_device * dev)139daf16ae8Sriastradh drm_pci_detach(struct drm_device *dev)
1406cb10275Sriastradh {
1416cb10275Sriastradh 
14277b5597aSriastradh 	/* Tear down AGP stuff if necessary.  */
14366a110d7Sriastradh 	if (dev->agp) {
14466a110d7Sriastradh 		arch_phys_wc_del(dev->agp->agp_mtrr);
14566a110d7Sriastradh 		drm_agp_fini(dev);
14666a110d7Sriastradh 		KASSERT(dev->agp == NULL);
14766a110d7Sriastradh 	}
14877b5597aSriastradh 
14977b5597aSriastradh 	/* Free the record of available bus space mappings.  */
15077b5597aSriastradh 	dev->bus_nmaps = 0;
15177b5597aSriastradh 	kmem_free(dev->bus_maps, PCI_NUM_RESOURCES * sizeof(dev->bus_maps[0]));
15277b5597aSriastradh 
15377b5597aSriastradh 	/* Tear down bus space and bus DMA tags.  */
154e2c32ec7Sriastradh 	if (dev->dmat_subregion_p) {
1556cb10275Sriastradh 		bus_dmatag_destroy(dev->dmat);
156e2c32ec7Sriastradh 	}
1576cb10275Sriastradh }
1586cb10275Sriastradh 
15937ac6a77Sriastradh int
drm_pci_request_irq(struct drm_device * dev,int flags)16037ac6a77Sriastradh drm_pci_request_irq(struct drm_device *dev, int flags)
1616cb10275Sriastradh {
16237ac6a77Sriastradh 	const char *const name = device_xname(dev->dev);
16337ac6a77Sriastradh 	int (*const handler)(void *) = dev->driver->irq_handler;
1646cb10275Sriastradh 	const struct pci_attach_args *const pa = drm_pci_attach_args(dev);
1656cb10275Sriastradh 	const char *intrstr;
1666d15f6a3Schristos 	char intrbuf[PCI_INTRSTR_LEN];
167f6bba051Snonaka 	struct drm_bus_irq_cookie *irq_cookie;
1686cb10275Sriastradh 
169f6bba051Snonaka 	irq_cookie = kmem_alloc(sizeof(*irq_cookie), KM_SLEEP);
1706cb10275Sriastradh 
171f6bba051Snonaka 	if (dev->pdev->msi_enabled) {
172bb6d42ccSriastradh 		if (dev->pdev->pd_intr_handles == NULL) {
1738b6a780bSnonaka 			if (pci_msi_alloc_exact(pa, &irq_cookie->intr_handles,
1748b6a780bSnonaka 			    1)) {
1758b6a780bSnonaka 				aprint_error_dev(dev->dev,
1768b6a780bSnonaka 				    "couldn't allocate MSI (%s)\n", name);
1778b6a780bSnonaka 				goto error;
1788b6a780bSnonaka 			}
1798b6a780bSnonaka 		} else {
180bb6d42ccSriastradh 			irq_cookie->intr_handles = dev->pdev->pd_intr_handles;
181bb6d42ccSriastradh 			dev->pdev->pd_intr_handles = NULL;
1828b6a780bSnonaka 		}
183f6bba051Snonaka 	} else {
1848b6a780bSnonaka 		if (pci_intx_alloc(pa, &irq_cookie->intr_handles)) {
1858b6a780bSnonaka 			aprint_error_dev(dev->dev,
1868b6a780bSnonaka 			    "couldn't allocate INTx interrupt (%s)\n", name);
1878b6a780bSnonaka 			goto error;
1888b6a780bSnonaka 		}
1896cb10275Sriastradh 	}
1906cb10275Sriastradh 
191*c9d323e3Sriastradh 	pci_intr_setattr(pa->pa_pc, &irq_cookie->intr_handles[0],
192*c9d323e3Sriastradh 	    PCI_INTR_MPSAFE, true);
193f6bba051Snonaka 	intrstr = pci_intr_string(pa->pa_pc, irq_cookie->intr_handles[0],
194f6bba051Snonaka 	    intrbuf, sizeof(intrbuf));
195f6bba051Snonaka 	irq_cookie->ih_cookie = pci_intr_establish_xname(pa->pa_pc,
19637ac6a77Sriastradh 	    irq_cookie->intr_handles[0], IPL_DRM, handler, dev, name);
197f6bba051Snonaka 	if (irq_cookie->ih_cookie == NULL) {
198f6bba051Snonaka 		aprint_error_dev(dev->dev,
199f6bba051Snonaka 		    "couldn't establish interrupt at %s (%s)\n", intrstr, name);
2008b6a780bSnonaka 		pci_intr_release(pa->pa_pc, irq_cookie->intr_handles, 1);
2018b6a780bSnonaka 		goto error;
202f6bba051Snonaka 	}
203f6bba051Snonaka 
204f6bba051Snonaka 	aprint_normal_dev(dev->dev, "interrupting at %s (%s)\n", intrstr, name);
20537ac6a77Sriastradh 	dev->irq_cookie = irq_cookie;
2066cb10275Sriastradh 	return 0;
2078b6a780bSnonaka 
2088b6a780bSnonaka error:
2098b6a780bSnonaka 	kmem_free(irq_cookie, sizeof(*irq_cookie));
2108b6a780bSnonaka 	return -ENOENT;
2116cb10275Sriastradh }
2126cb10275Sriastradh 
21337ac6a77Sriastradh void
drm_pci_free_irq(struct drm_device * dev)21437ac6a77Sriastradh drm_pci_free_irq(struct drm_device *dev)
2156cb10275Sriastradh {
21637ac6a77Sriastradh 	struct drm_bus_irq_cookie *const cookie = dev->irq_cookie;
2176cb10275Sriastradh 	const struct pci_attach_args *pa = drm_pci_attach_args(dev);
2186cb10275Sriastradh 
219f6bba051Snonaka 	pci_intr_disestablish(pa->pa_pc, cookie->ih_cookie);
220f6bba051Snonaka 	pci_intr_release(pa->pa_pc, cookie->intr_handles, 1);
221f6bba051Snonaka 	kmem_free(cookie, sizeof(*cookie));
22237ac6a77Sriastradh 	dev->irq_cookie = NULL;
2236cb10275Sriastradh }
224