xref: /netbsd-src/sys/external/bsd/drm2/linux/linux_pci.c (revision f3cfa6f6ce31685c6c4a758bc430e69eb99f50a4)
1 /*	$NetBSD: linux_pci.c,v 1.6 2018/08/28 03:41:39 riastradh Exp $	*/
2 
3 /*-
4  * Copyright (c) 2013 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Taylor R. Campbell.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: linux_pci.c,v 1.6 2018/08/28 03:41:39 riastradh Exp $");
34 
35 #include <linux/pci.h>
36 
37 #include <drm/drm_agp_netbsd.h>
38 
39 device_t
40 pci_dev_dev(struct pci_dev *pdev)
41 {
42 
43 	return pdev->pd_dev;
44 }
45 
46 /* XXX Nouveau kludge!  */
47 struct drm_device *
48 pci_get_drvdata(struct pci_dev *pdev)
49 {
50 
51 	return pdev->pd_drm_dev;
52 }
53 
54 void
55 linux_pci_dev_init(struct pci_dev *pdev, device_t dev, device_t parent,
56     const struct pci_attach_args *pa, int kludges)
57 {
58 	const uint32_t subsystem_id = pci_conf_read(pa->pa_pc, pa->pa_tag,
59 	    PCI_SUBSYS_ID_REG);
60 	unsigned i;
61 
62 	memset(pdev, 0, sizeof(*pdev)); /* paranoia */
63 
64 	pdev->pd_pa = *pa;
65 	pdev->pd_kludges = kludges;
66 	pdev->pd_rom_vaddr = NULL;
67 	pdev->pd_dev = dev;
68 #if (NACPICA > 0)
69 	pdev->pd_ad = acpi_pcidev_find(0 /*XXX segment*/, pa->pa_bus,
70 	    pa->pa_device, pa->pa_function);
71 #else
72 	pdev->pd_ad = NULL;
73 #endif
74 	pdev->pd_saved_state = NULL;
75 	pdev->pd_intr_handles = NULL;
76 	pdev->bus = kmem_zalloc(sizeof(*pdev->bus), KM_NOSLEEP);
77 	pdev->bus->pb_pc = pa->pa_pc;
78 	pdev->bus->pb_dev = parent;
79 	pdev->bus->number = pa->pa_bus;
80 	pdev->devfn = PCI_DEVFN(pa->pa_device, pa->pa_function);
81 	pdev->vendor = PCI_VENDOR(pa->pa_id);
82 	pdev->device = PCI_PRODUCT(pa->pa_id);
83 	pdev->subsystem_vendor = PCI_SUBSYS_VENDOR(subsystem_id);
84 	pdev->subsystem_device = PCI_SUBSYS_ID(subsystem_id);
85 	pdev->revision = PCI_REVISION(pa->pa_class);
86 	pdev->class = __SHIFTOUT(pa->pa_class, 0xffffff00UL); /* ? */
87 
88 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
89 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
90 		const int reg = PCI_BAR(i);
91 
92 		pdev->pd_resources[i].type = pci_mapreg_type(pa->pa_pc,
93 		    pa->pa_tag, reg);
94 		if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, reg,
95 			pdev->pd_resources[i].type,
96 			&pdev->pd_resources[i].addr,
97 			&pdev->pd_resources[i].size,
98 			&pdev->pd_resources[i].flags)) {
99 			pdev->pd_resources[i].addr = 0;
100 			pdev->pd_resources[i].size = 0;
101 			pdev->pd_resources[i].flags = 0;
102 		}
103 		pdev->pd_resources[i].kva = NULL;
104 		pdev->pd_resources[i].mapped = false;
105 	}
106 }
107 
108 int
109 pci_find_capability(struct pci_dev *pdev, int cap)
110 {
111 
112 	return pci_get_capability(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, cap,
113 	    NULL, NULL);
114 }
115 
116 int
117 pci_read_config_dword(struct pci_dev *pdev, int reg, uint32_t *valuep)
118 {
119 
120 	KASSERT(!ISSET(reg, 3));
121 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg);
122 	return 0;
123 }
124 
125 int
126 pci_read_config_word(struct pci_dev *pdev, int reg, uint16_t *valuep)
127 {
128 
129 	KASSERT(!ISSET(reg, 1));
130 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
131 	    (reg &~ 2)) >> (8 * (reg & 2));
132 	return 0;
133 }
134 
135 int
136 pci_read_config_byte(struct pci_dev *pdev, int reg, uint8_t *valuep)
137 {
138 
139 	*valuep = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
140 	    (reg &~ 3)) >> (8 * (reg & 3));
141 	return 0;
142 }
143 
144 int
145 pci_write_config_dword(struct pci_dev *pdev, int reg, uint32_t value)
146 {
147 
148 	KASSERT(!ISSET(reg, 3));
149 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, value);
150 	return 0;
151 }
152 
153 int
154 pci_bus_read_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
155     uint32_t *valuep)
156 {
157 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
158 	    PCI_FUNC(devfn));
159 
160 	KASSERT(!ISSET(reg, 1));
161 	*valuep = pci_conf_read(bus->pb_pc, tag, reg & ~3) >> (8 * (reg & 3));
162 	return 0;
163 }
164 
165 int
166 pci_bus_read_config_word(struct pci_bus *bus, unsigned devfn, int reg,
167     uint16_t *valuep)
168 {
169 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
170 	    PCI_FUNC(devfn));
171 
172 	KASSERT(!ISSET(reg, 1));
173 	*valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 2) >> (8 * (reg & 2));
174 	return 0;
175 }
176 
177 int
178 pci_bus_read_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
179     uint8_t *valuep)
180 {
181 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
182 	    PCI_FUNC(devfn));
183 
184 	*valuep = pci_conf_read(bus->pb_pc, tag, reg &~ 3) >> (8 * (reg & 3));
185 	return 0;
186 }
187 
188 int
189 pci_bus_write_config_dword(struct pci_bus *bus, unsigned devfn, int reg,
190     uint32_t value)
191 {
192 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
193 	    PCI_FUNC(devfn));
194 
195 	KASSERT(!ISSET(reg, 3));
196 	pci_conf_write(bus->pb_pc, tag, reg, value);
197 	return 0;
198 }
199 
200 static void
201 pci_rmw_config(pci_chipset_tag_t pc, pcitag_t tag, int reg, unsigned int bytes,
202     uint32_t value)
203 {
204 	const uint32_t mask = ~((~0UL) << (8 * bytes));
205 	const int reg32 = (reg &~ 3);
206 	const unsigned int shift = (8 * (reg & 3));
207 	uint32_t value32;
208 
209 	KASSERT(bytes <= 4);
210 	KASSERT(!ISSET(value, ~mask));
211 	value32 = pci_conf_read(pc, tag, reg32);
212 	value32 &=~ (mask << shift);
213 	value32 |= (value << shift);
214 	pci_conf_write(pc, tag, reg32, value32);
215 }
216 
217 int
218 pci_write_config_word(struct pci_dev *pdev, int reg, uint16_t value)
219 {
220 
221 	KASSERT(!ISSET(reg, 1));
222 	pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 2, value);
223 	return 0;
224 }
225 
226 int
227 pci_write_config_byte(struct pci_dev *pdev, int reg, uint8_t value)
228 {
229 
230 	pci_rmw_config(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag, reg, 1, value);
231 	return 0;
232 }
233 
234 int
235 pci_bus_write_config_word(struct pci_bus *bus, unsigned devfn, int reg,
236     uint16_t value)
237 {
238 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
239 	    PCI_FUNC(devfn));
240 
241 	KASSERT(!ISSET(reg, 1));
242 	pci_rmw_config(bus->pb_pc, tag, reg, 2, value);
243 	return 0;
244 }
245 
246 int
247 pci_bus_write_config_byte(struct pci_bus *bus, unsigned devfn, int reg,
248     uint8_t value)
249 {
250 	pcitag_t tag = pci_make_tag(bus->pb_pc, bus->number, PCI_SLOT(devfn),
251 	    PCI_FUNC(devfn));
252 
253 	pci_rmw_config(bus->pb_pc, tag, reg, 1, value);
254 	return 0;
255 }
256 
257 int
258 pci_enable_msi(struct pci_dev *pdev)
259 {
260 #ifdef notyet
261 	const struct pci_attach_args *const pa = &pdev->pd_pa;
262 
263 	if (pci_msi_alloc_exact(pa, &pdev->pd_intr_handles, 1))
264 		return -EINVAL;
265 
266 	pdev->msi_enabled = 1;
267 	return 0;
268 #else
269 	return -ENOSYS;
270 #endif
271 }
272 
273 void
274 pci_disable_msi(struct pci_dev *pdev __unused)
275 {
276 	const struct pci_attach_args *const pa = &pdev->pd_pa;
277 
278 	if (pdev->pd_intr_handles != NULL) {
279 		pci_intr_release(pa->pa_pc, pdev->pd_intr_handles, 1);
280 		pdev->pd_intr_handles = NULL;
281 	}
282 	pdev->msi_enabled = 0;
283 }
284 
285 void
286 pci_set_master(struct pci_dev *pdev)
287 {
288 	pcireg_t csr;
289 
290 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
291 	    PCI_COMMAND_STATUS_REG);
292 	csr |= PCI_COMMAND_MASTER_ENABLE;
293 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
294 	    PCI_COMMAND_STATUS_REG, csr);
295 }
296 
297 void
298 pci_clear_master(struct pci_dev *pdev)
299 {
300 	pcireg_t csr;
301 
302 	csr = pci_conf_read(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
303 	    PCI_COMMAND_STATUS_REG);
304 	csr &= ~(pcireg_t)PCI_COMMAND_MASTER_ENABLE;
305 	pci_conf_write(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
306 	    PCI_COMMAND_STATUS_REG, csr);
307 }
308 
309 bus_addr_t
310 pcibios_align_resource(void *p, const struct resource *resource,
311     bus_addr_t addr, bus_size_t size)
312 {
313 	panic("pcibios_align_resource has accessed unaligned neurons!");
314 }
315 
316 int
317 pci_bus_alloc_resource(struct pci_bus *bus, struct resource *resource,
318     bus_size_t size, bus_size_t align, bus_addr_t start, int type __unused,
319     bus_addr_t (*align_fn)(void *, const struct resource *, bus_addr_t,
320 	bus_size_t) __unused,
321     struct pci_dev *pdev)
322 {
323 	const struct pci_attach_args *const pa = &pdev->pd_pa;
324 	bus_space_tag_t bst;
325 	int error;
326 
327 	switch (resource->flags) {
328 	case IORESOURCE_MEM:
329 		bst = pa->pa_memt;
330 		break;
331 
332 	case IORESOURCE_IO:
333 		bst = pa->pa_iot;
334 		break;
335 
336 	default:
337 		panic("I don't know what kind of resource you want!");
338 	}
339 
340 	resource->r_bst = bst;
341 	error = bus_space_alloc(bst, start, __type_max(bus_addr_t),
342 	    size, align, 0, 0, &resource->start, &resource->r_bsh);
343 	if (error)
344 		return error;
345 
346 	resource->size = size;
347 	return 0;
348 }
349 
350 /*
351  * XXX Mega-kludgerific!  pci_get_bus_and_slot and pci_get_class are
352  * defined only for their single purposes in i915drm, in
353  * i915_get_bridge_dev and intel_detect_pch.  We can't define them more
354  * generally without adapting pci_find_device (and pci_enumerate_bus
355  * internally) to pass a cookie through.
356  */
357 
358 static int
359 pci_kludgey_match_bus0_dev0_func0(const struct pci_attach_args *pa)
360 {
361 
362 	if (pa->pa_bus != 0)
363 		return 0;
364 	if (pa->pa_device != 0)
365 		return 0;
366 	if (pa->pa_function != 0)
367 		return 0;
368 
369 	return 1;
370 }
371 
372 struct pci_dev *
373 pci_get_bus_and_slot(int bus, int slot)
374 {
375 	struct pci_attach_args pa;
376 
377 	KASSERT(bus == 0);
378 	KASSERT(slot == PCI_DEVFN(0, 0));
379 
380 	if (!pci_find_device(&pa, &pci_kludgey_match_bus0_dev0_func0))
381 		return NULL;
382 
383 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
384 	linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
385 
386 	return pdev;
387 }
388 
389 static int
390 pci_kludgey_match_isa_bridge(const struct pci_attach_args *pa)
391 {
392 
393 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE)
394 		return 0;
395 	if (PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA)
396 		return 0;
397 
398 	return 1;
399 }
400 
401 void
402 pci_dev_put(struct pci_dev *pdev)
403 {
404 
405 	if (pdev == NULL)
406 		return;
407 
408 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_GET_MUMBLE));
409 	kmem_free(pdev->bus, sizeof(*pdev->bus));
410 	kmem_free(pdev, sizeof(*pdev));
411 }
412 
413 struct pci_dev *		/* XXX i915 kludge */
414 pci_get_class(uint32_t class_subclass_shifted __unused, struct pci_dev *from)
415 {
416 	struct pci_attach_args pa;
417 
418 	KASSERT(class_subclass_shifted == (PCI_CLASS_BRIDGE_ISA << 8));
419 
420 	if (from != NULL) {
421 		pci_dev_put(from);
422 		return NULL;
423 	}
424 
425 	if (!pci_find_device(&pa, &pci_kludgey_match_isa_bridge))
426 		return NULL;
427 
428 	struct pci_dev *const pdev = kmem_zalloc(sizeof(*pdev), KM_SLEEP);
429 	linux_pci_dev_init(pdev, NULL, NULL, &pa, NBPCI_KLUDGE_GET_MUMBLE);
430 
431 	return pdev;
432 }
433 
434 void
435 pci_unmap_rom(struct pci_dev *pdev, void __pci_rom_iomem *vaddr __unused)
436 {
437 
438 	/* XXX Disable the ROM address decoder.  */
439 	KASSERT(ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
440 	KASSERT(vaddr == pdev->pd_rom_vaddr);
441 	bus_space_unmap(pdev->pd_rom_bst, pdev->pd_rom_bsh, pdev->pd_rom_size);
442 	pdev->pd_kludges &= ~NBPCI_KLUDGE_MAP_ROM;
443 	pdev->pd_rom_vaddr = NULL;
444 }
445 
446 /* XXX Whattakludge!  Should move this in sys/arch/.  */
447 static int
448 pci_map_rom_md(struct pci_dev *pdev)
449 {
450 #if defined(__i386__) || defined(__x86_64__) || defined(__ia64__)
451 	const bus_addr_t rom_base = 0xc0000;
452 	const bus_size_t rom_size = 0x20000;
453 	bus_space_handle_t rom_bsh;
454 	int error;
455 
456 	if (PCI_CLASS(pdev->pd_pa.pa_class) != PCI_CLASS_DISPLAY)
457 		return ENXIO;
458 	if (PCI_SUBCLASS(pdev->pd_pa.pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
459 		return ENXIO;
460 	/* XXX Check whether this is the primary VGA card?  */
461 	error = bus_space_map(pdev->pd_pa.pa_memt, rom_base, rom_size,
462 	    (BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE), &rom_bsh);
463 	if (error)
464 		return ENXIO;
465 
466 	pdev->pd_rom_bst = pdev->pd_pa.pa_memt;
467 	pdev->pd_rom_bsh = rom_bsh;
468 	pdev->pd_rom_size = rom_size;
469 	pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
470 
471 	return 0;
472 #else
473 	return ENXIO;
474 #endif
475 }
476 
477 void __pci_rom_iomem *
478 pci_map_rom(struct pci_dev *pdev, size_t *sizep)
479 {
480 
481 	KASSERT(!ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM));
482 
483 	if (pci_mapreg_map(&pdev->pd_pa, PCI_MAPREG_ROM, PCI_MAPREG_TYPE_ROM,
484 		(BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR),
485 		&pdev->pd_rom_bst, &pdev->pd_rom_bsh, NULL, &pdev->pd_rom_size)
486 	    != 0)
487 		goto fail_mi;
488 	pdev->pd_kludges |= NBPCI_KLUDGE_MAP_ROM;
489 
490 	/* XXX This type is obviously wrong in general...  */
491 	if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
492 		pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
493 		&pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
494 		pci_unmap_rom(pdev, NULL);
495 		goto fail_mi;
496 	}
497 	goto success;
498 
499 fail_mi:
500 	if (pci_map_rom_md(pdev) != 0)
501 		goto fail_md;
502 
503 	/* XXX This type is obviously wrong in general...  */
504 	if (pci_find_rom(&pdev->pd_pa, pdev->pd_rom_bst, pdev->pd_rom_bsh,
505 		pdev->pd_rom_size, PCI_ROM_CODE_TYPE_X86,
506 		&pdev->pd_rom_found_bsh, &pdev->pd_rom_found_size)) {
507 		pci_unmap_rom(pdev, NULL);
508 		goto fail_md;
509 	}
510 
511 success:
512 	KASSERT(pdev->pd_rom_found_size <= SIZE_T_MAX);
513 	*sizep = pdev->pd_rom_found_size;
514 	pdev->pd_rom_vaddr = bus_space_vaddr(pdev->pd_rom_bst,
515 	    pdev->pd_rom_found_bsh);
516 	return pdev->pd_rom_vaddr;
517 
518 fail_md:
519 	return NULL;
520 }
521 
522 void __pci_rom_iomem *
523 pci_platform_rom(struct pci_dev *pdev __unused, size_t *sizep)
524 {
525 
526 	*sizep = 0;
527 	return NULL;
528 }
529 
530 int
531 pci_enable_rom(struct pci_dev *pdev)
532 {
533 	const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
534 	const pcitag_t tag = pdev->pd_pa.pa_tag;
535 	pcireg_t addr;
536 	int s;
537 
538 	/* XXX Don't do anything if the ROM isn't there.  */
539 
540 	s = splhigh();
541 	addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
542 	addr |= PCI_MAPREG_ROM_ENABLE;
543 	pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
544 	splx(s);
545 
546 	return 0;
547 }
548 
549 void
550 pci_disable_rom(struct pci_dev *pdev)
551 {
552 	const pci_chipset_tag_t pc = pdev->pd_pa.pa_pc;
553 	const pcitag_t tag = pdev->pd_pa.pa_tag;
554 	pcireg_t addr;
555 	int s;
556 
557 	s = splhigh();
558 	addr = pci_conf_read(pc, tag, PCI_MAPREG_ROM);
559 	addr &= ~(pcireg_t)PCI_MAPREG_ROM_ENABLE;
560 	pci_conf_write(pc, tag, PCI_MAPREG_ROM, addr);
561 	splx(s);
562 }
563 
564 bus_addr_t
565 pci_resource_start(struct pci_dev *pdev, unsigned i)
566 {
567 
568 	KASSERT(i < PCI_NUM_RESOURCES);
569 	return pdev->pd_resources[i].addr;
570 }
571 
572 bus_size_t
573 pci_resource_len(struct pci_dev *pdev, unsigned i)
574 {
575 
576 	KASSERT(i < PCI_NUM_RESOURCES);
577 	return pdev->pd_resources[i].size;
578 }
579 
580 bus_addr_t
581 pci_resource_end(struct pci_dev *pdev, unsigned i)
582 {
583 
584 	return pci_resource_start(pdev, i) + (pci_resource_len(pdev, i) - 1);
585 }
586 
587 int
588 pci_resource_flags(struct pci_dev *pdev, unsigned i)
589 {
590 
591 	KASSERT(i < PCI_NUM_RESOURCES);
592 	return pdev->pd_resources[i].flags;
593 }
594 
595 void __pci_iomem *
596 pci_iomap(struct pci_dev *pdev, unsigned i, bus_size_t size)
597 {
598 	int error;
599 
600 	KASSERT(i < PCI_NUM_RESOURCES);
601 	KASSERT(pdev->pd_resources[i].kva == NULL);
602 
603 	if (PCI_MAPREG_TYPE(pdev->pd_resources[i].type) != PCI_MAPREG_TYPE_MEM)
604 		return NULL;
605 	if (pdev->pd_resources[i].size < size)
606 		return NULL;
607 	error = bus_space_map(pdev->pd_pa.pa_memt, pdev->pd_resources[i].addr,
608 	    size, BUS_SPACE_MAP_LINEAR | pdev->pd_resources[i].flags,
609 	    &pdev->pd_resources[i].bsh);
610 	if (error)
611 		return NULL;
612 	/* XXX Synchronize with drm_agp_borrow_hook in drm_agpsupport.c.  */
613 	pdev->pd_resources[i].bst = pdev->pd_pa.pa_memt;
614 	pdev->pd_resources[i].kva = bus_space_vaddr(pdev->pd_resources[i].bst,
615 	    pdev->pd_resources[i].bsh);
616 	pdev->pd_resources[i].mapped = true;
617 
618 	return pdev->pd_resources[i].kva;
619 }
620 
621 void
622 pci_iounmap(struct pci_dev *pdev, void __pci_iomem *kva)
623 {
624 	unsigned i;
625 
626 	CTASSERT(__arraycount(pdev->pd_resources) == PCI_NUM_RESOURCES);
627 	for (i = 0; i < PCI_NUM_RESOURCES; i++) {
628 		if (pdev->pd_resources[i].kva == kva)
629 			break;
630 	}
631 	KASSERT(i < PCI_NUM_RESOURCES);
632 
633 	pdev->pd_resources[i].kva = NULL;
634 	bus_space_unmap(pdev->pd_resources[i].bst, pdev->pd_resources[i].bsh,
635 	    pdev->pd_resources[i].size);
636 }
637 
638 void
639 pci_save_state(struct pci_dev *pdev)
640 {
641 
642 	KASSERT(pdev->pd_saved_state == NULL);
643 	pdev->pd_saved_state = kmem_alloc(sizeof(*pdev->pd_saved_state),
644 	    KM_SLEEP);
645 	pci_conf_capture(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
646 	    pdev->pd_saved_state);
647 }
648 
649 void
650 pci_restore_state(struct pci_dev *pdev)
651 {
652 
653 	KASSERT(pdev->pd_saved_state != NULL);
654 	pci_conf_restore(pdev->pd_pa.pa_pc, pdev->pd_pa.pa_tag,
655 	    pdev->pd_saved_state);
656 	kmem_free(pdev->pd_saved_state, sizeof(*pdev->pd_saved_state));
657 	pdev->pd_saved_state = NULL;
658 }
659 
660 bool
661 pci_is_pcie(struct pci_dev *pdev)
662 {
663 
664 	return (pci_find_capability(pdev, PCI_CAP_PCIEXPRESS) != 0);
665 }
666 
667 bool
668 pci_dma_supported(struct pci_dev *pdev, uintmax_t mask)
669 {
670 
671 	/* XXX Cop-out.  */
672 	if (mask > DMA_BIT_MASK(32))
673 		return pci_dma64_available(&pdev->pd_pa);
674 	else
675 		return true;
676 }
677 
678 bool
679 pci_is_root_bus(struct pci_bus *bus)
680 {
681 
682 	/* XXX Cop-out. */
683 	return false;
684 }
685 
686 int
687 pci_domain_nr(struct pci_bus *bus)
688 {
689 
690 	return device_unit(bus->pb_dev);
691 }
692 
693 /*
694  * We explicitly rename pci_enable/disable_device so that you have to
695  * review each use of them, since NetBSD's PCI API does _not_ respect
696  * our local enablecnt here, but there are different parts of NetBSD
697  * that automatically enable/disable like PMF, so you have to decide
698  * for each one whether to call it or not.
699  */
700 
701 int
702 linux_pci_enable_device(struct pci_dev *pdev)
703 {
704 	const struct pci_attach_args *pa = &pdev->pd_pa;
705 	pcireg_t csr;
706 	int s;
707 
708 	if (pdev->pd_enablecnt++)
709 		return 0;
710 
711 	s = splhigh();
712 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
713 	/* If someone else (firmware) already enabled it, credit them.  */
714 	if (csr & (PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE))
715 		pdev->pd_enablecnt++;
716 	csr |= PCI_COMMAND_IO_ENABLE;
717 	csr |= PCI_COMMAND_MEM_ENABLE;
718 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
719 	splx(s);
720 
721 	return 0;
722 }
723 
724 void
725 linux_pci_disable_device(struct pci_dev *pdev)
726 {
727 	const struct pci_attach_args *pa = &pdev->pd_pa;
728 	pcireg_t csr;
729 	int s;
730 
731 	if (--pdev->pd_enablecnt)
732 		return;
733 
734 	s = splhigh();
735 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
736 	csr &= ~PCI_COMMAND_IO_ENABLE;
737 	csr &= ~PCI_COMMAND_MEM_ENABLE;
738 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, csr);
739 	splx(s);
740 }
741 
742 void
743 linux_pci_dev_destroy(struct pci_dev *pdev)
744 {
745 	unsigned i;
746 
747 	if (pdev->bus != NULL) {
748 		kmem_free(pdev->bus, sizeof(*pdev->bus));
749 		pdev->bus = NULL;
750 	}
751 	if (ISSET(pdev->pd_kludges, NBPCI_KLUDGE_MAP_ROM)) {
752 		pci_unmap_rom(pdev, pdev->pd_rom_vaddr);
753 		pdev->pd_rom_vaddr = 0;
754 	}
755 	for (i = 0; i < __arraycount(pdev->pd_resources); i++) {
756 		if (!pdev->pd_resources[i].mapped)
757 			continue;
758 		bus_space_unmap(pdev->pd_resources[i].bst,
759 		    pdev->pd_resources[i].bsh, pdev->pd_resources[i].size);
760 	}
761 
762 	/* There is no way these should be still in use.  */
763 	KASSERT(pdev->pd_saved_state == NULL);
764 	KASSERT(pdev->pd_intr_handles == NULL);
765 }
766