xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/virtio/virtgpu_kms.c (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1*41ec0267Sriastradh /*	$NetBSD: virtgpu_kms.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $	*/
2efa246c0Sriastradh 
3efa246c0Sriastradh /*
4efa246c0Sriastradh  * Copyright (C) 2015 Red Hat, Inc.
5efa246c0Sriastradh  * All Rights Reserved.
6efa246c0Sriastradh  *
7efa246c0Sriastradh  * Permission is hereby granted, free of charge, to any person obtaining
8efa246c0Sriastradh  * a copy of this software and associated documentation files (the
9efa246c0Sriastradh  * "Software"), to deal in the Software without restriction, including
10efa246c0Sriastradh  * without limitation the rights to use, copy, modify, merge, publish,
11efa246c0Sriastradh  * distribute, sublicense, and/or sell copies of the Software, and to
12efa246c0Sriastradh  * permit persons to whom the Software is furnished to do so, subject to
13efa246c0Sriastradh  * the following conditions:
14efa246c0Sriastradh  *
15efa246c0Sriastradh  * The above copyright notice and this permission notice (including the
16efa246c0Sriastradh  * next paragraph) shall be included in all copies or substantial
17efa246c0Sriastradh  * portions of the Software.
18efa246c0Sriastradh  *
19efa246c0Sriastradh  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
20efa246c0Sriastradh  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21efa246c0Sriastradh  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
22efa246c0Sriastradh  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
23efa246c0Sriastradh  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
24efa246c0Sriastradh  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
25efa246c0Sriastradh  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26efa246c0Sriastradh  */
27efa246c0Sriastradh 
28efa246c0Sriastradh #include <sys/cdefs.h>
29*41ec0267Sriastradh __KERNEL_RCSID(0, "$NetBSD: virtgpu_kms.c,v 1.3 2021/12/18 23:45:45 riastradh Exp $");
30efa246c0Sriastradh 
31efa246c0Sriastradh #include <linux/virtio.h>
32efa246c0Sriastradh #include <linux/virtio_config.h>
33*41ec0267Sriastradh 
34*41ec0267Sriastradh #include <drm/drm_file.h>
35*41ec0267Sriastradh 
36efa246c0Sriastradh #include "virtgpu_drv.h"
37efa246c0Sriastradh 
virtio_gpu_config_changed_work_func(struct work_struct * work)38efa246c0Sriastradh static void virtio_gpu_config_changed_work_func(struct work_struct *work)
39efa246c0Sriastradh {
40efa246c0Sriastradh 	struct virtio_gpu_device *vgdev =
41efa246c0Sriastradh 		container_of(work, struct virtio_gpu_device,
42efa246c0Sriastradh 			     config_changed_work);
43efa246c0Sriastradh 	u32 events_read, events_clear = 0;
44efa246c0Sriastradh 
45efa246c0Sriastradh 	/* read the config space */
46efa246c0Sriastradh 	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
47efa246c0Sriastradh 		     events_read, &events_read);
48efa246c0Sriastradh 	if (events_read & VIRTIO_GPU_EVENT_DISPLAY) {
49*41ec0267Sriastradh 		if (vgdev->has_edid)
50*41ec0267Sriastradh 			virtio_gpu_cmd_get_edids(vgdev);
51efa246c0Sriastradh 		virtio_gpu_cmd_get_display_info(vgdev);
52efa246c0Sriastradh 		drm_helper_hpd_irq_event(vgdev->ddev);
53efa246c0Sriastradh 		events_clear |= VIRTIO_GPU_EVENT_DISPLAY;
54efa246c0Sriastradh 	}
55efa246c0Sriastradh 	virtio_cwrite(vgdev->vdev, struct virtio_gpu_config,
56efa246c0Sriastradh 		      events_clear, &events_clear);
57efa246c0Sriastradh }
58efa246c0Sriastradh 
virtio_gpu_context_create(struct virtio_gpu_device * vgdev,uint32_t nlen,const char * name)59*41ec0267Sriastradh static int virtio_gpu_context_create(struct virtio_gpu_device *vgdev,
60*41ec0267Sriastradh 				      uint32_t nlen, const char *name)
61efa246c0Sriastradh {
62*41ec0267Sriastradh 	int handle = ida_alloc(&vgdev->ctx_id_ida, GFP_KERNEL);
63efa246c0Sriastradh 
64*41ec0267Sriastradh 	if (handle < 0)
65*41ec0267Sriastradh 		return handle;
66*41ec0267Sriastradh 	handle += 1;
67*41ec0267Sriastradh 	virtio_gpu_cmd_context_create(vgdev, handle, nlen, name);
68*41ec0267Sriastradh 	return handle;
69efa246c0Sriastradh }
70efa246c0Sriastradh 
virtio_gpu_context_destroy(struct virtio_gpu_device * vgdev,uint32_t ctx_id)71efa246c0Sriastradh static void virtio_gpu_context_destroy(struct virtio_gpu_device *vgdev,
72efa246c0Sriastradh 				      uint32_t ctx_id)
73efa246c0Sriastradh {
74efa246c0Sriastradh 	virtio_gpu_cmd_context_destroy(vgdev, ctx_id);
75*41ec0267Sriastradh 	ida_free(&vgdev->ctx_id_ida, ctx_id - 1);
76efa246c0Sriastradh }
77efa246c0Sriastradh 
virtio_gpu_init_vq(struct virtio_gpu_queue * vgvq,void (* work_func)(struct work_struct * work))78efa246c0Sriastradh static void virtio_gpu_init_vq(struct virtio_gpu_queue *vgvq,
79efa246c0Sriastradh 			       void (*work_func)(struct work_struct *work))
80efa246c0Sriastradh {
81efa246c0Sriastradh 	spin_lock_init(&vgvq->qlock);
82efa246c0Sriastradh 	init_waitqueue_head(&vgvq->ack_queue);
83efa246c0Sriastradh 	INIT_WORK(&vgvq->dequeue_work, work_func);
84efa246c0Sriastradh }
85efa246c0Sriastradh 
virtio_gpu_get_capsets(struct virtio_gpu_device * vgdev,int num_capsets)86efa246c0Sriastradh static void virtio_gpu_get_capsets(struct virtio_gpu_device *vgdev,
87efa246c0Sriastradh 				   int num_capsets)
88efa246c0Sriastradh {
89efa246c0Sriastradh 	int i, ret;
90efa246c0Sriastradh 
91efa246c0Sriastradh 	vgdev->capsets = kcalloc(num_capsets,
92efa246c0Sriastradh 				 sizeof(struct virtio_gpu_drv_capset),
93efa246c0Sriastradh 				 GFP_KERNEL);
94efa246c0Sriastradh 	if (!vgdev->capsets) {
95efa246c0Sriastradh 		DRM_ERROR("failed to allocate cap sets\n");
96efa246c0Sriastradh 		return;
97efa246c0Sriastradh 	}
98efa246c0Sriastradh 	for (i = 0; i < num_capsets; i++) {
99efa246c0Sriastradh 		virtio_gpu_cmd_get_capset_info(vgdev, i);
100efa246c0Sriastradh 		ret = wait_event_timeout(vgdev->resp_wq,
101efa246c0Sriastradh 					 vgdev->capsets[i].id > 0, 5 * HZ);
102efa246c0Sriastradh 		if (ret == 0) {
103efa246c0Sriastradh 			DRM_ERROR("timed out waiting for cap set %d\n", i);
104efa246c0Sriastradh 			kfree(vgdev->capsets);
105efa246c0Sriastradh 			vgdev->capsets = NULL;
106efa246c0Sriastradh 			return;
107efa246c0Sriastradh 		}
108efa246c0Sriastradh 		DRM_INFO("cap set %d: id %d, max-version %d, max-size %d\n",
109efa246c0Sriastradh 			 i, vgdev->capsets[i].id,
110efa246c0Sriastradh 			 vgdev->capsets[i].max_version,
111efa246c0Sriastradh 			 vgdev->capsets[i].max_size);
112efa246c0Sriastradh 	}
113efa246c0Sriastradh 	vgdev->num_capsets = num_capsets;
114efa246c0Sriastradh }
115efa246c0Sriastradh 
virtio_gpu_init(struct drm_device * dev)116*41ec0267Sriastradh int virtio_gpu_init(struct drm_device *dev)
117efa246c0Sriastradh {
118efa246c0Sriastradh 	static vq_callback_t *callbacks[] = {
119efa246c0Sriastradh 		virtio_gpu_ctrl_ack, virtio_gpu_cursor_ack
120efa246c0Sriastradh 	};
121*41ec0267Sriastradh 	static const char * const names[] = { "control", "cursor" };
122efa246c0Sriastradh 
123efa246c0Sriastradh 	struct virtio_gpu_device *vgdev;
124efa246c0Sriastradh 	/* this will expand later */
125efa246c0Sriastradh 	struct virtqueue *vqs[2];
126efa246c0Sriastradh 	u32 num_scanouts, num_capsets;
127efa246c0Sriastradh 	int ret;
128efa246c0Sriastradh 
129*41ec0267Sriastradh 	if (!virtio_has_feature(dev_to_virtio(dev->dev), VIRTIO_F_VERSION_1))
130efa246c0Sriastradh 		return -ENODEV;
131efa246c0Sriastradh 
132efa246c0Sriastradh 	vgdev = kzalloc(sizeof(struct virtio_gpu_device), GFP_KERNEL);
133efa246c0Sriastradh 	if (!vgdev)
134efa246c0Sriastradh 		return -ENOMEM;
135efa246c0Sriastradh 
136efa246c0Sriastradh 	vgdev->ddev = dev;
137efa246c0Sriastradh 	dev->dev_private = vgdev;
138*41ec0267Sriastradh 	vgdev->vdev = dev_to_virtio(dev->dev);
139efa246c0Sriastradh 	vgdev->dev = dev->dev;
140efa246c0Sriastradh 
141efa246c0Sriastradh 	spin_lock_init(&vgdev->display_info_lock);
142*41ec0267Sriastradh 	ida_init(&vgdev->ctx_id_ida);
143*41ec0267Sriastradh 	ida_init(&vgdev->resource_ida);
144efa246c0Sriastradh 	init_waitqueue_head(&vgdev->resp_wq);
145efa246c0Sriastradh 	virtio_gpu_init_vq(&vgdev->ctrlq, virtio_gpu_dequeue_ctrl_func);
146efa246c0Sriastradh 	virtio_gpu_init_vq(&vgdev->cursorq, virtio_gpu_dequeue_cursor_func);
147efa246c0Sriastradh 
148*41ec0267Sriastradh 	vgdev->fence_drv.context = dma_fence_context_alloc(1);
149efa246c0Sriastradh 	spin_lock_init(&vgdev->fence_drv.lock);
150efa246c0Sriastradh 	INIT_LIST_HEAD(&vgdev->fence_drv.fences);
151efa246c0Sriastradh 	INIT_LIST_HEAD(&vgdev->cap_cache);
152efa246c0Sriastradh 	INIT_WORK(&vgdev->config_changed_work,
153efa246c0Sriastradh 		  virtio_gpu_config_changed_work_func);
154efa246c0Sriastradh 
155*41ec0267Sriastradh 	INIT_WORK(&vgdev->obj_free_work,
156*41ec0267Sriastradh 		  virtio_gpu_array_put_free_work);
157*41ec0267Sriastradh 	INIT_LIST_HEAD(&vgdev->obj_free_list);
158*41ec0267Sriastradh 	spin_lock_init(&vgdev->obj_free_lock);
159*41ec0267Sriastradh 
160*41ec0267Sriastradh #ifdef __LITTLE_ENDIAN
161efa246c0Sriastradh 	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_VIRGL))
162efa246c0Sriastradh 		vgdev->has_virgl_3d = true;
163*41ec0267Sriastradh #endif
164*41ec0267Sriastradh 	if (virtio_has_feature(vgdev->vdev, VIRTIO_GPU_F_EDID)) {
165*41ec0267Sriastradh 		vgdev->has_edid = true;
166*41ec0267Sriastradh 	}
167efa246c0Sriastradh 
168*41ec0267Sriastradh 	DRM_INFO("features: %cvirgl %cedid\n",
169*41ec0267Sriastradh 		 vgdev->has_virgl_3d ? '+' : '-',
170*41ec0267Sriastradh 		 vgdev->has_edid     ? '+' : '-');
171*41ec0267Sriastradh 
172*41ec0267Sriastradh 	ret = virtio_find_vqs(vgdev->vdev, 2, vqs, callbacks, names, NULL);
173efa246c0Sriastradh 	if (ret) {
174efa246c0Sriastradh 		DRM_ERROR("failed to find virt queues\n");
175efa246c0Sriastradh 		goto err_vqs;
176efa246c0Sriastradh 	}
177efa246c0Sriastradh 	vgdev->ctrlq.vq = vqs[0];
178efa246c0Sriastradh 	vgdev->cursorq.vq = vqs[1];
179efa246c0Sriastradh 	ret = virtio_gpu_alloc_vbufs(vgdev);
180efa246c0Sriastradh 	if (ret) {
181efa246c0Sriastradh 		DRM_ERROR("failed to alloc vbufs\n");
182efa246c0Sriastradh 		goto err_vbufs;
183efa246c0Sriastradh 	}
184efa246c0Sriastradh 
185efa246c0Sriastradh 	/* get display info */
186efa246c0Sriastradh 	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
187efa246c0Sriastradh 		     num_scanouts, &num_scanouts);
188efa246c0Sriastradh 	vgdev->num_scanouts = min_t(uint32_t, num_scanouts,
189efa246c0Sriastradh 				    VIRTIO_GPU_MAX_SCANOUTS);
190efa246c0Sriastradh 	if (!vgdev->num_scanouts) {
191efa246c0Sriastradh 		DRM_ERROR("num_scanouts is zero\n");
192efa246c0Sriastradh 		ret = -EINVAL;
193efa246c0Sriastradh 		goto err_scanouts;
194efa246c0Sriastradh 	}
195efa246c0Sriastradh 	DRM_INFO("number of scanouts: %d\n", num_scanouts);
196efa246c0Sriastradh 
197efa246c0Sriastradh 	virtio_cread(vgdev->vdev, struct virtio_gpu_config,
198efa246c0Sriastradh 		     num_capsets, &num_capsets);
199efa246c0Sriastradh 	DRM_INFO("number of cap sets: %d\n", num_capsets);
200efa246c0Sriastradh 
201*41ec0267Sriastradh 	virtio_gpu_modeset_init(vgdev);
202efa246c0Sriastradh 
203efa246c0Sriastradh 	virtio_device_ready(vgdev->vdev);
204efa246c0Sriastradh 	vgdev->vqs_ready = true;
205efa246c0Sriastradh 
206efa246c0Sriastradh 	if (num_capsets)
207efa246c0Sriastradh 		virtio_gpu_get_capsets(vgdev, num_capsets);
208*41ec0267Sriastradh 	if (vgdev->has_edid)
209*41ec0267Sriastradh 		virtio_gpu_cmd_get_edids(vgdev);
210efa246c0Sriastradh 	virtio_gpu_cmd_get_display_info(vgdev);
211efa246c0Sriastradh 	wait_event_timeout(vgdev->resp_wq, !vgdev->display_info_pending,
212efa246c0Sriastradh 			   5 * HZ);
213efa246c0Sriastradh 	return 0;
214efa246c0Sriastradh 
215efa246c0Sriastradh err_scanouts:
216efa246c0Sriastradh 	virtio_gpu_free_vbufs(vgdev);
217efa246c0Sriastradh err_vbufs:
218efa246c0Sriastradh 	vgdev->vdev->config->del_vqs(vgdev->vdev);
219efa246c0Sriastradh err_vqs:
220efa246c0Sriastradh 	kfree(vgdev);
221efa246c0Sriastradh 	return ret;
222efa246c0Sriastradh }
223efa246c0Sriastradh 
virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device * vgdev)224efa246c0Sriastradh static void virtio_gpu_cleanup_cap_cache(struct virtio_gpu_device *vgdev)
225efa246c0Sriastradh {
226efa246c0Sriastradh 	struct virtio_gpu_drv_cap_cache *cache_ent, *tmp;
227efa246c0Sriastradh 
228efa246c0Sriastradh 	list_for_each_entry_safe(cache_ent, tmp, &vgdev->cap_cache, head) {
229efa246c0Sriastradh 		kfree(cache_ent->caps_cache);
230efa246c0Sriastradh 		kfree(cache_ent);
231efa246c0Sriastradh 	}
232efa246c0Sriastradh }
233efa246c0Sriastradh 
virtio_gpu_deinit(struct drm_device * dev)234*41ec0267Sriastradh void virtio_gpu_deinit(struct drm_device *dev)
235efa246c0Sriastradh {
236efa246c0Sriastradh 	struct virtio_gpu_device *vgdev = dev->dev_private;
237efa246c0Sriastradh 
238*41ec0267Sriastradh 	flush_work(&vgdev->obj_free_work);
239efa246c0Sriastradh 	vgdev->vqs_ready = false;
240efa246c0Sriastradh 	flush_work(&vgdev->ctrlq.dequeue_work);
241efa246c0Sriastradh 	flush_work(&vgdev->cursorq.dequeue_work);
242efa246c0Sriastradh 	flush_work(&vgdev->config_changed_work);
243*41ec0267Sriastradh 	vgdev->vdev->config->reset(vgdev->vdev);
244efa246c0Sriastradh 	vgdev->vdev->config->del_vqs(vgdev->vdev);
245efa246c0Sriastradh 
246efa246c0Sriastradh 	virtio_gpu_modeset_fini(vgdev);
247efa246c0Sriastradh 	virtio_gpu_free_vbufs(vgdev);
248efa246c0Sriastradh 	virtio_gpu_cleanup_cap_cache(vgdev);
249efa246c0Sriastradh 	kfree(vgdev->capsets);
250efa246c0Sriastradh 	kfree(vgdev);
251efa246c0Sriastradh }
252efa246c0Sriastradh 
virtio_gpu_driver_open(struct drm_device * dev,struct drm_file * file)253efa246c0Sriastradh int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file)
254efa246c0Sriastradh {
255efa246c0Sriastradh 	struct virtio_gpu_device *vgdev = dev->dev_private;
256efa246c0Sriastradh 	struct virtio_gpu_fpriv *vfpriv;
257*41ec0267Sriastradh 	int id;
258*41ec0267Sriastradh 	char dbgname[TASK_COMM_LEN];
259efa246c0Sriastradh 
260efa246c0Sriastradh 	/* can't create contexts without 3d renderer */
261efa246c0Sriastradh 	if (!vgdev->has_virgl_3d)
262efa246c0Sriastradh 		return 0;
263efa246c0Sriastradh 
264efa246c0Sriastradh 	/* allocate a virt GPU context for this opener */
265efa246c0Sriastradh 	vfpriv = kzalloc(sizeof(*vfpriv), GFP_KERNEL);
266efa246c0Sriastradh 	if (!vfpriv)
267efa246c0Sriastradh 		return -ENOMEM;
268efa246c0Sriastradh 
269*41ec0267Sriastradh 	get_task_comm(dbgname, current);
270*41ec0267Sriastradh 	id = virtio_gpu_context_create(vgdev, strlen(dbgname), dbgname);
271*41ec0267Sriastradh 	if (id < 0) {
272*41ec0267Sriastradh 		kfree(vfpriv);
273*41ec0267Sriastradh 		return id;
274*41ec0267Sriastradh 	}
275efa246c0Sriastradh 
276efa246c0Sriastradh 	vfpriv->ctx_id = id;
277efa246c0Sriastradh 	file->driver_priv = vfpriv;
278efa246c0Sriastradh 	return 0;
279efa246c0Sriastradh }
280efa246c0Sriastradh 
virtio_gpu_driver_postclose(struct drm_device * dev,struct drm_file * file)281efa246c0Sriastradh void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file)
282efa246c0Sriastradh {
283efa246c0Sriastradh 	struct virtio_gpu_device *vgdev = dev->dev_private;
284efa246c0Sriastradh 	struct virtio_gpu_fpriv *vfpriv;
285efa246c0Sriastradh 
286efa246c0Sriastradh 	if (!vgdev->has_virgl_3d)
287efa246c0Sriastradh 		return;
288efa246c0Sriastradh 
289efa246c0Sriastradh 	vfpriv = file->driver_priv;
290efa246c0Sriastradh 
291efa246c0Sriastradh 	virtio_gpu_context_destroy(vgdev, vfpriv->ctx_id);
292efa246c0Sriastradh 	kfree(vfpriv);
293efa246c0Sriastradh 	file->driver_priv = NULL;
294efa246c0Sriastradh }
295