1*a53f1117Sriastradh /* $NetBSD: amdgpu_task.h,v 1.2 2022/07/18 23:34:02 riastradh Exp $ */
210f82c92Sriastradh
310f82c92Sriastradh /*-
410f82c92Sriastradh * Copyright (c) 2018 The NetBSD Foundation, Inc.
510f82c92Sriastradh * All rights reserved.
610f82c92Sriastradh *
710f82c92Sriastradh * This code is derived from software contributed to The NetBSD Foundation
810f82c92Sriastradh * by Taylor R. Campbell.
910f82c92Sriastradh *
1010f82c92Sriastradh * Redistribution and use in source and binary forms, with or without
1110f82c92Sriastradh * modification, are permitted provided that the following conditions
1210f82c92Sriastradh * are met:
1310f82c92Sriastradh * 1. Redistributions of source code must retain the above copyright
1410f82c92Sriastradh * notice, this list of conditions and the following disclaimer.
1510f82c92Sriastradh * 2. Redistributions in binary form must reproduce the above copyright
1610f82c92Sriastradh * notice, this list of conditions and the following disclaimer in the
1710f82c92Sriastradh * documentation and/or other materials provided with the distribution.
1810f82c92Sriastradh *
1910f82c92Sriastradh * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2010f82c92Sriastradh * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2110f82c92Sriastradh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2210f82c92Sriastradh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2310f82c92Sriastradh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2410f82c92Sriastradh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2510f82c92Sriastradh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2610f82c92Sriastradh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2710f82c92Sriastradh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2810f82c92Sriastradh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2910f82c92Sriastradh * POSSIBILITY OF SUCH DAMAGE.
3010f82c92Sriastradh */
3110f82c92Sriastradh
3210f82c92Sriastradh #ifndef _AMDGPU_AMDGPU_TASK_H_
3310f82c92Sriastradh #define _AMDGPU_AMDGPU_TASK_H_
3410f82c92Sriastradh
3510f82c92Sriastradh #include <sys/queue.h>
3610f82c92Sriastradh #include <sys/workqueue.h>
3710f82c92Sriastradh
3810f82c92Sriastradh struct amdgpu_task {
3910f82c92Sriastradh union {
4010f82c92Sriastradh SIMPLEQ_ENTRY(amdgpu_task) queue;
4110f82c92Sriastradh struct work work;
4210f82c92Sriastradh } rt_u;
4310f82c92Sriastradh void (*rt_fn)(struct amdgpu_task *);
4410f82c92Sriastradh };
4510f82c92Sriastradh
4610f82c92Sriastradh static inline void
amdgpu_task_init(struct amdgpu_task * task,void (* fn)(struct amdgpu_task *))4710f82c92Sriastradh amdgpu_task_init(struct amdgpu_task *task, void (*fn)(struct amdgpu_task *))
4810f82c92Sriastradh {
4910f82c92Sriastradh
5010f82c92Sriastradh task->rt_fn = fn;
5110f82c92Sriastradh }
5210f82c92Sriastradh
53*a53f1117Sriastradh void amdgpu_task_schedule(device_t, struct amdgpu_task *);
5410f82c92Sriastradh
5510f82c92Sriastradh #endif /* _AMDGPU_AMDGPU_TASK_H_ */
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