1*5ac7ebbdSmartin /* $NetBSD: if_mos.c,v 1.24 2022/10/10 18:30:28 martin Exp $ */
2fe950ae3Smrg /* $OpenBSD: if_mos.c,v 1.40 2019/07/07 06:40:10 kevlo Exp $ */
3fe950ae3Smrg
4fe950ae3Smrg /*
5fe950ae3Smrg * Copyright (c) 2008 Johann Christian Rode <jcrode@gmx.net>
6fe950ae3Smrg *
7fe950ae3Smrg * Permission to use, copy, modify, and distribute this software for any
8fe950ae3Smrg * purpose with or without fee is hereby granted, provided that the above
9fe950ae3Smrg * copyright notice and this permission notice appear in all copies.
10fe950ae3Smrg *
11fe950ae3Smrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12fe950ae3Smrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13fe950ae3Smrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14fe950ae3Smrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15fe950ae3Smrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16fe950ae3Smrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17fe950ae3Smrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18fe950ae3Smrg */
19fe950ae3Smrg
20fe950ae3Smrg /*
21fe950ae3Smrg * Copyright (c) 2005, 2006, 2007 Jonathan Gray <jsg@openbsd.org>
22fe950ae3Smrg *
23fe950ae3Smrg * Permission to use, copy, modify, and distribute this software for any
24fe950ae3Smrg * purpose with or without fee is hereby granted, provided that the above
25fe950ae3Smrg * copyright notice and this permission notice appear in all copies.
26fe950ae3Smrg *
27fe950ae3Smrg * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
28fe950ae3Smrg * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
29fe950ae3Smrg * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
30fe950ae3Smrg * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
31fe950ae3Smrg * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
32fe950ae3Smrg * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
33fe950ae3Smrg * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
34fe950ae3Smrg */
35fe950ae3Smrg
36fe950ae3Smrg /*
37fe950ae3Smrg * Copyright (c) 1997, 1998, 1999, 2000-2003
38fe950ae3Smrg * Bill Paul <wpaul@windriver.com>. All rights reserved.
39fe950ae3Smrg *
40fe950ae3Smrg * Redistribution and use in source and binary forms, with or without
41fe950ae3Smrg * modification, are permitted provided that the following conditions
42fe950ae3Smrg * are met:
43fe950ae3Smrg * 1. Redistributions of source code must retain the above copyright
44fe950ae3Smrg * notice, this list of conditions and the following disclaimer.
45fe950ae3Smrg * 2. Redistributions in binary form must reproduce the above copyright
46fe950ae3Smrg * notice, this list of conditions and the following disclaimer in the
47fe950ae3Smrg * documentation and/or other materials provided with the distribution.
48fe950ae3Smrg * 3. All advertising materials mentioning features or use of this software
49fe950ae3Smrg * must display the following acknowledgement:
50fe950ae3Smrg * This product includes software developed by Bill Paul.
51fe950ae3Smrg * 4. Neither the name of the author nor the names of any co-contributors
52fe950ae3Smrg * may be used to endorse or promote products derived from this software
53fe950ae3Smrg * without specific prior written permission.
54fe950ae3Smrg *
55fe950ae3Smrg * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
56fe950ae3Smrg * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57fe950ae3Smrg * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58fe950ae3Smrg * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
59fe950ae3Smrg * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
60fe950ae3Smrg * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
61fe950ae3Smrg * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
62fe950ae3Smrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
63fe950ae3Smrg * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
64fe950ae3Smrg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
65fe950ae3Smrg * THE POSSIBILITY OF SUCH DAMAGE.
66fe950ae3Smrg */
67fe950ae3Smrg
68fe950ae3Smrg /*
69fe950ae3Smrg * Moschip MCS7730/MCS7830/MCS7832 USB to Ethernet controller
70fe950ae3Smrg * The datasheet is available at the following URL:
71fe950ae3Smrg * http://www.moschip.com/data/products/MCS7830/Data%20Sheet_7830.pdf
72fe950ae3Smrg */
73fe950ae3Smrg
74fe950ae3Smrg #include <sys/cdefs.h>
75*5ac7ebbdSmartin __KERNEL_RCSID(0, "$NetBSD: if_mos.c,v 1.24 2022/10/10 18:30:28 martin Exp $");
76fe950ae3Smrg
77fe950ae3Smrg #include <sys/param.h>
78fe950ae3Smrg
79fe950ae3Smrg #include <dev/usb/usbnet.h>
80fe950ae3Smrg #include <dev/usb/if_mosreg.h>
81fe950ae3Smrg
82fe950ae3Smrg #define MOS_PAUSE_REWRITES 3
83fe950ae3Smrg
84fe950ae3Smrg #define MOS_TIMEOUT 1000
85fe950ae3Smrg
86fe950ae3Smrg #define MOS_RX_LIST_CNT 1
87fe950ae3Smrg #define MOS_TX_LIST_CNT 1
88fe950ae3Smrg
89fe950ae3Smrg /* Maximum size of a fast ethernet frame plus one byte for the status */
90fe950ae3Smrg #define MOS_BUFSZ (ETHER_MAX_LEN+1)
91fe950ae3Smrg
92fe950ae3Smrg /*
93fe950ae3Smrg * USB endpoints.
94fe950ae3Smrg */
95fe950ae3Smrg #define MOS_ENDPT_RX 0
96fe950ae3Smrg #define MOS_ENDPT_TX 1
97fe950ae3Smrg #define MOS_ENDPT_INTR 2
98fe950ae3Smrg #define MOS_ENDPT_MAX 3
99fe950ae3Smrg
100fe950ae3Smrg /*
101fe950ae3Smrg * USB vendor requests.
102fe950ae3Smrg */
103fe950ae3Smrg #define MOS_UR_READREG 0x0e
104fe950ae3Smrg #define MOS_UR_WRITEREG 0x0d
105fe950ae3Smrg
106fe950ae3Smrg #define MOS_CONFIG_NO 1
107fe950ae3Smrg #define MOS_IFACE_IDX 0
108fe950ae3Smrg
109fe950ae3Smrg struct mos_type {
110fe950ae3Smrg struct usb_devno mos_dev;
111fe950ae3Smrg u_int16_t mos_flags;
112fe950ae3Smrg #define MCS7730 0x0001 /* MCS7730 */
113fe950ae3Smrg #define MCS7830 0x0002 /* MCS7830 */
114fe950ae3Smrg #define MCS7832 0x0004 /* MCS7832 */
115fe950ae3Smrg };
116fe950ae3Smrg
117fe950ae3Smrg #define MOS_INC(x, y) (x) = (x + 1) % y
118fe950ae3Smrg
119fe950ae3Smrg #ifdef MOS_DEBUG
120fe950ae3Smrg #define DPRINTF(x) do { if (mosdebug) printf x; } while (0)
121fe950ae3Smrg #define DPRINTFN(n,x) do { if (mosdebug >= (n)) printf x; } while (0)
122fe950ae3Smrg int mosdebug = 0;
123fe950ae3Smrg #else
124fe950ae3Smrg #define DPRINTF(x) __nothing
125fe950ae3Smrg #define DPRINTFN(n,x) __nothing
126fe950ae3Smrg #endif
127fe950ae3Smrg
128fe950ae3Smrg /*
129fe950ae3Smrg * Various supported device vendors/products.
130fe950ae3Smrg */
131f76a6828Smaxv static const struct mos_type mos_devs[] = {
132fe950ae3Smrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7730 }, MCS7730 },
133fe950ae3Smrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7830 }, MCS7830 },
134fe950ae3Smrg { { USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7832 }, MCS7832 },
135fe950ae3Smrg { { USB_VENDOR_SITECOMEU, USB_PRODUCT_SITECOMEU_LN030 }, MCS7830 },
136fe950ae3Smrg };
137fe950ae3Smrg #define mos_lookup(v, p) ((const struct mos_type *)usb_lookup(mos_devs, v, p))
138fe950ae3Smrg
139fe950ae3Smrg static int mos_match(device_t, cfdata_t, void *);
140fe950ae3Smrg static void mos_attach(device_t, device_t, void *);
141fe950ae3Smrg
142fe950ae3Smrg CFATTACH_DECL_NEW(mos, sizeof(struct usbnet),
143fe950ae3Smrg mos_match, mos_attach, usbnet_detach, usbnet_activate);
144fe950ae3Smrg
1457a9a30c5Sthorpej static void mos_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t);
1467a9a30c5Sthorpej static unsigned mos_uno_tx_prepare(struct usbnet *, struct mbuf *,
147fe950ae3Smrg struct usbnet_chain *);
148d9c770e7Sriastradh static void mos_uno_mcast(struct ifnet *);
1497a9a30c5Sthorpej static int mos_uno_init(struct ifnet *);
150fe950ae3Smrg static void mos_chip_init(struct usbnet *);
1517a9a30c5Sthorpej static void mos_uno_stop(struct ifnet *ifp, int disable);
1527a9a30c5Sthorpej static int mos_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
1537a9a30c5Sthorpej static int mos_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
1547a9a30c5Sthorpej static void mos_uno_mii_statchg(struct ifnet *);
155fe950ae3Smrg static void mos_reset(struct usbnet *);
156fe950ae3Smrg
157fe950ae3Smrg static int mos_reg_read_1(struct usbnet *, int);
158fe950ae3Smrg static int mos_reg_read_2(struct usbnet *, int);
159fe950ae3Smrg static int mos_reg_write_1(struct usbnet *, int, int);
160fe950ae3Smrg static int mos_reg_write_2(struct usbnet *, int, int);
161fe950ae3Smrg static int mos_readmac(struct usbnet *);
162fe950ae3Smrg static int mos_writemac(struct usbnet *);
163fe950ae3Smrg static int mos_write_mcast(struct usbnet *, uint8_t *);
164fe950ae3Smrg
165f76a6828Smaxv static const struct usbnet_ops mos_ops = {
1667a9a30c5Sthorpej .uno_stop = mos_uno_stop,
167d9c770e7Sriastradh .uno_mcast = mos_uno_mcast,
1687a9a30c5Sthorpej .uno_read_reg = mos_uno_mii_read_reg,
1697a9a30c5Sthorpej .uno_write_reg = mos_uno_mii_write_reg,
1707a9a30c5Sthorpej .uno_statchg = mos_uno_mii_statchg,
1717a9a30c5Sthorpej .uno_tx_prepare = mos_uno_tx_prepare,
1727a9a30c5Sthorpej .uno_rx_loop = mos_uno_rx_loop,
1737a9a30c5Sthorpej .uno_init = mos_uno_init,
174fe950ae3Smrg };
175fe950ae3Smrg
176fe950ae3Smrg static int
mos_reg_read_1(struct usbnet * un,int reg)177fe950ae3Smrg mos_reg_read_1(struct usbnet *un, int reg)
178fe950ae3Smrg {
179fe950ae3Smrg usb_device_request_t req;
180fe950ae3Smrg usbd_status err;
181fe950ae3Smrg uByte val = 0;
182fe950ae3Smrg
183fe950ae3Smrg if (usbnet_isdying(un))
184fe950ae3Smrg return 0;
185fe950ae3Smrg
186fe950ae3Smrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
187fe950ae3Smrg req.bRequest = MOS_UR_READREG;
188fe950ae3Smrg USETW(req.wValue, 0);
189fe950ae3Smrg USETW(req.wIndex, reg);
190fe950ae3Smrg USETW(req.wLength, 1);
191fe950ae3Smrg
192fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, &val);
193fe950ae3Smrg
194fe950ae3Smrg if (err) {
195fe950ae3Smrg aprint_error_dev(un->un_dev, "read reg %x\n", reg);
196fe950ae3Smrg return 0;
197fe950ae3Smrg }
198fe950ae3Smrg
199fe950ae3Smrg return val;
200fe950ae3Smrg }
201fe950ae3Smrg
202fe950ae3Smrg static int
mos_reg_read_2(struct usbnet * un,int reg)203fe950ae3Smrg mos_reg_read_2(struct usbnet *un, int reg)
204fe950ae3Smrg {
205fe950ae3Smrg usb_device_request_t req;
206fe950ae3Smrg usbd_status err;
207fe950ae3Smrg uWord val;
208fe950ae3Smrg
209fe950ae3Smrg if (usbnet_isdying(un))
210fe950ae3Smrg return 0;
211fe950ae3Smrg
212fe950ae3Smrg USETW(val,0);
213fe950ae3Smrg
214fe950ae3Smrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
215fe950ae3Smrg req.bRequest = MOS_UR_READREG;
216fe950ae3Smrg USETW(req.wValue, 0);
217fe950ae3Smrg USETW(req.wIndex, reg);
218fe950ae3Smrg USETW(req.wLength, 2);
219fe950ae3Smrg
220fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, &val);
221fe950ae3Smrg
222fe950ae3Smrg if (err) {
223fe950ae3Smrg aprint_error_dev(un->un_dev, "read reg2 %x\n", reg);
224fe950ae3Smrg return 0;
225fe950ae3Smrg }
226fe950ae3Smrg
227fe950ae3Smrg return UGETW(val);
228fe950ae3Smrg }
229fe950ae3Smrg
230fe950ae3Smrg static int
mos_reg_write_1(struct usbnet * un,int reg,int aval)231fe950ae3Smrg mos_reg_write_1(struct usbnet *un, int reg, int aval)
232fe950ae3Smrg {
233fe950ae3Smrg usb_device_request_t req;
234fe950ae3Smrg usbd_status err;
235fe950ae3Smrg uByte val;
236fe950ae3Smrg
237fe950ae3Smrg if (usbnet_isdying(un))
238fe950ae3Smrg return 0;
239fe950ae3Smrg
240fe950ae3Smrg val = aval;
241fe950ae3Smrg
242fe950ae3Smrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
243fe950ae3Smrg req.bRequest = MOS_UR_WRITEREG;
244fe950ae3Smrg USETW(req.wValue, 0);
245fe950ae3Smrg USETW(req.wIndex, reg);
246fe950ae3Smrg USETW(req.wLength, 1);
247fe950ae3Smrg
248fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, &val);
249fe950ae3Smrg
250fe950ae3Smrg if (err)
251fe950ae3Smrg aprint_error_dev(un->un_dev, "write reg %x <- %x\n",
252fe950ae3Smrg reg, aval);
253fe950ae3Smrg
254fe950ae3Smrg return 0;
255fe950ae3Smrg }
256fe950ae3Smrg
257fe950ae3Smrg static int
mos_reg_write_2(struct usbnet * un,int reg,int aval)258fe950ae3Smrg mos_reg_write_2(struct usbnet *un, int reg, int aval)
259fe950ae3Smrg {
260fe950ae3Smrg usb_device_request_t req;
261fe950ae3Smrg usbd_status err;
262fe950ae3Smrg uWord val;
263fe950ae3Smrg
264fe950ae3Smrg USETW(val, aval);
265fe950ae3Smrg
266fe950ae3Smrg if (usbnet_isdying(un))
267fe950ae3Smrg return EIO;
268fe950ae3Smrg
269fe950ae3Smrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
270fe950ae3Smrg req.bRequest = MOS_UR_WRITEREG;
271fe950ae3Smrg USETW(req.wValue, 0);
272fe950ae3Smrg USETW(req.wIndex, reg);
273fe950ae3Smrg USETW(req.wLength, 2);
274fe950ae3Smrg
275fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, &val);
276fe950ae3Smrg
277fe950ae3Smrg if (err)
278fe950ae3Smrg aprint_error_dev(un->un_dev, "write reg2 %x <- %x\n",
279fe950ae3Smrg reg, aval);
280fe950ae3Smrg
281fe950ae3Smrg return 0;
282fe950ae3Smrg }
283fe950ae3Smrg
284fe950ae3Smrg static int
mos_readmac(struct usbnet * un)285fe950ae3Smrg mos_readmac(struct usbnet *un)
286fe950ae3Smrg {
287fe950ae3Smrg usb_device_request_t req;
288fe950ae3Smrg usbd_status err;
289fe950ae3Smrg
290fe950ae3Smrg if (usbnet_isdying(un))
291fe950ae3Smrg return 0;
292fe950ae3Smrg
293fe950ae3Smrg req.bmRequestType = UT_READ_VENDOR_DEVICE;
294fe950ae3Smrg req.bRequest = MOS_UR_READREG;
295fe950ae3Smrg USETW(req.wValue, 0);
296fe950ae3Smrg USETW(req.wIndex, MOS_MAC);
297fe950ae3Smrg USETW(req.wLength, ETHER_ADDR_LEN);
298fe950ae3Smrg
299fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
300fe950ae3Smrg
301fe950ae3Smrg if (err)
302fe950ae3Smrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
303fe950ae3Smrg
304fe950ae3Smrg return err;
305fe950ae3Smrg }
306fe950ae3Smrg
307fe950ae3Smrg static int
mos_writemac(struct usbnet * un)308fe950ae3Smrg mos_writemac(struct usbnet *un)
309fe950ae3Smrg {
310fe950ae3Smrg usb_device_request_t req;
311fe950ae3Smrg usbd_status err;
312fe950ae3Smrg
313fe950ae3Smrg if (usbnet_isdying(un))
314fe950ae3Smrg return 0;
315fe950ae3Smrg
316fe950ae3Smrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
317fe950ae3Smrg req.bRequest = MOS_UR_WRITEREG;
318fe950ae3Smrg USETW(req.wValue, 0);
319fe950ae3Smrg USETW(req.wIndex, MOS_MAC);
320fe950ae3Smrg USETW(req.wLength, ETHER_ADDR_LEN);
321fe950ae3Smrg
322fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, un->un_eaddr);
323fe950ae3Smrg
324fe950ae3Smrg if (err)
325fe950ae3Smrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
326fe950ae3Smrg
327fe950ae3Smrg return 0;
328fe950ae3Smrg }
329fe950ae3Smrg
330fe950ae3Smrg static int
mos_write_mcast(struct usbnet * un,uint8_t * hashtbl)331fe950ae3Smrg mos_write_mcast(struct usbnet *un, uint8_t *hashtbl)
332fe950ae3Smrg {
333fe950ae3Smrg usb_device_request_t req;
334fe950ae3Smrg usbd_status err;
335fe950ae3Smrg
336fe950ae3Smrg if (usbnet_isdying(un))
337fe950ae3Smrg return EIO;
338fe950ae3Smrg
339fe950ae3Smrg req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
340fe950ae3Smrg req.bRequest = MOS_UR_WRITEREG;
341fe950ae3Smrg USETW(req.wValue, 0);
342fe950ae3Smrg USETW(req.wIndex, MOS_MCAST_TABLE);
343fe950ae3Smrg USETW(req.wLength, 8);
344fe950ae3Smrg
345fe950ae3Smrg err = usbd_do_request(un->un_udev, &req, hashtbl);
346fe950ae3Smrg
347fe950ae3Smrg if (err) {
348fe950ae3Smrg aprint_error_dev(un->un_dev, "%s: failed", __func__);
349fe950ae3Smrg return(-1);
350fe950ae3Smrg }
351fe950ae3Smrg
352fe950ae3Smrg return 0;
353fe950ae3Smrg }
354fe950ae3Smrg
355fe950ae3Smrg static int
mos_uno_mii_read_reg(struct usbnet * un,int phy,int reg,uint16_t * val)3567a9a30c5Sthorpej mos_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
357fe950ae3Smrg {
358fe950ae3Smrg int i, res;
359fe950ae3Smrg
360fe950ae3Smrg mos_reg_write_2(un, MOS_PHY_DATA, 0);
361fe950ae3Smrg mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
362fe950ae3Smrg MOS_PHYCTL_READ);
363fe950ae3Smrg mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
364fe950ae3Smrg MOS_PHYSTS_PENDING);
365fe950ae3Smrg
366fe950ae3Smrg for (i = 0; i < MOS_TIMEOUT; i++) {
3679e1fa980Sriastradh if (usbnet_isdying(un)) {
3689e1fa980Sriastradh *val = 0;
3697f15b701Sriastradh return ENXIO;
3709e1fa980Sriastradh }
371fe950ae3Smrg if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
372fe950ae3Smrg break;
373fe950ae3Smrg }
374fe950ae3Smrg if (i == MOS_TIMEOUT) {
375fe950ae3Smrg aprint_error_dev(un->un_dev, "read PHY failed\n");
3769e1fa980Sriastradh *val = 0;
377fe950ae3Smrg return EIO;
378fe950ae3Smrg }
379fe950ae3Smrg
380fe950ae3Smrg res = mos_reg_read_2(un, MOS_PHY_DATA);
381fe950ae3Smrg *val = res;
382fe950ae3Smrg
383fe950ae3Smrg DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
384fe950ae3Smrg device_xname(un->un_dev), __func__, phy, reg, res));
385fe950ae3Smrg
386fe950ae3Smrg return 0;
387fe950ae3Smrg }
388fe950ae3Smrg
389fe950ae3Smrg static int
mos_uno_mii_write_reg(struct usbnet * un,int phy,int reg,uint16_t val)3907a9a30c5Sthorpej mos_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
391fe950ae3Smrg {
392fe950ae3Smrg int i;
393fe950ae3Smrg
394fe950ae3Smrg DPRINTFN(10,("%s: %s: phy %d reg %d val %u\n",
395fe950ae3Smrg device_xname(un->un_dev), __func__, phy, reg, val));
396fe950ae3Smrg
397fe950ae3Smrg mos_reg_write_2(un, MOS_PHY_DATA, val);
398fe950ae3Smrg mos_reg_write_1(un, MOS_PHY_CTL, (phy & MOS_PHYCTL_PHYADDR) |
399fe950ae3Smrg MOS_PHYCTL_WRITE);
400fe950ae3Smrg mos_reg_write_1(un, MOS_PHY_STS, (reg & MOS_PHYSTS_PHYREG) |
401fe950ae3Smrg MOS_PHYSTS_PENDING);
402fe950ae3Smrg
403fe950ae3Smrg for (i = 0; i < MOS_TIMEOUT; i++) {
4047f15b701Sriastradh if (usbnet_isdying(un))
4057f15b701Sriastradh return ENXIO;
406fe950ae3Smrg if (mos_reg_read_1(un, MOS_PHY_STS) & MOS_PHYSTS_READY)
407fe950ae3Smrg break;
408fe950ae3Smrg }
409fe950ae3Smrg if (i == MOS_TIMEOUT) {
410fe950ae3Smrg aprint_error_dev(un->un_dev, "write PHY failed\n");
411fe950ae3Smrg return EIO;
412fe950ae3Smrg }
413fe950ae3Smrg
414fe950ae3Smrg return 0;
415fe950ae3Smrg }
416fe950ae3Smrg
417fe950ae3Smrg void
mos_uno_mii_statchg(struct ifnet * ifp)4187a9a30c5Sthorpej mos_uno_mii_statchg(struct ifnet *ifp)
419fe950ae3Smrg {
420fe950ae3Smrg struct usbnet * const un = ifp->if_softc;
421fe950ae3Smrg struct mii_data * const mii = usbnet_mii(un);
422fe950ae3Smrg int val, err;
423fe950ae3Smrg
424fe950ae3Smrg if (usbnet_isdying(un))
425fe950ae3Smrg return;
426fe950ae3Smrg
427fe950ae3Smrg DPRINTFN(10,("%s: %s: enter\n", device_xname(un->un_dev), __func__));
428fe950ae3Smrg
429fe950ae3Smrg /* disable RX, TX prior to changing FDX, SPEEDSEL */
430fe950ae3Smrg val = mos_reg_read_1(un, MOS_CTL);
431fe950ae3Smrg val &= ~(MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
432fe950ae3Smrg mos_reg_write_1(un, MOS_CTL, val);
433fe950ae3Smrg
434fe950ae3Smrg /* reset register which counts dropped frames */
435fe950ae3Smrg mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
436fe950ae3Smrg
437fe950ae3Smrg if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX)
438fe950ae3Smrg val |= MOS_CTL_FDX_ENB;
439fe950ae3Smrg else
440fe950ae3Smrg val &= ~(MOS_CTL_FDX_ENB);
441fe950ae3Smrg
442fe950ae3Smrg if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
443fe950ae3Smrg (IFM_ACTIVE | IFM_AVALID)) {
444fe950ae3Smrg switch (IFM_SUBTYPE(mii->mii_media_active)) {
445fe950ae3Smrg case IFM_100_TX:
446fe950ae3Smrg val |= MOS_CTL_SPEEDSEL;
447fe950ae3Smrg break;
448fe950ae3Smrg case IFM_10_T:
449fe950ae3Smrg val &= ~(MOS_CTL_SPEEDSEL);
450fe950ae3Smrg break;
451fe950ae3Smrg }
452fe950ae3Smrg usbnet_set_link(un, true);
453fe950ae3Smrg }
454fe950ae3Smrg
455fe950ae3Smrg /* re-enable TX, RX */
456fe950ae3Smrg val |= (MOS_CTL_TX_ENB | MOS_CTL_RX_ENB);
457fe950ae3Smrg err = mos_reg_write_1(un, MOS_CTL, val);
458fe950ae3Smrg
459fe950ae3Smrg if (err)
460fe950ae3Smrg aprint_error_dev(un->un_dev, "media change failed\n");
461fe950ae3Smrg }
462fe950ae3Smrg
463fe950ae3Smrg static void
mos_uno_mcast(struct ifnet * ifp)4642a987a0aSriastradh mos_uno_mcast(struct ifnet *ifp)
465fe950ae3Smrg {
4662a987a0aSriastradh struct usbnet *un = ifp->if_softc;
467fe950ae3Smrg struct ethercom *ec = usbnet_ec(un);
468fe950ae3Smrg struct ether_multi *enm;
469fe950ae3Smrg struct ether_multistep step;
470fe950ae3Smrg u_int32_t h = 0;
47114c95260Snisimura u_int8_t rxmode, mchash[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
472fe950ae3Smrg
473fe950ae3Smrg if (usbnet_isdying(un))
474fe950ae3Smrg return;
475fe950ae3Smrg
476fe950ae3Smrg rxmode = mos_reg_read_1(un, MOS_CTL);
477fe950ae3Smrg rxmode &= ~(MOS_CTL_ALLMULTI | MOS_CTL_RX_PROMISC);
478fe950ae3Smrg
479fe950ae3Smrg ETHER_LOCK(ec);
480a06a0449Sriastradh if (usbnet_ispromisc(un)) {
481fe950ae3Smrg ec->ec_flags |= ETHER_F_ALLMULTI;
48214c95260Snisimura ETHER_UNLOCK(ec);
48314c95260Snisimura /* run promisc. mode */
48414c95260Snisimura rxmode |= MOS_CTL_ALLMULTI; /* ??? */
485fe950ae3Smrg rxmode |= MOS_CTL_RX_PROMISC;
48614c95260Snisimura goto update;
48714c95260Snisimura }
488fe950ae3Smrg ec->ec_flags &= ~ETHER_F_ALLMULTI;
489fe950ae3Smrg ETHER_FIRST_MULTI(step, ec, enm);
490fe950ae3Smrg while (enm != NULL) {
49114c95260Snisimura if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) {
49214c95260Snisimura ec->ec_flags |= ETHER_F_ALLMULTI;
49314c95260Snisimura ETHER_UNLOCK(ec);
49414c95260Snisimura memset(mchash, 0, sizeof(mchash)); /* correct ??? */
4953e50c214Snisimura /* accept all multicast frame */
49614c95260Snisimura rxmode |= MOS_CTL_ALLMULTI;
49714c95260Snisimura goto update;
498fe950ae3Smrg }
49914c95260Snisimura h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN);
50014c95260Snisimura /* 3(31:29) and 3(28:26) sampling to have uint8_t[8] */
50114c95260Snisimura mchash[h >> 29] |= 1 << ((h >> 26) % 8);
502fe950ae3Smrg ETHER_NEXT_MULTI(step, enm);
503fe950ae3Smrg }
5049ffb3159Smsaitoh ETHER_UNLOCK(ec);
50514c95260Snisimura /* MOS receive filter is always on */
50614c95260Snisimura update:
507fe950ae3Smrg /*
508fe950ae3Smrg * The datasheet claims broadcast frames were always accepted
509fe950ae3Smrg * regardless of filter settings. But the hardware seems to
510fe950ae3Smrg * filter broadcast frames, so pass them explicitly.
511fe950ae3Smrg */
51214c95260Snisimura mchash[7] |= 0x80;
51314c95260Snisimura mos_write_mcast(un, mchash);
514fe950ae3Smrg mos_reg_write_1(un, MOS_CTL, rxmode);
515fe950ae3Smrg }
516fe950ae3Smrg
517fe950ae3Smrg static void
mos_reset(struct usbnet * un)518fe950ae3Smrg mos_reset(struct usbnet *un)
519fe950ae3Smrg {
520fe950ae3Smrg u_int8_t ctl;
521fe950ae3Smrg
522fe950ae3Smrg if (usbnet_isdying(un))
523fe950ae3Smrg return;
524fe950ae3Smrg
525fe950ae3Smrg ctl = mos_reg_read_1(un, MOS_CTL);
526fe950ae3Smrg ctl &= ~(MOS_CTL_RX_PROMISC | MOS_CTL_ALLMULTI | MOS_CTL_TX_ENB |
527fe950ae3Smrg MOS_CTL_RX_ENB);
528fe950ae3Smrg /* Disable RX, TX, promiscuous and allmulticast mode */
529fe950ae3Smrg mos_reg_write_1(un, MOS_CTL, ctl);
530fe950ae3Smrg
531fe950ae3Smrg /* Reset frame drop counter register to zero */
532fe950ae3Smrg mos_reg_write_1(un, MOS_FRAME_DROP_CNT, 0);
533fe950ae3Smrg
534fe950ae3Smrg /* Wait a little while for the chip to get its brains in order. */
535fe950ae3Smrg DELAY(1000);
536fe950ae3Smrg }
537fe950ae3Smrg
538fe950ae3Smrg void
mos_chip_init(struct usbnet * un)539fe950ae3Smrg mos_chip_init(struct usbnet *un)
540fe950ae3Smrg {
541fe950ae3Smrg int i;
542fe950ae3Smrg
543fe950ae3Smrg /*
544fe950ae3Smrg * Rev.C devices have a pause threshold register which needs to be set
545fe950ae3Smrg * at startup.
546fe950ae3Smrg */
547fe950ae3Smrg if (mos_reg_read_1(un, MOS_PAUSE_TRHD) != -1) {
548fe950ae3Smrg for (i = 0; i < MOS_PAUSE_REWRITES; i++)
549fe950ae3Smrg mos_reg_write_1(un, MOS_PAUSE_TRHD, 0);
550fe950ae3Smrg }
551fe950ae3Smrg }
552fe950ae3Smrg
553fe950ae3Smrg /*
554fe950ae3Smrg * Probe for a MCS7x30 chip.
555fe950ae3Smrg */
556fe950ae3Smrg static int
mos_match(device_t parent,cfdata_t match,void * aux)557fe950ae3Smrg mos_match(device_t parent, cfdata_t match, void *aux)
558fe950ae3Smrg {
559fe950ae3Smrg struct usb_attach_arg *uaa = aux;
560fe950ae3Smrg
561fe950ae3Smrg return (mos_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
562fe950ae3Smrg UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
563fe950ae3Smrg }
564fe950ae3Smrg
565fe950ae3Smrg /*
566fe950ae3Smrg * Attach the interface.
567fe950ae3Smrg */
568fe950ae3Smrg static void
mos_attach(device_t parent,device_t self,void * aux)569fe950ae3Smrg mos_attach(device_t parent, device_t self, void *aux)
570fe950ae3Smrg {
571fe950ae3Smrg USBNET_MII_DECL_DEFAULT(unm);
572fe950ae3Smrg struct usbnet * un = device_private(self);
573fe950ae3Smrg struct usb_attach_arg *uaa = aux;
574fe950ae3Smrg struct usbd_device *dev = uaa->uaa_device;
575fe950ae3Smrg usbd_status err;
576fe950ae3Smrg usb_interface_descriptor_t *id;
577fe950ae3Smrg usb_endpoint_descriptor_t *ed;
578fe950ae3Smrg char *devinfop;
579fe950ae3Smrg int i;
580fe950ae3Smrg
581fe950ae3Smrg aprint_naive("\n");
582fe950ae3Smrg aprint_normal("\n");
583fe950ae3Smrg devinfop = usbd_devinfo_alloc(dev, 0);
584fe950ae3Smrg aprint_normal_dev(self, "%s\n", devinfop);
585fe950ae3Smrg usbd_devinfo_free(devinfop);
586fe950ae3Smrg
587fe950ae3Smrg un->un_dev = self;
588fe950ae3Smrg un->un_udev = dev;
589fe950ae3Smrg un->un_sc = un;
590fe950ae3Smrg un->un_ops = &mos_ops;
591fe950ae3Smrg un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
592fe950ae3Smrg un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
593fe950ae3Smrg un->un_rx_list_cnt = MOS_RX_LIST_CNT;
594fe950ae3Smrg un->un_tx_list_cnt = MOS_TX_LIST_CNT;
595fe950ae3Smrg un->un_rx_bufsz = un->un_tx_bufsz = MOS_BUFSZ;
596fe950ae3Smrg
597fe950ae3Smrg err = usbd_set_config_no(dev, MOS_CONFIG_NO, 1);
598fe950ae3Smrg if (err) {
599fe950ae3Smrg aprint_error_dev(self, "failed to set configuration"
600fe950ae3Smrg ", err=%s\n", usbd_errstr(err));
601fe950ae3Smrg return;
602fe950ae3Smrg }
603fe950ae3Smrg
604fe950ae3Smrg err = usbd_device2interface_handle(dev, MOS_IFACE_IDX, &un->un_iface);
605fe950ae3Smrg if (err) {
606fe950ae3Smrg aprint_error_dev(self, "failed getting interface handle"
607fe950ae3Smrg ", err=%s\n", usbd_errstr(err));
608fe950ae3Smrg return;
609fe950ae3Smrg }
610fe950ae3Smrg
611fe950ae3Smrg un->un_flags = mos_lookup(uaa->uaa_vendor, uaa->uaa_product)->mos_flags;
612fe950ae3Smrg
613fe950ae3Smrg id = usbd_get_interface_descriptor(un->un_iface);
614fe950ae3Smrg
615fe950ae3Smrg /* Find endpoints. */
616fe950ae3Smrg for (i = 0; i < id->bNumEndpoints; i++) {
617fe950ae3Smrg ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
618fe950ae3Smrg if (!ed) {
619fe950ae3Smrg aprint_error_dev(self, "couldn't get ep %d\n", i);
620fe950ae3Smrg return;
621fe950ae3Smrg }
622fe950ae3Smrg if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
623fe950ae3Smrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
624fe950ae3Smrg un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
625fe950ae3Smrg } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
626fe950ae3Smrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
627fe950ae3Smrg un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
628fe950ae3Smrg } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
629fe950ae3Smrg UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
630fe950ae3Smrg un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
631fe950ae3Smrg }
632fe950ae3Smrg }
633fe950ae3Smrg
634fe950ae3Smrg if (un->un_flags & MCS7730)
635fe950ae3Smrg aprint_normal_dev(self, "MCS7730\n");
636fe950ae3Smrg else if (un->un_flags & MCS7830)
637fe950ae3Smrg aprint_normal_dev(self, "MCS7830\n");
638fe950ae3Smrg else if (un->un_flags & MCS7832)
639fe950ae3Smrg aprint_normal_dev(self, "MCS7832\n");
640fe950ae3Smrg
641fe950ae3Smrg /* Set these up now for register access. */
6420b4ab8ceSriastradh usbnet_attach(un);
643fe950ae3Smrg
644fe950ae3Smrg mos_chip_init(un);
645fe950ae3Smrg
646fe950ae3Smrg /*
647fe950ae3Smrg * Read MAC address, inform the world.
648fe950ae3Smrg */
649fe950ae3Smrg err = mos_readmac(un);
650fe950ae3Smrg if (err) {
651fe950ae3Smrg aprint_error_dev(self, "couldn't read MAC address\n");
652fe950ae3Smrg return;
653fe950ae3Smrg }
654fe950ae3Smrg
655*5ac7ebbdSmartin struct ethercom *ec = usbnet_ec(un);
656*5ac7ebbdSmartin ec->ec_capabilities = ETHERCAP_VLAN_MTU;
657fe950ae3Smrg
658fe950ae3Smrg usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
659fe950ae3Smrg 0, &unm);
660fe950ae3Smrg }
661fe950ae3Smrg
662fe950ae3Smrg /*
663fe950ae3Smrg * A frame has been uploaded: pass the resulting mbuf chain up to
664fe950ae3Smrg * the higher level protocols.
665fe950ae3Smrg */
666fe950ae3Smrg void
mos_uno_rx_loop(struct usbnet * un,struct usbnet_chain * c,uint32_t total_len)6677a9a30c5Sthorpej mos_uno_rx_loop(struct usbnet * un, struct usbnet_chain *c, uint32_t total_len)
668fe950ae3Smrg {
669fe950ae3Smrg struct ifnet *ifp = usbnet_ifp(un);
670fe950ae3Smrg uint8_t *buf = c->unc_buf;
671fe950ae3Smrg u_int8_t rxstat;
672fe950ae3Smrg u_int16_t pktlen = 0;
673fe950ae3Smrg
674fe950ae3Smrg DPRINTFN(5,("%s: %s: enter len %u\n",
675fe950ae3Smrg device_xname(un->un_dev), __func__, total_len));
676fe950ae3Smrg
677fe950ae3Smrg if (total_len <= 1)
678fe950ae3Smrg return;
679fe950ae3Smrg
680fe950ae3Smrg /* evaluate status byte at the end */
681fe950ae3Smrg pktlen = total_len - 1;
682fe950ae3Smrg if (pktlen > un->un_rx_bufsz) {
68372f872d2Sthorpej if_statinc(ifp, if_ierrors);
684fe950ae3Smrg return;
685fe950ae3Smrg }
686fe950ae3Smrg rxstat = buf[pktlen] & MOS_RXSTS_MASK;
687fe950ae3Smrg
688fe950ae3Smrg if (rxstat != MOS_RXSTS_VALID) {
689fe950ae3Smrg DPRINTF(("%s: erroneous frame received: ",
690fe950ae3Smrg device_xname(un->un_dev)));
691fe950ae3Smrg if (rxstat & MOS_RXSTS_SHORT_FRAME)
692fe950ae3Smrg DPRINTF(("frame size less than 64 bytes\n"));
693fe950ae3Smrg if (rxstat & MOS_RXSTS_LARGE_FRAME)
694fe950ae3Smrg DPRINTF(("frame size larger than 1532 bytes\n"));
695fe950ae3Smrg if (rxstat & MOS_RXSTS_CRC_ERROR)
696fe950ae3Smrg DPRINTF(("CRC error\n"));
697fe950ae3Smrg if (rxstat & MOS_RXSTS_ALIGN_ERROR)
698fe950ae3Smrg DPRINTF(("alignment error\n"));
69972f872d2Sthorpej if_statinc(ifp, if_ierrors);
700fe950ae3Smrg return;
701fe950ae3Smrg }
702fe950ae3Smrg
703fe950ae3Smrg if (pktlen < sizeof(struct ether_header) ) {
70472f872d2Sthorpej if_statinc(ifp, if_ierrors);
705fe950ae3Smrg return;
706fe950ae3Smrg }
707fe950ae3Smrg
708fe950ae3Smrg usbnet_enqueue(un, c->unc_buf, pktlen, 0, 0, 0);
709fe950ae3Smrg }
710fe950ae3Smrg
711fe950ae3Smrg static unsigned
mos_uno_tx_prepare(struct usbnet * un,struct mbuf * m,struct usbnet_chain * c)7127a9a30c5Sthorpej mos_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
713fe950ae3Smrg {
714fe950ae3Smrg int length;
715fe950ae3Smrg
716fe950ae3Smrg if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz)
717fe950ae3Smrg return 0;
718fe950ae3Smrg
719fe950ae3Smrg m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf);
720fe950ae3Smrg length = m->m_pkthdr.len;
721fe950ae3Smrg
722fe950ae3Smrg DPRINTFN(5,("%s: %s: len %u\n",
723fe950ae3Smrg device_xname(un->un_dev), __func__, length));
724fe950ae3Smrg
725fe950ae3Smrg return length;
726fe950ae3Smrg }
727fe950ae3Smrg
728fe950ae3Smrg static int
mos_uno_init(struct ifnet * ifp)7291da4c156Sriastradh mos_uno_init(struct ifnet *ifp)
730fe950ae3Smrg {
731fe950ae3Smrg struct usbnet * const un = ifp->if_softc;
732fe950ae3Smrg u_int8_t rxmode;
733fe950ae3Smrg unsigned char ipgs[2];
734fe950ae3Smrg
735fe950ae3Smrg /* Reset the ethernet interface. */
736fe950ae3Smrg mos_reset(un);
737fe950ae3Smrg
738fe950ae3Smrg /* Write MAC address. */
739fe950ae3Smrg mos_writemac(un);
740fe950ae3Smrg
741fe950ae3Smrg /* Read and set transmitter IPG values */
742fe950ae3Smrg ipgs[0] = mos_reg_read_1(un, MOS_IPG0);
743fe950ae3Smrg ipgs[1] = mos_reg_read_1(un, MOS_IPG1);
744fe950ae3Smrg mos_reg_write_1(un, MOS_IPG0, ipgs[0]);
745fe950ae3Smrg mos_reg_write_1(un, MOS_IPG1, ipgs[1]);
746fe950ae3Smrg
747fe950ae3Smrg /* Enable receiver and transmitter, bridge controls speed/duplex mode */
748fe950ae3Smrg rxmode = mos_reg_read_1(un, MOS_CTL);
749fe950ae3Smrg rxmode |= MOS_CTL_RX_ENB | MOS_CTL_TX_ENB | MOS_CTL_BS_ENB;
750fe950ae3Smrg rxmode &= ~(MOS_CTL_SLEEP);
751fe950ae3Smrg mos_reg_write_1(un, MOS_CTL, rxmode);
752fe950ae3Smrg
75393ec4d73Sriastradh return 0;
754fe950ae3Smrg }
755fe950ae3Smrg
756fe950ae3Smrg void
mos_uno_stop(struct ifnet * ifp,int disable)7577a9a30c5Sthorpej mos_uno_stop(struct ifnet *ifp, int disable)
758fe950ae3Smrg {
759fe950ae3Smrg struct usbnet * const un = ifp->if_softc;
760fe950ae3Smrg
761fe950ae3Smrg mos_reset(un);
762fe950ae3Smrg }
763