1*2e741b3aSchristos /* $NetBSD: rfreg.h,v 1.5 2019/10/29 03:49:59 christos Exp $ */ 2281464ebSragge /* 3281464ebSragge * Copyright (c) 2002 Jochen Kunz. 4281464ebSragge * All rights reserved. 5281464ebSragge * 6281464ebSragge * Redistribution and use in source and binary forms, with or without 7281464ebSragge * modification, are permitted provided that the following conditions 8281464ebSragge * are met: 9281464ebSragge * 1. Redistributions of source code must retain the above copyright 10281464ebSragge * notice, this list of conditions and the following disclaimer. 11281464ebSragge * 2. Redistributions in binary form must reproduce the above copyright 12281464ebSragge * notice, this list of conditions and the following disclaimer in the 13281464ebSragge * documentation and/or other materials provided with the distribution. 14281464ebSragge * 3. The name of Jochen Kunz may not be used to endorse or promote 15281464ebSragge * products derived from this software without specific prior 16281464ebSragge * written permission. 17281464ebSragge * 18281464ebSragge * THIS SOFTWARE IS PROVIDED BY JOCHEN KUNZ 19281464ebSragge * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20281464ebSragge * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21281464ebSragge * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL JOCHEN KUNZ 22281464ebSragge * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23281464ebSragge * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24281464ebSragge * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25281464ebSragge * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26281464ebSragge * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27281464ebSragge * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28281464ebSragge * POSSIBILITY OF SUCH DAMAGE. 29281464ebSragge */ 30281464ebSragge 31281464ebSragge 32281464ebSragge 339876532dSwiz /* Registers in Uni/QBus I/O space. */ 34281464ebSragge #define RX2CS 0 /* Command and Status Register */ 35281464ebSragge #define RX2DB 2 /* Data Buffer Register */ 36281464ebSragge /* RX2DB is depending on context: */ 37281464ebSragge #define RX2BA 2 /* Bus Address Register */ 38281464ebSragge #define RX2TA 2 /* Track Address Register */ 39281464ebSragge #define RX2SA 2 /* Sector Address Register */ 40281464ebSragge #define RX2WC 2 /* Word Count Register */ 41281464ebSragge #define RX2ES 2 /* Error and Status Register */ 42281464ebSragge 43281464ebSragge 44281464ebSragge /* Bitdefinitions of CSR. */ 45281464ebSragge #define RX2CS_ERR 0x8000 /* Error RO */ 46281464ebSragge #define RX2CS_INIT 0x4000 /* Initialize WO */ 47281464ebSragge #define RX2CS_UAEBH 0x2000 /* Unibus address extension high bit WO */ 48281464ebSragge #define RX2CS_UAEBI 0x1000 /* Unibus address extension low bit WO */ 49281464ebSragge #define RX2CS_RX02 0x0800 /* RX02 RO */ 50281464ebSragge /* 0x0400 Not Used -- */ 51281464ebSragge /* 0x0200 Not Used -- */ 52281464ebSragge #define RX2CS_DD 0x0100 /* Double Density R/W */ 53281464ebSragge #define RX2CS_TR 0x0080 /* Transfer Request RO */ 54281464ebSragge #define RX2CS_IE 0x0040 /* Interrupt Enable R/W */ 55281464ebSragge #define RX2CS_DONE 0x0020 /* Done RO */ 56281464ebSragge #define RX2CS_US 0x0010 /* Unit Select WO */ 57281464ebSragge #define RX2CS_FCH 0x0008 /* Function Code high bit WO */ 58281464ebSragge #define RX2CS_FCM 0x0004 /* Function Code mid bit WO */ 59281464ebSragge #define RX2CS_FCL 0x0002 /* Function Code low bit WO */ 60281464ebSragge #define RX2CS_GO 0x0001 /* Go WO */ 61281464ebSragge #define RX2CS_NU 0x0600 /* not used bits -- */ 62281464ebSragge 63281464ebSragge 64281464ebSragge #define RX2CS_UAEB ( RX2CS_UAEBH | RX2CS_UAEBI ) 65281464ebSragge #define RX2CS_FC ( RX2CS_FCH | RX2CS_FCM | RX2CS_FCL ) 66281464ebSragge 67281464ebSragge 68281464ebSragge /* Commands of the controller and parameter cont. */ 69*2e741b3aSchristos #define RX2CS_FBUF 0x1 /* Fill Buffer, word count and bus address */ 70*2e741b3aSchristos #define RX2CS_EBUF 0x3 /* Empty Buffer, word count and bus address */ 71*2e741b3aSchristos #define RX2CS_WSEC 0x5 /* Write Sector, sector and track */ 72*2e741b3aSchristos #define RX2CS_RSEC 0x7 /* Read Sector, sector and track */ 73*2e741b3aSchristos #define RX2CS_SMD 0x9 /* Set Media Density, ??? */ 74*2e741b3aSchristos #define RX2CS_RSTAT 0xb /* Read Status, no params */ 75*2e741b3aSchristos #define RX2CS_WDDS 0xd /* Write Deleted Data Sector, sector and track */ 76*2e741b3aSchristos #define RX2CS_REC 0xf /* Read Error Code, bus address */ 77*2e741b3aSchristos #define RX2CS_MASK 0xf 78281464ebSragge 79281464ebSragge 80281464ebSragge /* Track Address Register */ 81281464ebSragge #define RX2TA_MASK 0x7f 82281464ebSragge 83281464ebSragge 84281464ebSragge /* Sector Address Register */ 85281464ebSragge #define RX2SA_MASK 0x1f 86281464ebSragge 87281464ebSragge 88281464ebSragge /* Word Count Register */ 89281464ebSragge #define RX2WC_MASK 0x7f 90281464ebSragge 91281464ebSragge 92281464ebSragge /* Bitdefinitions of RX2ES. */ 93281464ebSragge /* <15-12> Not Used -- */ 94281464ebSragge #define RX2ES_NEM 0x0800 /* Non-Existend Memory RO */ 95281464ebSragge #define RX2ES_WCO 0x0400 /* Word Count Overflow RO */ 96281464ebSragge /* 0x0200 Not Used RO */ 97281464ebSragge #define RX2ES_US 0x0010 /* Unit Select RO */ 98281464ebSragge #define RX2ES_RDY 0x0080 /* Ready RO */ 99281464ebSragge #define RX2ES_DEL 0x0040 /* Deleted Data RO */ 100281464ebSragge #define RX2ES_DD 0x0020 /* Double Density RO */ 101281464ebSragge #define RX2ES_DE 0x0010 /* Density Error RO */ 102281464ebSragge #define RX2ES_ACL 0x0008 /* AC Lost RO */ 103281464ebSragge #define RX2ES_ID 0x0004 /* Initialize Done RO */ 104281464ebSragge /* 0x0002 Not Used -- */ 105281464ebSragge #define RX2ES_CRCE 0x0001 /* CRC Error RO */ 106281464ebSragge #define RX2ES_NU 0xF202 /* not used bits -- */ 107281464ebSragge 108281464ebSragge 109281464ebSragge #define RX2_TRACKS 77 /* number of tracks */ 110281464ebSragge #define RX2_SECTORS 26 /* number of sectors / track */ 111281464ebSragge #define RX2_BYTE_SD 128 /* number of bytes / sector in single density */ 112281464ebSragge #define RX2_BYTE_DD 256 /* number of bytes / sector in double density */ 113281464ebSragge #define RX2_HEADS 1 /* number of heads */ 114281464ebSragge 115