1 /* $NetBSD: pci_usrreq.c,v 1.28 2014/07/25 08:10:38 dholland Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * User -> kernel interface for PCI bus access. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.28 2014/07/25 08:10:38 dholland Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/conf.h> 47 #include <sys/device.h> 48 #include <sys/ioctl.h> 49 #include <sys/proc.h> 50 #include <sys/systm.h> 51 #include <sys/errno.h> 52 #include <sys/fcntl.h> 53 #include <sys/kauth.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pciio.h> 58 59 #include "opt_pci.h" 60 61 static int 62 pciopen(dev_t dev, int flags, int mode, struct lwp *l) 63 { 64 device_t dv; 65 66 dv = device_lookup(&pci_cd, minor(dev)); 67 if (dv == NULL) 68 return ENXIO; 69 70 return 0; 71 } 72 73 static int 74 pciioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 75 { 76 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev)); 77 struct pci_child *child; 78 struct pciio_bdf_cfgreg *bdfr; 79 struct pciio_businfo *binfo; 80 struct pciio_drvname *dname; 81 pcitag_t tag; 82 83 switch (cmd) { 84 case PCI_IOC_BDF_CFGREAD: 85 case PCI_IOC_BDF_CFGWRITE: 86 bdfr = data; 87 if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs || 88 bdfr->function > 7 || ISSET(bdfr->cfgreg.reg, 3)) 89 return EINVAL; 90 tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device, 91 bdfr->function); 92 93 if (cmd == PCI_IOC_BDF_CFGREAD) { 94 bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag, 95 bdfr->cfgreg.reg); 96 } else { 97 if ((flag & FWRITE) == 0) 98 return EBADF; 99 pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg, 100 bdfr->cfgreg.val); 101 } 102 return 0; 103 104 case PCI_IOC_BUSINFO: 105 binfo = data; 106 binfo->busno = sc->sc_bus; 107 binfo->maxdevs = sc->sc_maxndevs; 108 return 0; 109 110 case PCI_IOC_DRVNAME: 111 dname = data; 112 if (dname->device >= sc->sc_maxndevs || dname->function > 7) 113 return EINVAL; 114 child = &sc->PCI_SC_DEVICESC(dname->device, dname->function); 115 if (!child->c_dev) 116 return ENXIO; 117 strlcpy(dname->name, device_xname(child->c_dev), 118 sizeof dname->name); 119 return 0; 120 121 default: 122 return ENOTTY; 123 } 124 } 125 126 static paddr_t 127 pcimmap(dev_t dev, off_t offset, int prot) 128 { 129 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev)); 130 struct pci_child *c; 131 struct pci_range *r; 132 int flags = 0; 133 int device, range; 134 135 if (kauth_authorize_machdep(kauth_cred_get(), KAUTH_MACHDEP_UNMANAGEDMEM, 136 NULL, NULL, NULL, NULL) != 0) { 137 return -1; 138 } 139 /* 140 * Since we allow mapping of the entire bus, we 141 * take the offset to be the address on the bus, 142 * and pass 0 as the offset into that range. 143 * 144 * XXX Need a way to deal with linear/etc. 145 * 146 * XXX we rely on MD mmap() methods to enforce limits since these 147 * are hidden in *_tag_t structs if they exist at all 148 */ 149 150 #ifdef PCI_MAGIC_IO_RANGE 151 /* 152 * first, check if someone's trying to map the IO range 153 * XXX this assumes 64kB IO space even though some machines can have 154 * significantly more than that - macppc's bandit host bridge allows 155 * 8MB IO space and sparc64 may have the entire 4GB available. The 156 * firmware on both tries to use the lower 64kB first though and 157 * exausting it is pretty difficult so we should be safe 158 */ 159 if ((offset >= PCI_MAGIC_IO_RANGE) && 160 (offset < (PCI_MAGIC_IO_RANGE + 0x10000))) { 161 return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 162 0, prot, 0); 163 } 164 #endif /* PCI_MAGIC_IO_RANGE */ 165 166 for (device = 0; device < __arraycount(sc->sc_devices); device++) { 167 c = &sc->sc_devices[device]; 168 if (c->c_dev == NULL) 169 continue; 170 for (range = 0; range < __arraycount(c->c_range); range++) { 171 r = &c->c_range[range]; 172 if (r->r_size == 0) 173 break; 174 if (offset >= r->r_offset && 175 offset < r->r_offset + r->r_size) { 176 flags = r->r_flags; 177 break; 178 } 179 } 180 } 181 182 return bus_space_mmap(sc->sc_memt, offset, 0, prot, flags); 183 } 184 185 const struct cdevsw pci_cdevsw = { 186 .d_open = pciopen, 187 .d_close = nullclose, 188 .d_read = noread, 189 .d_write = nowrite, 190 .d_ioctl = pciioctl, 191 .d_stop = nostop, 192 .d_tty = notty, 193 .d_poll = nopoll, 194 .d_mmap = pcimmap, 195 .d_kqfilter = nokqfilter, 196 .d_discard = nodiscard, 197 .d_flag = D_OTHER 198 }; 199 200 /* 201 * pci_devioctl: 202 * 203 * PCI ioctls that can be performed on devices directly. 204 */ 205 int 206 pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, void *data, 207 int flag, struct lwp *l) 208 { 209 struct pciio_cfgreg *r = (void *) data; 210 211 switch (cmd) { 212 case PCI_IOC_CFGREAD: 213 r->val = pci_conf_read(pc, tag, r->reg); 214 break; 215 216 case PCI_IOC_CFGWRITE: 217 if ((flag & FWRITE) == 0) 218 return EBADF; 219 pci_conf_write(pc, tag, r->reg, r->val); 220 break; 221 222 default: 223 return EPASSTHROUGH; 224 } 225 226 return 0; 227 } 228