1 /* $NetBSD: if_ral_pci.c,v 1.24 2017/07/25 23:17:20 maya Exp $ */ 2 /* $OpenBSD: if_ral_pci.c,v 1.24 2015/11/24 17:11:39 mpi Exp $ */ 3 4 /*- 5 * Copyright (c) 2005-2010 Damien Bergamini <damien.bergamini@free.fr> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * PCI front-end for the Ralink RT2560/RT2561/RT2860/RT3090 driver. 22 */ 23 #include <sys/cdefs.h> 24 __KERNEL_RCSID(0, "$NetBSD: if_ral_pci.c,v 1.24 2017/07/25 23:17:20 maya Exp $"); 25 26 27 #include <sys/param.h> 28 #include <sys/sockio.h> 29 #include <sys/mbuf.h> 30 #include <sys/kernel.h> 31 #include <sys/socket.h> 32 #include <sys/systm.h> 33 #include <sys/malloc.h> 34 #include <sys/device.h> 35 36 #include <sys/bus.h> 37 #include <sys/intr.h> 38 39 #include <net/if.h> 40 #include <net/if_dl.h> 41 #include <net/if_media.h> 42 #include <net/if_ether.h> 43 44 #include <netinet/in.h> 45 46 #include <net80211/ieee80211_var.h> 47 #include <net80211/ieee80211_amrr.h> 48 #include <net80211/ieee80211_rssadapt.h> 49 #include <net80211/ieee80211_radiotap.h> 50 51 #include <dev/ic/rt2560var.h> 52 #include <dev/ic/rt2661var.h> 53 #include <dev/ic/rt2860var.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcidevs.h> 58 59 static struct ral_opns { 60 int (*attach)(void *, int); 61 int (*detach)(void *); 62 int (*intr)(void *); 63 64 } ral_rt2560_opns = { 65 rt2560_attach, 66 rt2560_detach, 67 rt2560_intr 68 69 }, ral_rt2661_opns = { 70 rt2661_attach, 71 rt2661_detach, 72 rt2661_intr 73 74 }, ral_rt2860_opns = { 75 rt2860_attach, 76 rt2860_detach, 77 rt2860_intr 78 }; 79 80 struct ral_pci_softc { 81 union { 82 struct rt2560_softc sc_rt2560; 83 struct rt2661_softc sc_rt2661; 84 struct rt2860_softc sc_rt2860; 85 } u; 86 #define sc_sc u.sc_rt2560 87 88 /* PCI specific goo */ 89 struct ral_opns *sc_opns; 90 pci_chipset_tag_t sc_pc; 91 void *sc_ih; 92 bus_size_t sc_mapsize; 93 }; 94 95 /* Base Address Register */ 96 #define RAL_PCI_BAR0 PCI_BAR(0) 97 98 int ral_pci_match(device_t, cfdata_t, void *); 99 void ral_pci_attach(device_t, device_t, void *); 100 int ral_pci_detach(device_t, int); 101 102 CFATTACH_DECL_NEW(ral_pci, sizeof (struct ral_pci_softc), 103 ral_pci_match, ral_pci_attach, ral_pci_detach, NULL); 104 105 static const struct ral_pci_matchid { 106 pci_vendor_id_t ral_vendor; 107 pci_product_id_t ral_product; 108 } ral_pci_devices[] = { 109 { PCI_VENDOR_AWT, PCI_PRODUCT_AWT_RT2890 }, 110 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_1 }, 111 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_2 }, 112 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_3 }, 113 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_4 }, 114 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_5 }, 115 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_6 }, 116 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_7 }, 117 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_1 }, 118 { PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_2 }, 119 { PCI_VENDOR_MSI, PCI_PRODUCT_AWT_RT2890 }, 120 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560 }, 121 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561 }, 122 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S }, 123 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661 }, 124 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760 }, 125 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790 }, 126 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860 }, 127 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890 }, 128 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3060 }, 129 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3062 }, 130 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3090 }, 131 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3091 }, 132 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3092 }, 133 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3562 }, 134 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3592 }, 135 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3593 }, 136 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5360 }, 137 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5362 }, 138 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_1 }, 139 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_2 }, 140 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_3 }, 141 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_4 }, 142 { PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_5 }, 143 }; 144 145 int 146 ral_pci_match(device_t parent, cfdata_t cfdata, 147 void *aux) 148 { 149 struct pci_attach_args *pa = aux; 150 151 for (size_t i = 0; i < __arraycount(ral_pci_devices); i++) { 152 const struct ral_pci_matchid *ral = &ral_pci_devices[i]; 153 if (PCI_VENDOR(pa->pa_id) == ral->ral_vendor && 154 PCI_PRODUCT(pa->pa_id) == ral->ral_product) 155 return 1; 156 } 157 158 return 0; 159 } 160 161 void 162 ral_pci_attach(device_t parent, device_t self, void *aux) 163 { 164 struct ral_pci_softc *psc = device_private(self); 165 struct rt2560_softc *sc = &psc->sc_sc; 166 const struct pci_attach_args *pa = aux; 167 const char *intrstr; 168 bus_addr_t base; 169 pci_intr_handle_t ih; 170 pcireg_t memtype, reg; 171 int error; 172 char intrbuf[PCI_INTRSTR_LEN]; 173 174 pci_aprint_devinfo(pa, NULL); 175 176 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) { 177 switch (PCI_PRODUCT(pa->pa_id)) { 178 case PCI_PRODUCT_RALINK_RT2560: 179 psc->sc_opns = &ral_rt2560_opns; 180 break; 181 case PCI_PRODUCT_RALINK_RT2561: 182 case PCI_PRODUCT_RALINK_RT2561S: 183 case PCI_PRODUCT_RALINK_RT2661: 184 psc->sc_opns = &ral_rt2661_opns; 185 break; 186 default: 187 psc->sc_opns = &ral_rt2860_opns; 188 break; 189 } 190 } else { 191 /* all other vendors are RT2860 only */ 192 psc->sc_opns = &ral_rt2860_opns; 193 } 194 195 sc->sc_dev = self; 196 sc->sc_dmat = pa->pa_dmat; 197 psc->sc_pc = pa->pa_pc; 198 199 /* enable the appropriate bits in the PCI CSR */ 200 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 201 reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE; 202 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 203 204 /* map control/status registers */ 205 memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RAL_PCI_BAR0); 206 error = pci_mapreg_map(pa, RAL_PCI_BAR0, memtype, 0, &sc->sc_st, 207 &sc->sc_sh, &base, &psc->sc_mapsize); 208 209 if (error != 0) { 210 aprint_error(": could not map memory space\n"); 211 return; 212 } 213 214 if (pci_intr_map(pa, &ih) != 0) { 215 aprint_error(": could not map interrupt\n"); 216 return; 217 } 218 219 intrstr = pci_intr_string(psc->sc_pc, ih, intrbuf, sizeof(intrbuf)); 220 psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET, 221 psc->sc_opns->intr, sc); 222 223 if (psc->sc_ih == NULL) { 224 aprint_error(": could not establish interrupt"); 225 if (intrstr != NULL) 226 aprint_error(" at %s", intrstr); 227 aprint_error("\n"); 228 return; 229 } 230 aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 231 232 (*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id)); 233 } 234 235 int 236 ral_pci_detach(device_t self, int flags) 237 { 238 struct ral_pci_softc *psc = device_private(self); 239 struct rt2560_softc *sc = &psc->sc_sc; 240 int error; 241 242 if (psc->sc_ih != NULL) { 243 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 244 245 error = (*psc->sc_opns->detach)(sc); 246 if (error != 0) 247 return error; 248 } 249 250 if (psc->sc_mapsize > 0) 251 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize); 252 253 return 0; 254 } 255