xref: /netbsd-src/sys/dev/pci/genfb_pci.c (revision a536ee5124e62c9a0051a252f7833dc8f50f44c9)
1 /*	$NetBSD: genfb_pci.c,v 1.34 2012/03/13 18:40:31 elad Exp $ */
2 
3 /*-
4  * Copyright (c) 2007 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: genfb_pci.c,v 1.34 2012/03/13 18:40:31 elad Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/device.h>
36 #include <sys/proc.h>
37 #include <sys/mutex.h>
38 #include <sys/ioctl.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/kauth.h>
42 
43 #include <dev/pci/pcidevs.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pciio.h>
47 
48 #include <dev/wsfb/genfbvar.h>
49 #include <dev/pci/wsdisplay_pci.h>
50 
51 #include <dev/pci/genfb_pcivar.h>
52 
53 #include "opt_wsfb.h"
54 #include "opt_genfb.h"
55 
56 #ifdef GENFB_PCI_DEBUG
57 # define DPRINTF printf
58 #else
59 # define DPRINTF while (0) printf
60 #endif
61 
62 static int	pci_genfb_match(device_t, cfdata_t, void *);
63 static void	pci_genfb_attach(device_t, device_t, void *);
64 static int	pci_genfb_ioctl(void *, void *, u_long, void *, int,
65 		    struct lwp *);
66 static paddr_t	pci_genfb_mmap(void *, void *, off_t, int);
67 static int	pci_genfb_borrow(void *, bus_addr_t, bus_space_handle_t *);
68 static int	pci_genfb_drm_print(void *, const char *);
69 static bool	pci_genfb_shutdown(device_t, int);
70 
71 CFATTACH_DECL_NEW(genfb_pci, sizeof(struct pci_genfb_softc),
72     pci_genfb_match, pci_genfb_attach, NULL, NULL);
73 
74 static int
75 pci_genfb_match(device_t parent, cfdata_t match, void *aux)
76 {
77 	struct pci_attach_args *pa = aux;
78 	int matchlvl = 1;
79 
80 	if (!genfb_is_enabled())
81 		return 0;	/* explicitly disabled by MD code */
82 
83 	if (genfb_is_console())
84 		matchlvl = 5;	/* beat VGA */
85 
86 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
87 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_CONTROL)
88 		return matchlvl;
89 
90 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY)
91 		return matchlvl;
92 
93 	return 0;
94 }
95 
96 static void
97 pci_genfb_attach(device_t parent, device_t self, void *aux)
98 {
99 	struct pci_genfb_softc *sc = device_private(self);
100 	struct pci_attach_args *pa = aux;
101 	struct genfb_ops ops;
102 	pcireg_t rom;
103 	int idx, bar, type;
104 
105 	pci_aprint_devinfo(pa, NULL);
106 
107 	sc->sc_gen.sc_dev = self;
108 	sc->sc_memt = pa->pa_memt;
109 	sc->sc_iot = pa->pa_iot;
110 	sc->sc_pc = pa->pa_pc;
111 	sc->sc_pcitag = pa->pa_tag;
112 	sc->sc_want_wsfb = 0;
113 
114 	genfb_init(&sc->sc_gen);
115 
116 	/* firmware / MD code responsible for restoring the display */
117 	if (sc->sc_gen.sc_pmfcb == NULL)
118 		pmf_device_register1(self, NULL, NULL,
119 		    pci_genfb_shutdown);
120 	else
121 		pmf_device_register1(self,
122 		    sc->sc_gen.sc_pmfcb->gpc_suspend,
123 		    sc->sc_gen.sc_pmfcb->gpc_resume,
124 		    pci_genfb_shutdown);
125 
126 	if ((sc->sc_gen.sc_width == 0) || (sc->sc_gen.sc_fbsize == 0)) {
127 		aprint_debug_dev(self, "not configured by firmware\n");
128 		return;
129 	}
130 
131 	/*
132 	 * if some MD code handed us a framebuffer VA we use that instead of
133 	 * mapping our own
134 	 */
135 	if (sc->sc_gen.sc_fbaddr == NULL) {
136 		if (bus_space_map(sc->sc_memt, sc->sc_gen.sc_fboffset,
137 		    sc->sc_gen.sc_fbsize,
138 		    BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE,
139 		    &sc->sc_memh) != 0) {
140 			aprint_error_dev(self, "unable to map the framebuffer\n");
141 			return;
142 		}
143 		sc->sc_gen.sc_fbaddr = bus_space_vaddr(sc->sc_memt, sc->sc_memh);
144 	} else
145 		aprint_debug("%s: recycling existing fb mapping at %lx\n",
146 		    device_xname(sc->sc_gen.sc_dev), (unsigned long)sc->sc_gen.sc_fbaddr);
147 
148 	/* mmap()able bus ranges */
149 	idx = 0;
150 	bar = PCI_MAPREG_START;
151 	while (bar <= PCI_MAPREG_ROM) {
152 
153 		sc->sc_bars[(bar - PCI_MAPREG_START) >> 2] = rom =
154 		    pci_conf_read(sc->sc_pc, sc->sc_pcitag, bar);
155 
156 		if ((bar >= PCI_MAPREG_END && bar < PCI_MAPREG_ROM) ||
157 		    pci_mapreg_probe(sc->sc_pc, sc->sc_pcitag, bar, &type)
158 		    == 0) {
159 			/* skip unimplemented and non-BAR registers */
160 			bar += 4;
161 			continue;
162 		}
163 		if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_MEM ||
164 		    PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_ROM) {
165 			pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar, type,
166 			    &sc->sc_ranges[idx].offset,
167 			    &sc->sc_ranges[idx].size,
168 			    &sc->sc_ranges[idx].flags);
169 			idx++;
170 		}
171 		if ((bar == PCI_MAPREG_ROM) && (rom != 0)) {
172 			pci_conf_write(sc->sc_pc, sc->sc_pcitag, bar, rom |
173 			    PCI_MAPREG_ROM_ENABLE);
174 		}
175 		if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_MEM &&
176 		    PCI_MAPREG_MEM_TYPE(type) == PCI_MAPREG_MEM_TYPE_64BIT)
177 			bar += 8;
178 		else
179 			bar += 4;
180 	}
181 
182 	sc->sc_ranges_used = idx;
183 
184 	ops.genfb_ioctl = pci_genfb_ioctl;
185 	ops.genfb_mmap = pci_genfb_mmap;
186 	ops.genfb_borrow = pci_genfb_borrow;
187 
188 	if (genfb_attach(&sc->sc_gen, &ops) == 0) {
189 
190 		/* now try to attach a DRM */
191 		config_found_ia(self, "drm", aux, pci_genfb_drm_print);
192 	}
193 }
194 
195 static int
196 pci_genfb_drm_print(void *aux, const char *pnp)
197 {
198 	if (pnp)
199 		aprint_normal("drm at %s", pnp);
200 	return (UNCONF);
201 }
202 
203 
204 static int
205 pci_genfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
206     struct lwp *l)
207 {
208 	struct pci_genfb_softc *sc = v;
209 
210 	switch (cmd) {
211 	case WSDISPLAYIO_GTYPE:
212 		*(u_int *)data = WSDISPLAY_TYPE_PCIMISC;
213 		return 0;
214 
215 	/* PCI config read/write passthrough. */
216 	case PCI_IOC_CFGREAD:
217 	case PCI_IOC_CFGWRITE:
218 		return pci_devioctl(sc->sc_pc, sc->sc_pcitag,
219 		    cmd, data, flag, l);
220 
221 	case WSDISPLAYIO_GET_BUSID:
222 		return wsdisplayio_busid_pci(sc->sc_gen.sc_dev, sc->sc_pc,
223 		    sc->sc_pcitag, data);
224 
225 	case WSDISPLAYIO_SMODE: {
226 		int new_mode = *(int*)data, i;
227 		if (new_mode == WSDISPLAYIO_MODE_EMUL) {
228 			for (i = 0; i < 9; i++)
229 				pci_conf_write(sc->sc_pc,
230 				     sc->sc_pcitag,
231 				     0x10 + (i << 2),
232 				     sc->sc_bars[i]);
233 		}
234 		}
235 		return 0;
236 	}
237 
238 	return EPASSTHROUGH;
239 }
240 
241 static paddr_t
242 pci_genfb_mmap(void *v, void *vs, off_t offset, int prot)
243 {
244 	struct pci_genfb_softc *sc = v;
245 	struct range *r;
246 	int i;
247 
248 	if (offset == 0)
249 		sc->sc_want_wsfb = 1;
250 
251 	/*
252 	 * regular fb mapping at 0
253 	 * since some Sun firmware likes to put PCI resources low enough
254 	 * to collide with the wsfb mapping we only allow it after asking
255 	 * for offset 0
256 	 */
257 	DPRINTF("%s: %08x limit %08x\n", __func__, (uint32_t)offset,
258 	    (uint32_t)sc->sc_gen.sc_fbsize);
259 	if ((offset >= 0) && (offset < sc->sc_gen.sc_fbsize) &&
260 	    (sc->sc_want_wsfb == 1)) {
261 
262 		return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset,
263 		   offset, prot,
264 		   BUS_SPACE_MAP_LINEAR | BUS_SPACE_MAP_PREFETCHABLE);
265 	}
266 
267 	/*
268 	 * restrict all other mappings to processes with superuser privileges
269 	 * or the kernel itself
270 	 */
271 	if (kauth_authorize_machdep(kauth_cred_get(), KAUTH_MACHDEP_UNMANAGEDMEM,
272 	    NULL, NULL, NULL, NULL) != 0) {
273 		aprint_normal_dev(sc->sc_gen.sc_dev, "mmap() rejected.\n");
274 		return -1;
275 	}
276 
277 #ifdef WSFB_FAKE_VGA_FB
278 	if ((offset >= 0xa0000) && (offset < 0xbffff)) {
279 
280 		return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset,
281 		   offset - 0xa0000, prot, BUS_SPACE_MAP_LINEAR);
282 	}
283 #endif
284 
285 	/*
286 	 * XXX this should be generalized, let's just
287 	 * #define PCI_IOAREA_PADDR
288 	 * #define PCI_IOAREA_OFFSET
289 	 * #define PCI_IOAREA_SIZE
290 	 * somewhere in a MD header and compile this code only if all are
291 	 * present
292 	 */
293 	/*
294 	 * no.
295 	 * PCI_IOAREA_PADDR would be completely, utterly wrong and completely
296 	 * useless for the following reasons:
297 	 * - it's a bus address, not a physical address
298 	 * - there's no guarantee it's the same for each host bridge
299 	 * - it's already taken care of by the IO tag
300 	 * PCI_IOAREA_OFFSET is the same as PCI_MAGIC_IO_RANGE
301 	 * PCI_IOAREA_SIZE is also useless:
302 	 * - many cards don't decode more than 16 bit IO anyway
303 	 * - even machines with more than 64kB IO space try to keep everything
304 	 *   within 64kB for the reason above
305 	 * - IO ranges tend to be small so in most cases you can't cram enough
306 	 *   cards into a single machine to exhaust 64kB IO space
307 	 * - machines which need this tend to prefer memory space anyway
308 	 * - the only use for this right now is to allow the Xserver to map
309 	 *   VGA registers on macppc and a few other powerpc ports, shark uses
310 	 *   a similar mechanism, and what they need is always within 64kB
311 	 */
312 #ifdef PCI_MAGIC_IO_RANGE
313 	/* allow to map our IO space */
314 	if ((offset >= PCI_MAGIC_IO_RANGE) &&
315 	    (offset < PCI_MAGIC_IO_RANGE + 0x10000)) {
316 		return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
317 		    0, prot, BUS_SPACE_MAP_LINEAR);
318 	}
319 #endif
320 
321 	/* allow to mmap() our BARs */
322 	/* maybe the ROM BAR too? */
323 	for (i = 0; i < sc->sc_ranges_used; i++) {
324 
325 		r = &sc->sc_ranges[i];
326 		if ((offset >= r->offset) && (offset < (r->offset + r->size))) {
327 			return bus_space_mmap(sc->sc_memt, offset, 0, prot,
328 			    r->flags);
329 		}
330 	}
331 
332 	return -1;
333 }
334 
335 int
336 pci_genfb_borrow(void *opaque, bus_addr_t addr, bus_space_handle_t *hdlp)
337 {
338 	struct pci_genfb_softc *sc = opaque;
339 
340 	if (sc == NULL)
341 		return 0;
342 	if (!sc->sc_gen.sc_fboffset)
343 		return 0;
344 	if (sc->sc_gen.sc_fboffset != addr)
345 		return 0;
346 	*hdlp = sc->sc_memh;
347 	return 1;
348 }
349 
350 static bool
351 pci_genfb_shutdown(device_t self, int flags)
352 {
353 	genfb_enable_polling(self);
354 	return true;
355 }
356