1 /* $NetBSD: cac_pci.c,v 1.35 2016/09/27 03:33:32 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * PCI front-end for cac(4) driver. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: cac_pci.c,v 1.35 2016/09/27 03:33:32 pgoyette Exp $"); 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/device.h> 43 #include <sys/queue.h> 44 #include <sys/module.h> 45 46 #include <machine/endian.h> 47 #include <sys/bus.h> 48 49 #include <dev/pci/pcidevs.h> 50 #include <dev/pci/pcivar.h> 51 52 #include <dev/ic/cacreg.h> 53 #include <dev/ic/cacvar.h> 54 55 #include "ioconf.h" 56 57 static struct cac_ccb *cac_pci_l0_completed(struct cac_softc *); 58 static int cac_pci_l0_fifo_full(struct cac_softc *); 59 static void cac_pci_l0_intr_enable(struct cac_softc *, int); 60 static int cac_pci_l0_intr_pending(struct cac_softc *); 61 static void cac_pci_l0_submit(struct cac_softc *, struct cac_ccb *); 62 63 static const struct cac_linkage cac_pci_l0 = { 64 cac_pci_l0_completed, 65 cac_pci_l0_fifo_full, 66 cac_pci_l0_intr_enable, 67 cac_pci_l0_intr_pending, 68 cac_pci_l0_submit 69 }; 70 71 #define CT_STARTFW 0x01 /* Need to start controller firmware */ 72 73 static struct cac_pci_type { 74 int ct_subsysid; 75 int ct_flags; 76 const struct cac_linkage *ct_linkage; 77 const char *ct_typestr; 78 } const cac_pci_type[] = { 79 { 0x40300e11, 0, &cac_l0, "SMART-2/P" }, 80 { 0x40310e11, 0, &cac_l0, "SMART-2SL" }, 81 { 0x40320e11, 0, &cac_l0, "Smart Array 3200" }, 82 { 0x40330e11, 0, &cac_l0, "Smart Array 3100ES" }, 83 { 0x40340e11, 0, &cac_l0, "Smart Array 221" }, 84 { 0x40400e11, CT_STARTFW, &cac_pci_l0, "Integrated Array" }, 85 { 0x40480e11, CT_STARTFW, &cac_pci_l0, "RAID LC2" }, 86 { 0x40500e11, 0, &cac_pci_l0, "Smart Array 4200" }, 87 { 0x40510e11, 0, &cac_pci_l0, "Smart Array 4200ES" }, 88 { 0x40580e11, 0, &cac_pci_l0, "Smart Array 431" }, 89 }; 90 91 static struct cac_pci_product { 92 u_short cp_vendor; 93 u_short cp_product; 94 } const cac_pci_product[] = { 95 { PCI_VENDOR_COMPAQ, PCI_PRODUCT_COMPAQ_SMART2P }, 96 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21554 }, 97 { PCI_VENDOR_SYMBIOS, PCI_PRODUCT_SYMBIOS_1510 }, 98 }; 99 100 static const struct cac_pci_type * 101 cac_pci_findtype(struct pci_attach_args *pa) 102 { 103 const struct cac_pci_type *ct; 104 const struct cac_pci_product *cp; 105 pcireg_t subsysid; 106 int i; 107 108 cp = cac_pci_product; 109 i = 0; 110 while (i < sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) { 111 if (PCI_VENDOR(pa->pa_id) == cp->cp_vendor && 112 PCI_PRODUCT(pa->pa_id) == cp->cp_product) 113 break; 114 cp++; 115 i++; 116 } 117 if (i == sizeof(cac_pci_product) / sizeof(cac_pci_product[0])) 118 return (NULL); 119 120 subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 121 ct = cac_pci_type; 122 i = 0; 123 while (i < sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) { 124 if (subsysid == ct->ct_subsysid) 125 break; 126 ct++; 127 i++; 128 } 129 if (i == sizeof(cac_pci_type) / sizeof(cac_pci_type[0])) 130 return (NULL); 131 132 return (ct); 133 } 134 135 static int 136 cac_pci_match(device_t parent, cfdata_t match, void *aux) 137 { 138 139 return (cac_pci_findtype(aux) != NULL); 140 } 141 142 static void 143 cac_pci_attach(device_t parent, device_t self, void *aux) 144 { 145 struct pci_attach_args *pa; 146 const struct cac_pci_type *ct; 147 struct cac_softc *sc; 148 pci_chipset_tag_t pc; 149 pci_intr_handle_t ih; 150 const char *intrstr; 151 pcireg_t reg; 152 int memr, ior, i; 153 char intrbuf[PCI_INTRSTR_LEN]; 154 155 aprint_naive(": RAID controller\n"); 156 157 sc = device_private(self); 158 sc->sc_dev = self; 159 pa = (struct pci_attach_args *)aux; 160 pc = pa->pa_pc; 161 ct = cac_pci_findtype(pa); 162 163 /* 164 * Map the PCI register window. 165 */ 166 memr = -1; 167 ior = -1; 168 169 for (i = 0x10; i <= 0x14; i += 4) { 170 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, i); 171 172 if (PCI_MAPREG_TYPE(reg) == PCI_MAPREG_TYPE_IO) { 173 if (ior == -1 && PCI_MAPREG_IO_SIZE(reg) != 0) 174 ior = i; 175 } else { 176 if (memr == -1 && PCI_MAPREG_MEM_SIZE(reg) != 0) 177 memr = i; 178 } 179 } 180 181 if (memr != -1) { 182 if (pci_mapreg_map(pa, memr, PCI_MAPREG_TYPE_MEM, 0, 183 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 184 memr = -1; 185 else 186 ior = -1; 187 } 188 if (ior != -1) 189 if (pci_mapreg_map(pa, ior, PCI_MAPREG_TYPE_IO, 0, 190 &sc->sc_iot, &sc->sc_ioh, NULL, NULL)) 191 ior = -1; 192 if (memr == -1 && ior == -1) { 193 aprint_error_dev(self, "can't map i/o or memory space\n"); 194 return; 195 } 196 197 sc->sc_dmat = pa->pa_dmat; 198 199 /* Enable the device. */ 200 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 201 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 202 reg | PCI_COMMAND_MASTER_ENABLE); 203 204 /* Map and establish the interrupt. */ 205 if (pci_intr_map(pa, &ih)) { 206 aprint_error("can't map interrupt\n"); 207 return; 208 } 209 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf)); 210 sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, cac_intr, sc); 211 if (sc->sc_ih == NULL) { 212 aprint_error("can't establish interrupt"); 213 if (intrstr != NULL) 214 aprint_error(" at %s", intrstr); 215 aprint_error("\n"); 216 return; 217 } 218 219 aprint_normal(": Compaq %s\n", ct->ct_typestr); 220 221 /* Now attach to the bus-independent code. */ 222 memcpy(&sc->sc_cl, ct->ct_linkage, sizeof(sc->sc_cl)); 223 cac_init(sc, intrstr, (ct->ct_flags & CT_STARTFW) != 0); 224 } 225 226 CFATTACH_DECL3_NEW(cac_pci, sizeof(struct cac_softc), 227 cac_pci_match, cac_pci_attach, NULL, NULL, cac_rescan, NULL, 0); 228 229 static void 230 cac_pci_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 231 { 232 233 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 234 (char *)ccb - (char *)sc->sc_ccbs, 235 sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 236 cac_outl(sc, CAC_42REG_CMD_FIFO, ccb->ccb_paddr); 237 } 238 239 static struct cac_ccb * 240 cac_pci_l0_completed(struct cac_softc *sc) 241 { 242 struct cac_ccb *ccb; 243 u_int32_t off; 244 245 if ((off = cac_inl(sc, CAC_42REG_DONE_FIFO)) == 0xffffffffU) 246 return (NULL); 247 248 cac_outl(sc, CAC_42REG_DONE_FIFO, 0); 249 250 if ((off & 3) != 0) 251 printf("%s: failed command list returned: %lx\n", 252 device_xname(sc->sc_dev), (long)off); 253 254 off = (off & ~3) - sc->sc_ccbs_paddr; 255 ccb = (struct cac_ccb *)((char *)sc->sc_ccbs + off); 256 257 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb), 258 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 259 260 if ((off & 3) != 0 && ccb->ccb_req.error == 0) 261 ccb->ccb_req.error = CAC_RET_CMD_REJECTED; 262 263 return (ccb); 264 } 265 266 static int 267 cac_pci_l0_intr_pending(struct cac_softc *sc) 268 { 269 270 return ((cac_inl(sc, CAC_42REG_STATUS) & CAC_42_EXTINT) != 0); 271 } 272 273 static void 274 cac_pci_l0_intr_enable(struct cac_softc *sc, int state) 275 { 276 277 cac_outl(sc, CAC_42REG_INTR_MASK, (state ? 0 : 8)); /* XXX */ 278 } 279 280 static int 281 cac_pci_l0_fifo_full(struct cac_softc *sc) 282 { 283 284 return (cac_inl(sc, CAC_42REG_CMD_FIFO) != 0); 285 } 286 287 MODULE(MODULE_CLASS_DRIVER, cac_pci, "cac,pci"); 288 289 #ifdef _MODULE 290 /* 291 * XXX Don't allow ioconf.c to redefine the "struct cfdriver ld_cd" 292 * XXX it will be defined in the common-code module 293 */ 294 #undef CFDRIVER_DECL 295 #define CFDRIVER_DECL(name, class, attr) 296 #include "ioconf.c" 297 #endif 298 299 static int 300 cac_pci_modcmd(modcmd_t cmd, void *opaque) 301 { 302 int error = 0; 303 304 #ifdef _MODULE 305 switch (cmd) { 306 case MODULE_CMD_INIT: 307 /* 308 * We skip over the first entry in cfdriver[] array 309 * since the cfdriver is attached by the common 310 * (non-attachment-specific) code. 311 */ 312 error = config_init_component(&cfdriver_ioconf_cac_pci[1], 313 cfattach_ioconf_cac_pci, cfdata_ioconf_cac_pci); 314 break; 315 case MODULE_CMD_FINI: 316 error = config_fini_component(&cfdriver_ioconf_cac_pci[1], 317 cfattach_ioconf_cac_pci, cfdata_ioconf_cac_pci); 318 break; 319 default: 320 error = ENOTTY; 321 break; 322 } 323 #endif 324 325 return error; 326 } 327