1*e30fb1abSahoka /* $NetBSD: nand_micron.c,v 1.8 2012/11/03 12:12:48 ahoka Exp $ */
29cc6428eSrmind
314ce4eccSahoka /*-
414ce4eccSahoka * Copyright (c) 2011 Department of Software Engineering,
514ce4eccSahoka * University of Szeged, Hungary
614ce4eccSahoka * Copyright (c) 2011 Adam Hoka <ahoka@NetBSD.org>
714ce4eccSahoka * All rights reserved.
814ce4eccSahoka *
914ce4eccSahoka * This code is derived from software contributed to The NetBSD Foundation
1014ce4eccSahoka * by the Department of Software Engineering, University of Szeged, Hungary
1114ce4eccSahoka *
1214ce4eccSahoka * Redistribution and use in source and binary forms, with or without
1314ce4eccSahoka * modification, are permitted provided that the following conditions
1414ce4eccSahoka * are met:
1514ce4eccSahoka * 1. Redistributions of source code must retain the above copyright
1614ce4eccSahoka * notice, this list of conditions and the following disclaimer.
1714ce4eccSahoka * 2. Redistributions in binary form must reproduce the above copyright
1814ce4eccSahoka * notice, this list of conditions and the following disclaimer in the
1914ce4eccSahoka * documentation and/or other materials provided with the distribution.
2014ce4eccSahoka *
2114ce4eccSahoka * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
2214ce4eccSahoka * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
2314ce4eccSahoka * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
2414ce4eccSahoka * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2514ce4eccSahoka * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
2614ce4eccSahoka * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2714ce4eccSahoka * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
2814ce4eccSahoka * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
2914ce4eccSahoka * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3014ce4eccSahoka * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3114ce4eccSahoka * SUCH DAMAGE.
3214ce4eccSahoka */
3314ce4eccSahoka
3414ce4eccSahoka /*
3514ce4eccSahoka * Device specific functions for legacy Micron NAND chips
3614ce4eccSahoka *
3714ce4eccSahoka * Currently supported:
3814ce4eccSahoka * MT29F2G08AACWP, MT29F4G08BACWP, MT29F8G08FACWP
3914ce4eccSahoka */
4014ce4eccSahoka
419cc6428eSrmind #include <sys/cdefs.h>
42*e30fb1abSahoka __KERNEL_RCSID(0, "$NetBSD: nand_micron.c,v 1.8 2012/11/03 12:12:48 ahoka Exp $");
439cc6428eSrmind
4414ce4eccSahoka #include "nand.h"
4514ce4eccSahoka #include "onfi.h"
4614ce4eccSahoka
47c1a67845Scliff #define MT29F2G08AAC 0xda
48c1a67845Scliff #define MT29F2G08ABC 0xaa
49c1a67845Scliff #define MT29F2G16AAC 0xca
50c1a67845Scliff #define MT29F2G16ABC 0xba
51c1a67845Scliff #define MT29F4G08BAC 0xdc
52c1a67845Scliff #define MT29F8G08FAC 0xdc /* each 4GB section */
53c1a67845Scliff
54c1a67845Scliff #define MT29FxG_PARAM_WIDTH(p) (((p) >> 1) & __BIT(0))
55c1a67845Scliff #define MT29FxG_PAGESIZE (2 * 1024)
56c1a67845Scliff #define MT29FxG_BLOCK_PAGES 64 /* pages per block */
57c1a67845Scliff #define MT29FxG_BLOCKSIZE (128 * 1024) /* not including spares */
58c1a67845Scliff #define MT29FxG_SPARESIZE 64
59c1a67845Scliff
60c1a67845Scliff struct nand_micron_devices {
61c1a67845Scliff const char *name;
62c1a67845Scliff uint8_t id;
63c1a67845Scliff uint8_t width; /* bus width */
64c1a67845Scliff u_int lun_blocks; /* number of blocks per LUN */
65c1a67845Scliff u_int num_luns; /* number LUNs */
66c1a67845Scliff };
67c1a67845Scliff
68c1a67845Scliff static const struct nand_micron_devices nand_micron_devices[] = {
69c1a67845Scliff { "MT29F2G08AAC", MT29F2G08AAC, 8, 2048, 1 },
70c1a67845Scliff { "MT29F2G08ABC", MT29F2G08ABC, 8, 2048, 1 },
71c1a67845Scliff { "MT29F2G16AAC", MT29F2G16AAC, 16, 2048, 1 },
72c1a67845Scliff { "MT29F2G16ABC", MT29F2G16ABC, 16, 2048, 1 },
73c1a67845Scliff { "MT29F4G08BAC", MT29F4G08BAC, 8, 4096, 1 },
74c1a67845Scliff #ifdef NOTYET
75c1a67845Scliff /* how do we recognize/match this? */
76c1a67845Scliff { "MT29F8G08FAC", MT29F8G08FAC, 8, 4096, 2 },
77c1a67845Scliff #endif
78c1a67845Scliff };
79c1a67845Scliff
80c1a67845Scliff static int mt29fxgx_parameters(device_t, struct nand_chip *, u_int8_t, uint8_t);
81c1a67845Scliff
82c1a67845Scliff static const struct nand_micron_devices *
nand_micron_device_lookup(u_int8_t id)83c1a67845Scliff nand_micron_device_lookup(u_int8_t id)
84c1a67845Scliff {
85c1a67845Scliff for (int i=0; i < __arraycount(nand_micron_devices); i++)
86c1a67845Scliff if (nand_micron_devices[i].id == id)
87c1a67845Scliff return &nand_micron_devices[i];
88c1a67845Scliff return NULL;
89c1a67845Scliff }
90c1a67845Scliff
9114ce4eccSahoka int
nand_read_parameters_micron(device_t self,struct nand_chip * const chip)92fb19d2b7Scliff nand_read_parameters_micron(device_t self, struct nand_chip * const chip)
9314ce4eccSahoka {
94c1a67845Scliff uint8_t mfgrid;
95c1a67845Scliff uint8_t devid;
96c1a67845Scliff uint8_t dontcare;
97c1a67845Scliff uint8_t params;
9814ce4eccSahoka
9914ce4eccSahoka KASSERT(chip->nc_manf_id == NAND_MFR_MICRON);
100c1a67845Scliff switch (chip->nc_manf_id) {
101c1a67845Scliff case NAND_MFR_MICRON:
102c1a67845Scliff break;
103c1a67845Scliff default:
104c1a67845Scliff return 1;
105c1a67845Scliff }
10614ce4eccSahoka
10714ce4eccSahoka nand_select(self, true);
10814ce4eccSahoka nand_command(self, ONFI_READ_ID);
10914ce4eccSahoka nand_address(self, 0x00);
11052682d39Sahoka nand_read_1(self, &mfgrid);
11152682d39Sahoka nand_read_1(self, &devid);
11252682d39Sahoka nand_read_1(self, &dontcare);
11352682d39Sahoka nand_read_1(self, ¶ms);
11414ce4eccSahoka nand_select(self, false);
11514ce4eccSahoka
116c1a67845Scliff KASSERT(chip->nc_manf_id == mfgrid);
117c1a67845Scliff
118c1a67845Scliff switch(devid) {
119c1a67845Scliff case MT29F2G08AAC:
120c1a67845Scliff case MT29F2G08ABC:
121c1a67845Scliff case MT29F2G16AAC:
122c1a67845Scliff case MT29F2G16ABC:
123c1a67845Scliff case MT29F4G08BAC:
124c1a67845Scliff return mt29fxgx_parameters(self, chip, devid, params);
12514ce4eccSahoka default:
126c1a67845Scliff aprint_error_dev(self, "unsupported device id %#x\n", devid);
127c1a67845Scliff return 1;
128c1a67845Scliff }
129c1a67845Scliff }
130c1a67845Scliff
131c1a67845Scliff static int
mt29fxgx_parameters(device_t self,struct nand_chip * const chip,u_int8_t devid,uint8_t params)132fb19d2b7Scliff mt29fxgx_parameters(device_t self, struct nand_chip * const chip,
133c1a67845Scliff u_int8_t devid, uint8_t params)
134c1a67845Scliff {
135c1a67845Scliff const struct nand_micron_devices *dp;
136c1a67845Scliff const char *vendor = "Micron";
137c1a67845Scliff
138c1a67845Scliff dp = nand_micron_device_lookup(devid);
139c1a67845Scliff if (dp == NULL) {
140c1a67845Scliff aprint_error_dev(self, "unknown device id %#x\n", devid);
14114ce4eccSahoka return 1;
14214ce4eccSahoka }
14314ce4eccSahoka
144c1a67845Scliff /*
145c1a67845Scliff * MT29FxGx params across models are the same
146c1a67845Scliff * except for luns, blocks per lun, and bus width
147c1a67845Scliff * (and voltage)
148c1a67845Scliff */
149c1a67845Scliff chip->nc_addr_cycles_column = 2; /* XXX */
150c1a67845Scliff chip->nc_addr_cycles_row = 3; /* XXX */
151c1a67845Scliff if (dp->width == 16)
152c1a67845Scliff chip->nc_flags |= NC_BUSWIDTH_16;
153c1a67845Scliff chip->nc_page_size = MT29FxG_PAGESIZE;
154c1a67845Scliff chip->nc_block_size = MT29FxG_BLOCK_PAGES * MT29FxG_PAGESIZE;
155c1a67845Scliff chip->nc_spare_size = MT29FxG_SPARESIZE;
156c1a67845Scliff chip->nc_lun_blocks = dp->lun_blocks;
157c1a67845Scliff chip->nc_num_luns = dp->num_luns;
158c1a67845Scliff chip->nc_size = MT29FxG_PAGESIZE * MT29FxG_BLOCK_PAGES *
159c1a67845Scliff dp->lun_blocks * dp->num_luns;
16014ce4eccSahoka
1613c5212aaSahoka aprint_normal_dev(self, "%s %s, size %" PRIu64 "MB\n",
162c1a67845Scliff vendor, dp->name, chip->nc_size >> 20);
16314ce4eccSahoka
16414ce4eccSahoka return 0;
16514ce4eccSahoka }
166