1 /* $NetBSD: nand.c,v 1.27 2017/11/13 17:36:39 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 Department of Software Engineering, 5 * University of Szeged, Hungary 6 * Copyright (c) 2010 Adam Hoka <ahoka@NetBSD.org> 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by the Department of Software Engineering, University of Szeged, Hungary 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 26 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 28 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 /* Common driver for NAND chips implementing the ONFI 2.2 specification */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: nand.c,v 1.27 2017/11/13 17:36:39 jmcneill Exp $"); 38 39 #include "locators.h" 40 41 #include <sys/param.h> 42 #include <sys/types.h> 43 #include <sys/device.h> 44 #include <sys/kmem.h> 45 #include <sys/atomic.h> 46 47 #include <dev/flash/flash.h> 48 #include <dev/flash/flash_io.h> 49 #include <dev/nand/nand.h> 50 #include <dev/nand/onfi.h> 51 #include <dev/nand/hamming.h> 52 #include <dev/nand/nand_bbt.h> 53 #include <dev/nand/nand_crc.h> 54 55 #include "opt_nand.h" 56 57 int nand_match(device_t, cfdata_t, void *); 58 void nand_attach(device_t, device_t, void *); 59 int nand_detach(device_t, int); 60 bool nand_shutdown(device_t, int); 61 62 int nand_print(void *, const char *); 63 64 static int nand_search(device_t, cfdata_t, const int *, void *); 65 static void nand_address_row(device_t, size_t); 66 static inline uint8_t nand_get_status(device_t); 67 static void nand_address_column(device_t, size_t, size_t); 68 static int nand_fill_chip_structure(device_t, struct nand_chip *); 69 static int nand_scan_media(device_t, struct nand_chip *); 70 static bool nand_check_wp(device_t); 71 72 CFATTACH_DECL_NEW(nand, sizeof(struct nand_softc), 73 nand_match, nand_attach, nand_detach, NULL); 74 75 #ifdef NAND_DEBUG 76 int nanddebug = NAND_DEBUG; 77 #endif 78 79 struct flash_interface nand_flash_if = { 80 .type = FLASH_TYPE_NAND, 81 82 .read = nand_flash_read, 83 .write = nand_flash_write, 84 .erase = nand_flash_erase, 85 .block_isbad = nand_flash_isbad, 86 .block_markbad = nand_flash_markbad, 87 88 .submit = nand_flash_submit 89 }; 90 91 const struct nand_manufacturer nand_mfrs[] = { 92 { NAND_MFR_AMD, "AMD" }, 93 { NAND_MFR_FUJITSU, "Fujitsu" }, 94 { NAND_MFR_RENESAS, "Renesas" }, 95 { NAND_MFR_STMICRO, "ST Micro" }, 96 { NAND_MFR_MICRON, "Micron" }, 97 { NAND_MFR_NATIONAL, "National" }, 98 { NAND_MFR_TOSHIBA, "Toshiba" }, 99 { NAND_MFR_HYNIX, "Hynix" }, 100 { NAND_MFR_SAMSUNG, "Samsung" }, 101 { NAND_MFR_UNKNOWN, "Unknown" } 102 }; 103 104 static const char * 105 nand_midtoname(int id) 106 { 107 int i; 108 109 for (i = 0; nand_mfrs[i].id != 0; i++) { 110 if (nand_mfrs[i].id == id) 111 return nand_mfrs[i].name; 112 } 113 114 KASSERT(nand_mfrs[i].id == 0); 115 116 return nand_mfrs[i].name; 117 } 118 119 /* ARGSUSED */ 120 int 121 nand_match(device_t parent, cfdata_t match, void *aux) 122 { 123 /* pseudo device, always attaches */ 124 return 1; 125 } 126 127 void 128 nand_attach(device_t parent, device_t self, void *aux) 129 { 130 struct nand_softc *sc = device_private(self); 131 struct nand_attach_args *naa = aux; 132 struct nand_chip *chip = &sc->sc_chip; 133 134 sc->sc_dev = self; 135 sc->controller_dev = parent; 136 sc->nand_if = naa->naa_nand_if; 137 138 aprint_naive("\n"); 139 140 if (nand_check_wp(self)) { 141 aprint_error("NAND chip is write protected!\n"); 142 return; 143 } 144 145 if (nand_scan_media(self, chip)) { 146 return; 147 } 148 149 nand_flash_if.erasesize = chip->nc_block_size; 150 nand_flash_if.page_size = chip->nc_page_size; 151 nand_flash_if.writesize = chip->nc_page_size; 152 153 /* allocate cache */ 154 chip->nc_oob_cache = kmem_alloc(chip->nc_spare_size, KM_SLEEP); 155 chip->nc_page_cache = kmem_alloc(chip->nc_page_size, KM_SLEEP); 156 157 mutex_init(&sc->sc_device_lock, MUTEX_DEFAULT, IPL_NONE); 158 159 if (flash_sync_thread_init(&sc->sc_flash_io, self, &nand_flash_if)) { 160 goto error; 161 } 162 163 if (!pmf_device_register1(sc->sc_dev, NULL, NULL, nand_shutdown)) 164 aprint_error_dev(sc->sc_dev, 165 "couldn't establish power handler\n"); 166 167 #ifdef NAND_BBT 168 nand_bbt_init(self); 169 nand_bbt_scan(self); 170 #endif 171 172 /* 173 * Attach all our devices 174 */ 175 config_search_ia(nand_search, self, NULL, NULL); 176 177 return; 178 error: 179 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 180 kmem_free(chip->nc_page_cache, chip->nc_page_size); 181 mutex_destroy(&sc->sc_device_lock); 182 } 183 184 static int 185 nand_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 186 { 187 struct nand_softc *sc = device_private(parent); 188 struct nand_chip *chip = &sc->sc_chip; 189 struct flash_attach_args faa; 190 191 if (cf->cf_loc[FLASHBUSCF_DYNAMIC] != 0) 192 return 0; 193 194 faa.flash_if = &nand_flash_if; 195 196 faa.partinfo.part_name = NULL; 197 faa.partinfo.part_offset = cf->cf_loc[FLASHBUSCF_OFFSET]; 198 199 if (cf->cf_loc[FLASHBUSCF_SIZE] == 0) { 200 faa.partinfo.part_size = chip->nc_size - 201 faa.partinfo.part_offset; 202 } else { 203 faa.partinfo.part_size = cf->cf_loc[FLASHBUSCF_SIZE]; 204 } 205 206 if (cf->cf_loc[FLASHBUSCF_READONLY]) 207 faa.partinfo.part_flags = FLASH_PART_READONLY; 208 else 209 faa.partinfo.part_flags = 0; 210 211 if (config_match(parent, cf, &faa)) { 212 if (config_attach(parent, cf, &faa, nand_print) != NULL) { 213 return 0; 214 } else { 215 return 1; 216 } 217 } 218 219 return 1; 220 } 221 222 void 223 nand_attach_mtdparts(device_t parent, const char *mtd_id, const char *cmdline) 224 { 225 struct nand_softc *sc = device_private(parent); 226 struct nand_chip *chip = &sc->sc_chip; 227 228 flash_attach_mtdparts(&nand_flash_if, parent, chip->nc_size, 229 mtd_id, cmdline); 230 } 231 232 int 233 nand_detach(device_t self, int flags) 234 { 235 struct nand_softc *sc = device_private(self); 236 struct nand_chip *chip = &sc->sc_chip; 237 int error = 0; 238 239 error = config_detach_children(self, flags); 240 if (error) { 241 return error; 242 } 243 244 flash_sync_thread_destroy(&sc->sc_flash_io); 245 #ifdef NAND_BBT 246 nand_bbt_detach(self); 247 #endif 248 /* free oob cache */ 249 kmem_free(chip->nc_oob_cache, chip->nc_spare_size); 250 kmem_free(chip->nc_page_cache, chip->nc_page_size); 251 kmem_free(chip->nc_ecc_cache, chip->nc_ecc->necc_size); 252 253 mutex_destroy(&sc->sc_device_lock); 254 255 pmf_device_deregister(sc->sc_dev); 256 257 return error; 258 } 259 260 int 261 nand_print(void *aux, const char *pnp) 262 { 263 if (pnp != NULL) 264 aprint_normal("nand at %s\n", pnp); 265 266 return UNCONF; 267 } 268 269 /* ask for a nand driver to attach to the controller */ 270 device_t 271 nand_attach_mi(struct nand_interface *nand_if, device_t parent) 272 { 273 struct nand_attach_args arg; 274 275 KASSERT(nand_if != NULL); 276 277 /* fill the defaults if we have null pointers */ 278 if (nand_if->program_page == NULL) { 279 nand_if->program_page = &nand_default_program_page; 280 } 281 282 if (nand_if->read_page == NULL) { 283 nand_if->read_page = &nand_default_read_page; 284 } 285 286 arg.naa_nand_if = nand_if; 287 return config_found_ia(parent, "nandbus", &arg, nand_print); 288 } 289 290 /* default everything to reasonable values, to ease future api changes */ 291 void 292 nand_init_interface(struct nand_interface *interface) 293 { 294 interface->select = &nand_default_select; 295 interface->command = NULL; 296 interface->address = NULL; 297 interface->read_buf_1 = NULL; 298 interface->read_buf_2 = NULL; 299 interface->read_1 = NULL; 300 interface->read_2 = NULL; 301 interface->write_buf_1 = NULL; 302 interface->write_buf_2 = NULL; 303 interface->write_1 = NULL; 304 interface->write_2 = NULL; 305 interface->busy = NULL; 306 307 /*- 308 * most drivers dont want to change this, but some implement 309 * read/program in one step 310 */ 311 interface->program_page = &nand_default_program_page; 312 interface->read_page = &nand_default_read_page; 313 314 /* default to soft ecc, that should work everywhere */ 315 interface->ecc_compute = &nand_default_ecc_compute; 316 interface->ecc_correct = &nand_default_ecc_correct; 317 interface->ecc_prepare = NULL; 318 interface->ecc.necc_code_size = 3; 319 interface->ecc.necc_block_size = 256; 320 interface->ecc.necc_type = NAND_ECC_TYPE_SW; 321 } 322 323 #if 0 324 /* handle quirks here */ 325 static void 326 nand_quirks(device_t self, struct nand_chip *chip) 327 { 328 /* this is an example only! */ 329 switch (chip->nc_manf_id) { 330 case NAND_MFR_SAMSUNG: 331 if (chip->nc_dev_id == 0x00) { 332 /* do something only samsung chips need */ 333 /* or */ 334 /* chip->nc_quirks |= NC_QUIRK_NO_READ_START */ 335 } 336 } 337 338 return; 339 } 340 #endif 341 342 static int 343 nand_fill_chip_structure_legacy(device_t self, struct nand_chip *chip) 344 { 345 switch (chip->nc_manf_id) { 346 case NAND_MFR_MICRON: 347 return nand_read_parameters_micron(self, chip); 348 case NAND_MFR_SAMSUNG: 349 return nand_read_parameters_samsung(self, chip); 350 case NAND_MFR_TOSHIBA: 351 return nand_read_parameters_toshiba(self, chip); 352 default: 353 return 1; 354 } 355 356 return 0; 357 } 358 359 /** 360 * scan media to determine the chip's properties 361 * this function resets the device 362 */ 363 static int 364 nand_scan_media(device_t self, struct nand_chip *chip) 365 { 366 struct nand_softc *sc = device_private(self); 367 struct nand_ecc *ecc; 368 uint8_t onfi_signature[4]; 369 370 nand_select(self, true); 371 nand_command(self, ONFI_RESET); 372 KASSERT(nand_get_status(self) & ONFI_STATUS_RDY); 373 nand_select(self, false); 374 375 /* check if the device implements the ONFI standard */ 376 nand_select(self, true); 377 nand_command(self, ONFI_READ_ID); 378 nand_address(self, 0x20); 379 nand_read_1(self, &onfi_signature[0]); 380 nand_read_1(self, &onfi_signature[1]); 381 nand_read_1(self, &onfi_signature[2]); 382 nand_read_1(self, &onfi_signature[3]); 383 nand_select(self, false); 384 385 #ifdef NAND_DEBUG 386 device_printf(self, "signature: %02x %02x %02x %02x\n", 387 onfi_signature[0], onfi_signature[1], 388 onfi_signature[2], onfi_signature[3]); 389 #endif 390 391 if (onfi_signature[0] != 'O' || onfi_signature[1] != 'N' || 392 onfi_signature[2] != 'F' || onfi_signature[3] != 'I') { 393 chip->nc_isonfi = false; 394 395 aprint_normal(": Legacy NAND Flash\n"); 396 397 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 398 399 if (nand_fill_chip_structure_legacy(self, chip)) { 400 aprint_error_dev(self, 401 "can't read device parameters for legacy chip\n"); 402 return 1; 403 } 404 } else { 405 chip->nc_isonfi = true; 406 407 aprint_normal(": ONFI NAND Flash\n"); 408 409 nand_read_id(self, &chip->nc_manf_id, &chip->nc_dev_id); 410 411 if (nand_fill_chip_structure(self, chip)) { 412 aprint_error_dev(self, 413 "can't read device parameters\n"); 414 return 1; 415 } 416 } 417 418 aprint_normal_dev(self, 419 "manufacturer id: 0x%.2x (%s), device id: 0x%.2x\n", 420 chip->nc_manf_id, 421 nand_midtoname(chip->nc_manf_id), 422 chip->nc_dev_id); 423 424 aprint_normal_dev(self, 425 "page size: %" PRIu32 " bytes, spare size: %" PRIu32 " bytes, " 426 "block size: %" PRIu32 " bytes\n", 427 chip->nc_page_size, chip->nc_spare_size, chip->nc_block_size); 428 429 aprint_normal_dev(self, 430 "LUN size: %" PRIu32 " blocks, LUNs: %" PRIu8 431 ", total storage size: %" PRIu64 " MB\n", 432 chip->nc_lun_blocks, chip->nc_num_luns, 433 chip->nc_size / 1024 / 1024); 434 435 aprint_normal_dev(self, "column cycles: %" PRIu8 ", row cycles: %" 436 PRIu8 ", width: %s\n", 437 chip->nc_addr_cycles_column, chip->nc_addr_cycles_row, 438 (chip->nc_flags & NC_BUSWIDTH_16) ? "x16" : "x8"); 439 440 ecc = chip->nc_ecc = &sc->nand_if->ecc; 441 442 /* 443 * calculate the place of ecc data in oob 444 * we try to be compatible with Linux here 445 */ 446 switch (chip->nc_spare_size) { 447 case 8: 448 ecc->necc_offset = 0; 449 break; 450 case 16: 451 ecc->necc_offset = 0; 452 break; 453 case 32: 454 ecc->necc_offset = 0; 455 break; 456 case 64: 457 ecc->necc_offset = 40; 458 break; 459 case 128: 460 ecc->necc_offset = 80; 461 break; 462 default: 463 panic("OOB size %" PRIu32 " is unexpected", chip->nc_spare_size); 464 } 465 466 ecc->necc_steps = chip->nc_page_size / ecc->necc_block_size; 467 ecc->necc_size = ecc->necc_steps * ecc->necc_code_size; 468 469 /* check if we fit in oob */ 470 if (ecc->necc_offset + ecc->necc_size > chip->nc_spare_size) { 471 panic("NAND ECC bits dont fit in OOB"); 472 } 473 474 /* TODO: mark free oob area available for file systems */ 475 476 chip->nc_ecc_cache = kmem_zalloc(ecc->necc_size, KM_SLEEP); 477 478 /* 479 * calculate badblock marker offset in oob 480 * we try to be compatible with linux here 481 */ 482 if (chip->nc_page_size > 512) 483 chip->nc_badmarker_offs = 0; 484 else 485 chip->nc_badmarker_offs = 5; 486 487 /* Calculate page shift and mask */ 488 chip->nc_page_shift = ffs(chip->nc_page_size) - 1; 489 chip->nc_page_mask = ~(chip->nc_page_size - 1); 490 /* same for block */ 491 chip->nc_block_shift = ffs(chip->nc_block_size) - 1; 492 chip->nc_block_mask = ~(chip->nc_block_size - 1); 493 494 /* look for quirks here if needed in future */ 495 /* nand_quirks(self, chip); */ 496 497 return 0; 498 } 499 500 void 501 nand_read_id(device_t self, uint8_t *manf, uint8_t *dev) 502 { 503 nand_select(self, true); 504 nand_command(self, ONFI_READ_ID); 505 nand_address(self, 0x00); 506 507 nand_read_1(self, manf); 508 nand_read_1(self, dev); 509 510 nand_select(self, false); 511 } 512 513 int 514 nand_read_parameter_page(device_t self, struct onfi_parameter_page *params) 515 { 516 uint8_t *bufp; 517 uint16_t crc; 518 int i;//, tries = 0; 519 520 KASSERT(sizeof(*params) == 256); 521 522 //read_params: 523 // tries++; 524 525 nand_select(self, true); 526 nand_command(self, ONFI_READ_PARAMETER_PAGE); 527 nand_address(self, 0x00); 528 529 nand_busy(self); 530 531 /* TODO check the signature if it contains at least 2 letters */ 532 533 bufp = (uint8_t *)params; 534 /* XXX why i am not using read_buf? */ 535 for (i = 0; i < 256; i++) { 536 nand_read_1(self, &bufp[i]); 537 } 538 nand_select(self, false); 539 540 /* validate the parameter page with the crc */ 541 crc = nand_crc16(bufp, 254); 542 543 if (crc != params->param_integrity_crc) { 544 aprint_error_dev(self, "parameter page crc check failed\n"); 545 /* TODO: we should read the next parameter page copy */ 546 return 1; 547 } 548 549 return 0; 550 } 551 552 static int 553 nand_fill_chip_structure(device_t self, struct nand_chip *chip) 554 { 555 struct onfi_parameter_page params; 556 uint8_t vendor[13], model[21]; 557 int i; 558 559 if (nand_read_parameter_page(self, ¶ms)) { 560 return 1; 561 } 562 563 /* strip manufacturer and model string */ 564 strlcpy(vendor, params.param_manufacturer, sizeof(vendor)); 565 for (i = 11; i > 0 && vendor[i] == ' '; i--) 566 vendor[i] = 0; 567 strlcpy(model, params.param_model, sizeof(model)); 568 for (i = 19; i > 0 && model[i] == ' '; i--) 569 model[i] = 0; 570 571 aprint_normal_dev(self, "vendor: %s, model: %s\n", vendor, model); 572 573 chip->nc_page_size = le32toh(params.param_pagesize); 574 chip->nc_block_size = 575 le32toh(params.param_blocksize) * chip->nc_page_size; 576 chip->nc_spare_size = le16toh(params.param_sparesize); 577 chip->nc_lun_blocks = le32toh(params.param_lunsize); 578 chip->nc_num_luns = params.param_numluns; 579 580 chip->nc_size = 581 chip->nc_block_size * chip->nc_lun_blocks * chip->nc_num_luns; 582 583 /* the lower 4 bits contain the row address cycles */ 584 chip->nc_addr_cycles_row = params.param_addr_cycles & 0x07; 585 /* the upper 4 bits contain the column address cycles */ 586 chip->nc_addr_cycles_column = (params.param_addr_cycles & ~0x07) >> 4; 587 588 uint16_t features = le16toh(params.param_features); 589 if (features & ONFI_FEATURE_16BIT) { 590 chip->nc_flags |= NC_BUSWIDTH_16; 591 } 592 593 if (features & ONFI_FEATURE_EXTENDED_PARAM) { 594 chip->nc_flags |= NC_EXTENDED_PARAM; 595 } 596 597 return 0; 598 } 599 600 /* ARGSUSED */ 601 bool 602 nand_shutdown(device_t self, int howto) 603 { 604 return true; 605 } 606 607 static void 608 nand_address_column(device_t self, size_t row, size_t column) 609 { 610 struct nand_softc *sc = device_private(self); 611 struct nand_chip *chip = &sc->sc_chip; 612 uint8_t i; 613 614 DPRINTF(("addressing row: 0x%jx column: %" PRIu32 "\n", 615 (uintmax_t )row, column)); 616 617 /* XXX TODO */ 618 row >>= chip->nc_page_shift; 619 620 /* Write the column (subpage) address */ 621 if (chip->nc_flags & NC_BUSWIDTH_16) 622 column >>= 1; 623 for (i = 0; i < chip->nc_addr_cycles_column; i++, column >>= 8) 624 nand_address(self, column & 0xff); 625 626 /* Write the row (page) address */ 627 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 628 nand_address(self, row & 0xff); 629 } 630 631 static void 632 nand_address_row(device_t self, size_t row) 633 { 634 struct nand_softc *sc = device_private(self); 635 struct nand_chip *chip = &sc->sc_chip; 636 int i; 637 638 /* XXX TODO */ 639 row >>= chip->nc_page_shift; 640 641 /* Write the row (page) address */ 642 for (i = 0; i < chip->nc_addr_cycles_row; i++, row >>= 8) 643 nand_address(self, row & 0xff); 644 } 645 646 static inline uint8_t 647 nand_get_status(device_t self) 648 { 649 uint8_t status; 650 651 nand_command(self, ONFI_READ_STATUS); 652 nand_busy(self); 653 nand_read_1(self, &status); 654 655 return status; 656 } 657 658 static bool 659 nand_check_wp(device_t self) 660 { 661 if (nand_get_status(self) & ONFI_STATUS_WP) 662 return false; 663 else 664 return true; 665 } 666 667 static void 668 nand_prepare_read(device_t self, flash_off_t row, flash_off_t column) 669 { 670 nand_command(self, ONFI_READ); 671 nand_address_column(self, row, column); 672 nand_command(self, ONFI_READ_START); 673 674 nand_busy(self); 675 } 676 677 /* read a page with ecc correction, default implementation */ 678 int 679 nand_default_read_page(device_t self, size_t offset, uint8_t *data) 680 { 681 struct nand_softc *sc = device_private(self); 682 struct nand_chip *chip = &sc->sc_chip; 683 size_t b, bs, e, cs; 684 uint8_t *ecc; 685 int result; 686 687 nand_prepare_read(self, offset, 0); 688 689 bs = chip->nc_ecc->necc_block_size; 690 cs = chip->nc_ecc->necc_code_size; 691 692 /* decide if we access by 8 or 16 bits */ 693 if (chip->nc_flags & NC_BUSWIDTH_16) { 694 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 695 nand_ecc_prepare(self, NAND_ECC_READ); 696 nand_read_buf_2(self, data + b, bs); 697 nand_ecc_compute(self, data + b, 698 chip->nc_ecc_cache + e); 699 } 700 } else { 701 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 702 nand_ecc_prepare(self, NAND_ECC_READ); 703 nand_read_buf_1(self, data + b, bs); 704 nand_ecc_compute(self, data + b, 705 chip->nc_ecc_cache + e); 706 } 707 } 708 709 /* for debugging new drivers */ 710 #if 0 711 nand_dump_data("page", data, chip->nc_page_size); 712 #endif 713 714 nand_read_oob(self, offset, chip->nc_oob_cache); 715 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 716 717 /* useful for debugging new ecc drivers */ 718 #if 0 719 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 720 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 721 printf("0x"); 722 for (b = 0; b < cs; b++) { 723 printf("%.2hhx", ecc[e+b]); 724 } 725 printf(" 0x"); 726 for (b = 0; b < cs; b++) { 727 printf("%.2hhx", chip->nc_ecc_cache[e+b]); 728 } 729 printf("\n"); 730 } 731 printf("--------------\n"); 732 #endif 733 734 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 735 result = nand_ecc_correct(self, data + b, ecc + e, 736 chip->nc_ecc_cache + e); 737 738 switch (result) { 739 case NAND_ECC_OK: 740 break; 741 case NAND_ECC_CORRECTED: 742 aprint_error_dev(self, 743 "data corrected with ECC at page offset 0x%jx " 744 "block %zu\n", (uintmax_t)offset, b); 745 break; 746 case NAND_ECC_TWOBIT: 747 aprint_error_dev(self, 748 "uncorrectable ECC error at page offset 0x%jx " 749 "block %zu\n", (uintmax_t)offset, b); 750 return EIO; 751 break; 752 case NAND_ECC_INVALID: 753 aprint_error_dev(self, 754 "invalid ECC in oob at page offset 0x%jx " 755 "block %zu\n", (uintmax_t)offset, b); 756 return EIO; 757 break; 758 default: 759 panic("invalid ECC correction errno"); 760 } 761 } 762 763 return 0; 764 } 765 766 int 767 nand_default_program_page(device_t self, size_t page, const uint8_t *data) 768 { 769 struct nand_softc *sc = device_private(self); 770 struct nand_chip *chip = &sc->sc_chip; 771 size_t bs, cs, e, b; 772 uint8_t status; 773 uint8_t *ecc; 774 775 nand_command(self, ONFI_PAGE_PROGRAM); 776 nand_address_column(self, page, 0); 777 778 nand_busy(self); 779 780 bs = chip->nc_ecc->necc_block_size; 781 cs = chip->nc_ecc->necc_code_size; 782 ecc = chip->nc_oob_cache + chip->nc_ecc->necc_offset; 783 784 /* XXX code duplication */ 785 /* decide if we access by 8 or 16 bits */ 786 if (chip->nc_flags & NC_BUSWIDTH_16) { 787 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 788 nand_ecc_prepare(self, NAND_ECC_WRITE); 789 nand_write_buf_2(self, data + b, bs); 790 nand_ecc_compute(self, data + b, ecc + e); 791 } 792 /* write oob with ecc correction code */ 793 nand_write_buf_2(self, chip->nc_oob_cache, 794 chip->nc_spare_size); 795 } else { 796 for (b = 0, e = 0; b < chip->nc_page_size; b += bs, e += cs) { 797 nand_ecc_prepare(self, NAND_ECC_WRITE); 798 nand_write_buf_1(self, data + b, bs); 799 nand_ecc_compute(self, data + b, ecc + e); 800 } 801 /* write oob with ecc correction code */ 802 nand_write_buf_1(self, chip->nc_oob_cache, 803 chip->nc_spare_size); 804 } 805 806 nand_command(self, ONFI_PAGE_PROGRAM_START); 807 808 nand_busy(self); 809 810 /* for debugging ecc */ 811 #if 0 812 printf("dumping ecc %d\n--------------\n", chip->nc_ecc->necc_steps); 813 for (e = 0; e < chip->nc_ecc->necc_steps; e++) { 814 printf("0x"); 815 for (b = 0; b < cs; b++) { 816 printf("%.2hhx", ecc[e+b]); 817 } 818 printf("\n"); 819 } 820 printf("--------------\n"); 821 #endif 822 823 status = nand_get_status(self); 824 KASSERT(status & ONFI_STATUS_RDY); 825 if (status & ONFI_STATUS_FAIL) { 826 aprint_error_dev(self, "page program failed!\n"); 827 return EIO; 828 } 829 830 return 0; 831 } 832 833 /* read the OOB of a page */ 834 int 835 nand_read_oob(device_t self, size_t page, uint8_t *oob) 836 { 837 struct nand_softc *sc = device_private(self); 838 struct nand_chip *chip = &sc->sc_chip; 839 840 nand_prepare_read(self, page, chip->nc_page_size); 841 842 if (chip->nc_flags & NC_BUSWIDTH_16) 843 nand_read_buf_2(self, oob, chip->nc_spare_size); 844 else 845 nand_read_buf_1(self, oob, chip->nc_spare_size); 846 847 /* for debugging drivers */ 848 #if 0 849 nand_dump_data("oob", oob, chip->nc_spare_size); 850 #endif 851 852 return 0; 853 } 854 855 static int 856 nand_write_oob(device_t self, size_t offset, const void *oob) 857 { 858 struct nand_softc *sc = device_private(self); 859 struct nand_chip *chip = &sc->sc_chip; 860 uint8_t status; 861 862 nand_command(self, ONFI_PAGE_PROGRAM); 863 nand_address_column(self, offset, chip->nc_page_size); 864 nand_command(self, ONFI_PAGE_PROGRAM_START); 865 866 nand_busy(self); 867 868 if (chip->nc_flags & NC_BUSWIDTH_16) 869 nand_write_buf_2(self, oob, chip->nc_spare_size); 870 else 871 nand_write_buf_1(self, oob, chip->nc_spare_size); 872 873 status = nand_get_status(self); 874 KASSERT(status & ONFI_STATUS_RDY); 875 if (status & ONFI_STATUS_FAIL) 876 return EIO; 877 else 878 return 0; 879 } 880 881 void 882 nand_markbad(device_t self, size_t offset) 883 { 884 struct nand_softc *sc = device_private(self); 885 struct nand_chip *chip = &sc->sc_chip; 886 flash_off_t blockoffset; 887 #ifdef NAND_BBT 888 flash_off_t block; 889 890 block = offset / chip->nc_block_size; 891 892 nand_bbt_block_markbad(self, block); 893 #endif 894 blockoffset = offset & chip->nc_block_mask; 895 896 /* check if it is already marked bad */ 897 if (nand_isbad(self, blockoffset)) 898 return; 899 900 nand_read_oob(self, blockoffset, chip->nc_oob_cache); 901 902 chip->nc_oob_cache[chip->nc_badmarker_offs] = 0x00; 903 chip->nc_oob_cache[chip->nc_badmarker_offs + 1] = 0x00; 904 905 nand_write_oob(self, blockoffset, chip->nc_oob_cache); 906 } 907 908 bool 909 nand_isfactorybad(device_t self, flash_off_t offset) 910 { 911 struct nand_softc *sc = device_private(self); 912 struct nand_chip *chip = &sc->sc_chip; 913 flash_off_t block, first_page, last_page, page; 914 int i; 915 916 /* Check for factory bad blocks first 917 * Factory bad blocks are marked in the first or last 918 * page of the blocks, see: ONFI 2.2, 3.2.2. 919 */ 920 block = offset / chip->nc_block_size; 921 first_page = block * chip->nc_block_size; 922 last_page = (block + 1) * chip->nc_block_size 923 - chip->nc_page_size; 924 925 for (i = 0, page = first_page; i < 2; i++, page = last_page) { 926 /* address OOB */ 927 nand_prepare_read(self, page, chip->nc_page_size); 928 929 if (chip->nc_flags & NC_BUSWIDTH_16) { 930 uint16_t word; 931 nand_read_2(self, &word); 932 if (word == 0x0000) 933 return true; 934 } else { 935 uint8_t byte; 936 nand_read_1(self, &byte); 937 if (byte == 0x00) 938 return true; 939 } 940 } 941 942 return false; 943 } 944 945 bool 946 nand_iswornoutbad(device_t self, flash_off_t offset) 947 { 948 struct nand_softc *sc = device_private(self); 949 struct nand_chip *chip = &sc->sc_chip; 950 flash_off_t block; 951 952 /* we inspect the first page of the block */ 953 block = offset & chip->nc_block_mask; 954 955 /* Linux/u-boot compatible badblock handling */ 956 if (chip->nc_flags & NC_BUSWIDTH_16) { 957 uint16_t word, mark; 958 959 nand_prepare_read(self, block, 960 chip->nc_page_size + (chip->nc_badmarker_offs & 0xfe)); 961 962 nand_read_2(self, &word); 963 mark = htole16(word); 964 if (chip->nc_badmarker_offs & 0x01) 965 mark >>= 8; 966 if ((mark & 0xff) != 0xff) 967 return true; 968 } else { 969 uint8_t byte; 970 971 nand_prepare_read(self, block, 972 chip->nc_page_size + chip->nc_badmarker_offs); 973 974 nand_read_1(self, &byte); 975 if (byte != 0xff) 976 return true; 977 } 978 979 return false; 980 } 981 982 bool 983 nand_isbad(device_t self, flash_off_t offset) 984 { 985 #ifdef NAND_BBT 986 struct nand_softc *sc = device_private(self); 987 struct nand_chip *chip = &sc->sc_chip; 988 flash_off_t block; 989 990 block = offset / chip->nc_block_size; 991 992 return nand_bbt_block_isbad(self, block); 993 #else 994 /* ONFI host requirement */ 995 if (nand_isfactorybad(self, offset)) 996 return true; 997 998 /* Look for Linux/U-Boot compatible bad marker */ 999 if (nand_iswornoutbad(self, offset)) 1000 return true; 1001 1002 return false; 1003 #endif 1004 } 1005 1006 int 1007 nand_erase_block(device_t self, size_t offset) 1008 { 1009 uint8_t status; 1010 1011 /* xxx calculate first page of block for address? */ 1012 1013 nand_command(self, ONFI_BLOCK_ERASE); 1014 nand_address_row(self, offset); 1015 nand_command(self, ONFI_BLOCK_ERASE_START); 1016 1017 nand_busy(self); 1018 1019 status = nand_get_status(self); 1020 KASSERT(status & ONFI_STATUS_RDY); 1021 if (status & ONFI_STATUS_FAIL) { 1022 aprint_error_dev(self, "block erase failed!\n"); 1023 nand_markbad(self, offset); 1024 return EIO; 1025 } else { 1026 return 0; 1027 } 1028 } 1029 1030 /* default functions for driver development */ 1031 1032 /* default ECC using hamming code of 256 byte chunks */ 1033 int 1034 nand_default_ecc_compute(device_t self, const uint8_t *data, uint8_t *code) 1035 { 1036 hamming_compute_256(data, code); 1037 1038 return 0; 1039 } 1040 1041 int 1042 nand_default_ecc_correct(device_t self, uint8_t *data, const uint8_t *origcode, 1043 const uint8_t *compcode) 1044 { 1045 return hamming_correct_256(data, origcode, compcode); 1046 } 1047 1048 void 1049 nand_default_select(device_t self, bool enable) 1050 { 1051 /* do nothing */ 1052 return; 1053 } 1054 1055 /* implementation of the block device API */ 1056 1057 int 1058 nand_flash_submit(device_t self, struct buf * const bp) 1059 { 1060 struct nand_softc *sc = device_private(self); 1061 1062 return flash_io_submit(&sc->sc_flash_io, bp); 1063 } 1064 1065 /* 1066 * handle (page) unaligned write to nand 1067 */ 1068 static int 1069 nand_flash_write_unaligned(device_t self, flash_off_t offset, size_t len, 1070 size_t *retlen, const uint8_t *buf) 1071 { 1072 struct nand_softc *sc = device_private(self); 1073 struct nand_chip *chip = &sc->sc_chip; 1074 flash_off_t first, last, firstoff; 1075 const uint8_t *bufp; 1076 flash_off_t addr; 1077 size_t left, count; 1078 int error = 0, i; 1079 1080 first = offset & chip->nc_page_mask; 1081 firstoff = offset & ~chip->nc_page_mask; 1082 /* XXX check if this should be len - 1 */ 1083 last = (offset + len) & chip->nc_page_mask; 1084 count = last - first + 1; 1085 1086 addr = first; 1087 *retlen = 0; 1088 1089 mutex_enter(&sc->sc_device_lock); 1090 if (count == 1) { 1091 if (nand_isbad(self, addr)) { 1092 aprint_error_dev(self, 1093 "nand_flash_write_unaligned: " 1094 "bad block encountered\n"); 1095 error = EIO; 1096 goto out; 1097 } 1098 1099 error = nand_read_page(self, addr, chip->nc_page_cache); 1100 if (error) { 1101 goto out; 1102 } 1103 1104 memcpy(chip->nc_page_cache + firstoff, buf, len); 1105 1106 error = nand_program_page(self, addr, chip->nc_page_cache); 1107 if (error) { 1108 goto out; 1109 } 1110 1111 *retlen = len; 1112 goto out; 1113 } 1114 1115 bufp = buf; 1116 left = len; 1117 1118 for (i = 0; i < count && left != 0; i++) { 1119 if (nand_isbad(self, addr)) { 1120 aprint_error_dev(self, 1121 "nand_flash_write_unaligned: " 1122 "bad block encountered\n"); 1123 error = EIO; 1124 goto out; 1125 } 1126 1127 if (i == 0) { 1128 error = nand_read_page(self, 1129 addr, chip->nc_page_cache); 1130 if (error) { 1131 goto out; 1132 } 1133 1134 memcpy(chip->nc_page_cache + firstoff, 1135 bufp, chip->nc_page_size - firstoff); 1136 1137 printf("program page: %s: %d\n", __FILE__, __LINE__); 1138 error = nand_program_page(self, 1139 addr, chip->nc_page_cache); 1140 if (error) { 1141 goto out; 1142 } 1143 1144 bufp += chip->nc_page_size - firstoff; 1145 left -= chip->nc_page_size - firstoff; 1146 *retlen += chip->nc_page_size - firstoff; 1147 1148 } else if (i == count - 1) { 1149 error = nand_read_page(self, 1150 addr, chip->nc_page_cache); 1151 if (error) { 1152 goto out; 1153 } 1154 1155 memcpy(chip->nc_page_cache, bufp, left); 1156 1157 error = nand_program_page(self, 1158 addr, chip->nc_page_cache); 1159 if (error) { 1160 goto out; 1161 } 1162 1163 *retlen += left; 1164 KASSERT(left < chip->nc_page_size); 1165 1166 } else { 1167 /* XXX debug */ 1168 if (left > chip->nc_page_size) { 1169 printf("left: %zu, i: %d, count: %zu\n", 1170 left, i, count); 1171 } 1172 KASSERT(left > chip->nc_page_size); 1173 1174 error = nand_program_page(self, addr, bufp); 1175 if (error) { 1176 goto out; 1177 } 1178 1179 bufp += chip->nc_page_size; 1180 left -= chip->nc_page_size; 1181 *retlen += chip->nc_page_size; 1182 } 1183 1184 addr += chip->nc_page_size; 1185 } 1186 1187 KASSERT(*retlen == len); 1188 out: 1189 mutex_exit(&sc->sc_device_lock); 1190 1191 return error; 1192 } 1193 1194 int 1195 nand_flash_write(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1196 const uint8_t *buf) 1197 { 1198 struct nand_softc *sc = device_private(self); 1199 struct nand_chip *chip = &sc->sc_chip; 1200 const uint8_t *bufp; 1201 size_t pages, page; 1202 daddr_t addr; 1203 int error = 0; 1204 1205 if ((offset + len) > chip->nc_size) { 1206 DPRINTF(("nand_flash_write: write (off: 0x%jx, len: %ju)," 1207 " is over device size (0x%jx)\n", 1208 (uintmax_t)offset, (uintmax_t)len, 1209 (uintmax_t)chip->nc_size)); 1210 return EINVAL; 1211 } 1212 1213 if (len % chip->nc_page_size != 0 || 1214 offset % chip->nc_page_size != 0) { 1215 return nand_flash_write_unaligned(self, 1216 offset, len, retlen, buf); 1217 } 1218 1219 pages = len / chip->nc_page_size; 1220 KASSERT(pages != 0); 1221 *retlen = 0; 1222 1223 addr = offset; 1224 bufp = buf; 1225 1226 mutex_enter(&sc->sc_device_lock); 1227 for (page = 0; page < pages; page++) { 1228 /* do we need this check here? */ 1229 if (nand_isbad(self, addr)) { 1230 aprint_error_dev(self, 1231 "nand_flash_write: bad block encountered\n"); 1232 1233 error = EIO; 1234 goto out; 1235 } 1236 1237 error = nand_program_page(self, addr, bufp); 1238 if (error) { 1239 goto out; 1240 } 1241 1242 addr += chip->nc_page_size; 1243 bufp += chip->nc_page_size; 1244 *retlen += chip->nc_page_size; 1245 } 1246 out: 1247 mutex_exit(&sc->sc_device_lock); 1248 DPRINTF(("page programming: retlen: %" PRIu32 ", len: %" PRIu32 "\n", *retlen, len)); 1249 1250 return error; 1251 } 1252 1253 /* 1254 * handle (page) unaligned read from nand 1255 */ 1256 static int 1257 nand_flash_read_unaligned(device_t self, size_t offset, 1258 size_t len, size_t *retlen, uint8_t *buf) 1259 { 1260 struct nand_softc *sc = device_private(self); 1261 struct nand_chip *chip = &sc->sc_chip; 1262 daddr_t first, last, count, firstoff; 1263 uint8_t *bufp; 1264 daddr_t addr; 1265 size_t left; 1266 int error = 0, i; 1267 1268 first = offset & chip->nc_page_mask; 1269 firstoff = offset & ~chip->nc_page_mask; 1270 last = (offset + len) & chip->nc_page_mask; 1271 count = (last - first) / chip->nc_page_size + 1; 1272 1273 addr = first; 1274 bufp = buf; 1275 left = len; 1276 *retlen = 0; 1277 1278 mutex_enter(&sc->sc_device_lock); 1279 if (count == 1) { 1280 error = nand_read_page(self, addr, chip->nc_page_cache); 1281 if (error) { 1282 goto out; 1283 } 1284 1285 memcpy(bufp, chip->nc_page_cache + firstoff, len); 1286 1287 *retlen = len; 1288 goto out; 1289 } 1290 1291 for (i = 0; i < count && left != 0; i++) { 1292 error = nand_read_page(self, addr, chip->nc_page_cache); 1293 if (error) { 1294 goto out; 1295 } 1296 1297 if (i == 0) { 1298 memcpy(bufp, chip->nc_page_cache + firstoff, 1299 chip->nc_page_size - firstoff); 1300 1301 bufp += chip->nc_page_size - firstoff; 1302 left -= chip->nc_page_size - firstoff; 1303 *retlen += chip->nc_page_size - firstoff; 1304 1305 } else if (i == count - 1) { 1306 memcpy(bufp, chip->nc_page_cache, left); 1307 *retlen += left; 1308 KASSERT(left < chip->nc_page_size); 1309 1310 } else { 1311 memcpy(bufp, chip->nc_page_cache, chip->nc_page_size); 1312 1313 bufp += chip->nc_page_size; 1314 left -= chip->nc_page_size; 1315 *retlen += chip->nc_page_size; 1316 } 1317 1318 addr += chip->nc_page_size; 1319 } 1320 KASSERT(*retlen == len); 1321 out: 1322 mutex_exit(&sc->sc_device_lock); 1323 1324 return error; 1325 } 1326 1327 int 1328 nand_flash_read(device_t self, flash_off_t offset, size_t len, size_t *retlen, 1329 uint8_t *buf) 1330 { 1331 struct nand_softc *sc = device_private(self); 1332 struct nand_chip *chip = &sc->sc_chip; 1333 uint8_t *bufp; 1334 size_t addr; 1335 size_t i, pages; 1336 int error = 0; 1337 1338 *retlen = 0; 1339 1340 DPRINTF(("nand_flash_read: off: 0x%jx, len: %" PRIu32 "\n", 1341 (uintmax_t)offset, len)); 1342 1343 if (__predict_false((offset + len) > chip->nc_size)) { 1344 DPRINTF(("nand_flash_read: read (off: 0x%jx, len: %" PRIu32 ")," 1345 " is over device size (%ju)\n", (uintmax_t)offset, 1346 len, (uintmax_t)chip->nc_size)); 1347 return EINVAL; 1348 } 1349 1350 /* Handle unaligned access, shouldnt be needed when using the 1351 * block device, as strategy handles it, so only low level 1352 * accesses will use this path 1353 */ 1354 /* XXX^2 */ 1355 #if 0 1356 if (len < chip->nc_page_size) 1357 panic("TODO page size is larger than read size"); 1358 #endif 1359 1360 if (len % chip->nc_page_size != 0 || 1361 offset % chip->nc_page_size != 0) { 1362 return nand_flash_read_unaligned(self, 1363 offset, len, retlen, buf); 1364 } 1365 1366 bufp = buf; 1367 addr = offset; 1368 pages = len / chip->nc_page_size; 1369 1370 mutex_enter(&sc->sc_device_lock); 1371 for (i = 0; i < pages; i++) { 1372 /* XXX do we need this check here? */ 1373 if (nand_isbad(self, addr)) { 1374 aprint_error_dev(self, "bad block encountered\n"); 1375 error = EIO; 1376 goto out; 1377 } 1378 error = nand_read_page(self, addr, bufp); 1379 if (error) 1380 goto out; 1381 1382 bufp += chip->nc_page_size; 1383 addr += chip->nc_page_size; 1384 *retlen += chip->nc_page_size; 1385 } 1386 out: 1387 mutex_exit(&sc->sc_device_lock); 1388 1389 return error; 1390 } 1391 1392 int 1393 nand_flash_isbad(device_t self, flash_off_t ofs, bool *is_bad) 1394 { 1395 struct nand_softc *sc = device_private(self); 1396 struct nand_chip *chip = &sc->sc_chip; 1397 bool result; 1398 1399 if (ofs > chip->nc_size) { 1400 DPRINTF(("nand_flash_isbad: offset 0x%jx is larger than" 1401 " device size (0x%jx)\n", (uintmax_t)ofs, 1402 (uintmax_t)chip->nc_size)); 1403 return EINVAL; 1404 } 1405 1406 if (ofs % chip->nc_block_size != 0) { 1407 DPRINTF(("offset (0x%jx) is not a multiple of block size " 1408 "(%ju)", 1409 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size)); 1410 return EINVAL; 1411 } 1412 1413 mutex_enter(&sc->sc_device_lock); 1414 result = nand_isbad(self, ofs); 1415 mutex_exit(&sc->sc_device_lock); 1416 1417 *is_bad = result; 1418 1419 return 0; 1420 } 1421 1422 int 1423 nand_flash_markbad(device_t self, flash_off_t ofs) 1424 { 1425 struct nand_softc *sc = device_private(self); 1426 struct nand_chip *chip = &sc->sc_chip; 1427 1428 if (ofs > chip->nc_size) { 1429 DPRINTF(("nand_flash_markbad: offset 0x%jx is larger than" 1430 " device size (0x%jx)\n", ofs, 1431 (uintmax_t)chip->nc_size)); 1432 return EINVAL; 1433 } 1434 1435 if (ofs % chip->nc_block_size != 0) { 1436 panic("offset (%ju) is not a multiple of block size (%ju)", 1437 (uintmax_t)ofs, (uintmax_t)chip->nc_block_size); 1438 } 1439 1440 mutex_enter(&sc->sc_device_lock); 1441 nand_markbad(self, ofs); 1442 mutex_exit(&sc->sc_device_lock); 1443 1444 return 0; 1445 } 1446 1447 int 1448 nand_flash_erase(device_t self, 1449 struct flash_erase_instruction *ei) 1450 { 1451 struct nand_softc *sc = device_private(self); 1452 struct nand_chip *chip = &sc->sc_chip; 1453 flash_off_t addr; 1454 int error = 0; 1455 1456 if (ei->ei_addr < 0 || ei->ei_len < chip->nc_block_size) 1457 return EINVAL; 1458 1459 if (ei->ei_addr + ei->ei_len > chip->nc_size) { 1460 DPRINTF(("nand_flash_erase: erase address is over the end" 1461 " of the device\n")); 1462 return EINVAL; 1463 } 1464 1465 if (ei->ei_addr % chip->nc_block_size != 0) { 1466 aprint_error_dev(self, 1467 "nand_flash_erase: ei_addr (%ju) is not" 1468 " a multiple of block size (%ju)", 1469 (uintmax_t)ei->ei_addr, 1470 (uintmax_t)chip->nc_block_size); 1471 return EINVAL; 1472 } 1473 1474 if (ei->ei_len % chip->nc_block_size != 0) { 1475 aprint_error_dev(self, 1476 "nand_flash_erase: ei_len (%ju) is not" 1477 " a multiple of block size (%ju)", 1478 (uintmax_t)ei->ei_len, 1479 (uintmax_t)chip->nc_block_size); 1480 return EINVAL; 1481 } 1482 1483 mutex_enter(&sc->sc_device_lock); 1484 addr = ei->ei_addr; 1485 while (addr < ei->ei_addr + ei->ei_len) { 1486 if (nand_isbad(self, addr)) { 1487 aprint_error_dev(self, "bad block encountered\n"); 1488 ei->ei_state = FLASH_ERASE_FAILED; 1489 error = EIO; 1490 goto out; 1491 } 1492 1493 error = nand_erase_block(self, addr); 1494 if (error) { 1495 ei->ei_state = FLASH_ERASE_FAILED; 1496 goto out; 1497 } 1498 1499 addr += chip->nc_block_size; 1500 } 1501 mutex_exit(&sc->sc_device_lock); 1502 1503 ei->ei_state = FLASH_ERASE_DONE; 1504 if (ei->ei_callback != NULL) { 1505 ei->ei_callback(ei); 1506 } 1507 1508 return 0; 1509 out: 1510 mutex_exit(&sc->sc_device_lock); 1511 1512 return error; 1513 } 1514 1515 MODULE(MODULE_CLASS_DRIVER, nand, "flash"); 1516 1517 #ifdef _MODULE 1518 #include "ioconf.c" 1519 #endif 1520 1521 static int 1522 nand_modcmd(modcmd_t cmd, void *opaque) 1523 { 1524 switch (cmd) { 1525 case MODULE_CMD_INIT: 1526 #ifdef _MODULE 1527 return config_init_component(cfdriver_ioconf_nand, 1528 cfattach_ioconf_nand, cfdata_ioconf_nand); 1529 #else 1530 return 0; 1531 #endif 1532 case MODULE_CMD_FINI: 1533 #ifdef _MODULE 1534 return config_fini_component(cfdriver_ioconf_nand, 1535 cfattach_ioconf_nand, cfdata_ioconf_nand); 1536 #else 1537 return 0; 1538 #endif 1539 default: 1540 return ENOTTY; 1541 } 1542 } 1543