1*7a9a30c5Sthorpej /* $NetBSD: rlphy.c,v 1.39 2020/03/15 23:04:50 thorpej Exp $ */
2d064eae3Sxtraeme /* $OpenBSD: rlphy.c,v 1.20 2005/07/31 05:27:30 pvalchev Exp $ */
3d064eae3Sxtraeme
4d064eae3Sxtraeme /*
5d064eae3Sxtraeme * Copyright (c) 1998, 1999 Jason L. Wright (jason@thought.net)
6d064eae3Sxtraeme * All rights reserved.
7d064eae3Sxtraeme *
8d064eae3Sxtraeme * Redistribution and use in source and binary forms, with or without
9d064eae3Sxtraeme * modification, are permitted provided that the following conditions
10d064eae3Sxtraeme * are met:
11d064eae3Sxtraeme * 1. Redistributions of source code must retain the above copyright
12d064eae3Sxtraeme * notice, this list of conditions and the following disclaimer.
13d064eae3Sxtraeme * 2. Redistributions in binary form must reproduce the above copyright
14d064eae3Sxtraeme * notice, this list of conditions and the following disclaimer in the
15d064eae3Sxtraeme * documentation and/or other materials provided with the distribution.
16d064eae3Sxtraeme *
17d064eae3Sxtraeme * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18d064eae3Sxtraeme * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
19d064eae3Sxtraeme * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
20d064eae3Sxtraeme * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
21d064eae3Sxtraeme * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22d064eae3Sxtraeme * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23d064eae3Sxtraeme * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24d064eae3Sxtraeme * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25d064eae3Sxtraeme * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
26d064eae3Sxtraeme * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27d064eae3Sxtraeme * POSSIBILITY OF SUCH DAMAGE.
28d064eae3Sxtraeme */
29d064eae3Sxtraeme
30d064eae3Sxtraeme /*
31d064eae3Sxtraeme * Driver for the internal PHY found on RTL8139 based nics, based
32d064eae3Sxtraeme * on drivers for the 'exphy' (Internal 3Com phys) and 'nsphy'
33d064eae3Sxtraeme * (National Semiconductor DP83840).
34d064eae3Sxtraeme */
35d064eae3Sxtraeme
36d064eae3Sxtraeme /*
37d064eae3Sxtraeme * Ported to NetBSD by Juan Romero Pardines <xtraeme@NetBSD.org>
38d064eae3Sxtraeme */
39d064eae3Sxtraeme
40d064eae3Sxtraeme #include <sys/cdefs.h>
41*7a9a30c5Sthorpej __KERNEL_RCSID(0, "$NetBSD: rlphy.c,v 1.39 2020/03/15 23:04:50 thorpej Exp $");
42d064eae3Sxtraeme
43d064eae3Sxtraeme #include <sys/param.h>
44d064eae3Sxtraeme #include <sys/systm.h>
45d064eae3Sxtraeme #include <sys/kernel.h>
46d064eae3Sxtraeme #include <sys/device.h>
47d064eae3Sxtraeme #include <sys/socket.h>
48d064eae3Sxtraeme #include <sys/errno.h>
49d064eae3Sxtraeme
50d064eae3Sxtraeme #include <net/if.h>
51d064eae3Sxtraeme #include <net/if_media.h>
52d064eae3Sxtraeme
53d064eae3Sxtraeme #include <dev/mii/mii.h>
54d064eae3Sxtraeme #include <dev/mii/miivar.h>
55d064eae3Sxtraeme #include <dev/mii/miidevs.h>
56a2a38285Sad #include <sys/bus.h>
57d064eae3Sxtraeme #include <dev/ic/rtl81x9reg.h>
58d064eae3Sxtraeme
59d60cbb92Stsutsui struct rlphy_softc {
60d60cbb92Stsutsui struct mii_softc sc_mii;
61deaee5c0Srin int sc_rtl8201;
62d60cbb92Stsutsui };
63d60cbb92Stsutsui
64a74cc5cdSmsaitoh static int rlphymatch(device_t, cfdata_t, void *);
65a74cc5cdSmsaitoh static void rlphyattach(device_t, device_t, void *);
66d064eae3Sxtraeme
677db0e577Sxtraeme CFATTACH_DECL_NEW(rlphy, sizeof(struct rlphy_softc),
68d064eae3Sxtraeme rlphymatch, rlphyattach, mii_phy_detach, mii_phy_activate);
69d064eae3Sxtraeme
70a74cc5cdSmsaitoh static int rlphy_service(struct mii_softc *, struct mii_data *, int);
71a74cc5cdSmsaitoh static void rlphy_status(struct mii_softc *);
72af7a0c17Stsutsui static void rlphy_reset(struct mii_softc *);
73af7a0c17Stsutsui
74d064eae3Sxtraeme const struct mii_phy_funcs rlphy_funcs = {
75af7a0c17Stsutsui rlphy_service, rlphy_status, rlphy_reset,
76d064eae3Sxtraeme };
77d064eae3Sxtraeme
78bf841929Schs static const struct mii_phydesc rlphys[] = {
797b43da1bSchristos MII_PHY_DESC(yyREALTEK, RTL8201L),
807b43da1bSchristos MII_PHY_DESC(REALTEK, RTL8201E),
81b3ef55ebSmsaitoh MII_PHY_DESC(xxICPLUS, IP101),
827b43da1bSchristos MII_PHY_END,
83bf841929Schs };
84bf841929Schs
85a74cc5cdSmsaitoh static int
rlphymatch(device_t parent,cfdata_t match,void * aux)867db0e577Sxtraeme rlphymatch(device_t parent, cfdata_t match, void *aux)
87d064eae3Sxtraeme {
88d064eae3Sxtraeme struct mii_attach_args *ma = aux;
89db460c0fSpooka struct mii_data *mii = ma->mii_data;
90db460c0fSpooka
91db460c0fSpooka if (mii->mii_instance != 0)
92db460c0fSpooka return 0;
93d064eae3Sxtraeme
94bf841929Schs if (mii_phy_match(ma, rlphys) != NULL)
958e65e831Smsaitoh return 10;
96d064eae3Sxtraeme
97d064eae3Sxtraeme if (MII_OUI(ma->mii_id1, ma->mii_id2) != 0 ||
98d064eae3Sxtraeme MII_MODEL(ma->mii_id2) != 0)
99d064eae3Sxtraeme return 0;
100d064eae3Sxtraeme
101ff1bacaeStsutsui if (!device_is_a(parent, "rtk") && !device_is_a(parent, "re"))
102d064eae3Sxtraeme return 0;
103d064eae3Sxtraeme
104d064eae3Sxtraeme /*
105d064eae3Sxtraeme * A "real" phy should get preference, but on the 8139 there
106d064eae3Sxtraeme * is no phyid register.
107d064eae3Sxtraeme */
108d064eae3Sxtraeme return 5;
109d064eae3Sxtraeme }
110d064eae3Sxtraeme
111a74cc5cdSmsaitoh static void
rlphyattach(device_t parent,device_t self,void * aux)1127db0e577Sxtraeme rlphyattach(device_t parent, device_t self, void *aux)
113d064eae3Sxtraeme {
114d60cbb92Stsutsui struct rlphy_softc *rsc = device_private(self);
115d60cbb92Stsutsui struct mii_softc *sc = &rsc->sc_mii;
116d064eae3Sxtraeme struct mii_attach_args *ma = aux;
117d064eae3Sxtraeme struct mii_data *mii = ma->mii_data;
118d064eae3Sxtraeme
1192b2a0053Suwe aprint_naive("\n");
120d064eae3Sxtraeme if (MII_MODEL(ma->mii_id2) == MII_MODEL_yyREALTEK_RTL8201L) {
121deaee5c0Srin rsc->sc_rtl8201 = 1;
122d064eae3Sxtraeme aprint_normal(": %s, rev. %d\n", MII_STR_yyREALTEK_RTL8201L,
123d064eae3Sxtraeme MII_REV(ma->mii_id2));
124deaee5c0Srin } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_REALTEK_RTL8201E) {
125deaee5c0Srin rsc->sc_rtl8201 = 1;
126deaee5c0Srin aprint_normal(": %s, rev. %d\n", MII_STR_REALTEK_RTL8201E,
127deaee5c0Srin MII_REV(ma->mii_id2));
128b3ef55ebSmsaitoh } else if (MII_MODEL(ma->mii_id2) == MII_MODEL_xxICPLUS_IP101) {
129b3ef55ebSmsaitoh aprint_normal(": %s, rev. %d\n", MII_STR_xxICPLUS_IP101,
130b3ef55ebSmsaitoh MII_REV(ma->mii_id2));
131d064eae3Sxtraeme } else
132d064eae3Sxtraeme aprint_normal(": Realtek internal PHY\n");
133d064eae3Sxtraeme
1347db0e577Sxtraeme sc->mii_dev = self;
135d064eae3Sxtraeme sc->mii_inst = mii->mii_instance;
136d064eae3Sxtraeme sc->mii_phy = ma->mii_phyno;
137d064eae3Sxtraeme sc->mii_funcs = &rlphy_funcs;
138d064eae3Sxtraeme sc->mii_pdata = mii;
139d064eae3Sxtraeme sc->mii_flags = ma->mii_flags;
140d064eae3Sxtraeme
141d064eae3Sxtraeme sc->mii_flags |= MIIF_NOISOLATE;
142d064eae3Sxtraeme
143*7a9a30c5Sthorpej mii_lock(mii);
144*7a9a30c5Sthorpej
145d064eae3Sxtraeme PHY_RESET(sc);
146d064eae3Sxtraeme
147a5cdd4b4Smsaitoh PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
148a5cdd4b4Smsaitoh sc->mii_capabilities &= ma->mii_capmask;
149509697f3Smsaitoh
150*7a9a30c5Sthorpej mii_unlock(mii);
151*7a9a30c5Sthorpej
152d064eae3Sxtraeme mii_phy_add_media(sc);
153d064eae3Sxtraeme }
154d064eae3Sxtraeme
155a74cc5cdSmsaitoh static int
rlphy_service(struct mii_softc * sc,struct mii_data * mii,int cmd)156d064eae3Sxtraeme rlphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
157d064eae3Sxtraeme {
158d064eae3Sxtraeme struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
159d064eae3Sxtraeme
1608e65e831Smsaitoh /* Can't isolate the RTL8139 phy, so it has to be the only one. */
161d064eae3Sxtraeme if (IFM_INST(ife->ifm_media) != sc->mii_inst)
162d064eae3Sxtraeme panic("rlphy_service: attempt to isolate phy");
163d064eae3Sxtraeme
164*7a9a30c5Sthorpej KASSERT(mii_locked(mii));
165*7a9a30c5Sthorpej
166d064eae3Sxtraeme switch (cmd) {
167d064eae3Sxtraeme case MII_POLLSTAT:
168d064eae3Sxtraeme break;
169d064eae3Sxtraeme
170d064eae3Sxtraeme case MII_MEDIACHG:
1718e65e831Smsaitoh /* If the interface is not up, don't do anything. */
172d064eae3Sxtraeme if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
173d064eae3Sxtraeme break;
174d064eae3Sxtraeme
175f9c11ac3Smlelstv mii_phy_setmedia(sc);
176d064eae3Sxtraeme break;
177d064eae3Sxtraeme
178d064eae3Sxtraeme case MII_TICK:
1798e65e831Smsaitoh /* Is the interface even up? */
180d064eae3Sxtraeme if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
1818e65e831Smsaitoh return 0;
182d064eae3Sxtraeme
1838e65e831Smsaitoh /* Only used for autonegotiation. */
184d064eae3Sxtraeme if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO)
185d064eae3Sxtraeme break;
186d064eae3Sxtraeme
187d064eae3Sxtraeme /*
188d064eae3Sxtraeme * The RealTek PHY's autonegotiation doesn't need to be
189d064eae3Sxtraeme * kicked; it continues in the background.
190d064eae3Sxtraeme */
191d064eae3Sxtraeme break;
192d064eae3Sxtraeme
193d064eae3Sxtraeme case MII_DOWN:
194d064eae3Sxtraeme mii_phy_down(sc);
1958e65e831Smsaitoh return 0;
196d064eae3Sxtraeme }
197d064eae3Sxtraeme
198d064eae3Sxtraeme /* Update the media status. */
199d064eae3Sxtraeme mii_phy_status(sc);
200d064eae3Sxtraeme
201d064eae3Sxtraeme /* Callback if something changed. */
202d064eae3Sxtraeme mii_phy_update(sc, cmd);
2038e65e831Smsaitoh return 0;
204d064eae3Sxtraeme }
205d064eae3Sxtraeme
206a74cc5cdSmsaitoh static void
rlphy_status(struct mii_softc * sc)207d064eae3Sxtraeme rlphy_status(struct mii_softc *sc)
208d064eae3Sxtraeme {
209d60cbb92Stsutsui struct rlphy_softc *rsc = (void *)sc;
210d064eae3Sxtraeme struct mii_data *mii = sc->mii_pdata;
211d064eae3Sxtraeme struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
212a5cdd4b4Smsaitoh uint16_t bmsr, bmcr, anar, anlpar, result, reg;
213d064eae3Sxtraeme
214*7a9a30c5Sthorpej KASSERT(mii_locked(mii));
215*7a9a30c5Sthorpej
216d064eae3Sxtraeme mii->mii_media_status = IFM_AVALID;
217d064eae3Sxtraeme mii->mii_media_active = IFM_ETHER;
218d064eae3Sxtraeme
219a5cdd4b4Smsaitoh PHY_READ(sc, MII_BMSR, &bmsr);
220a5cdd4b4Smsaitoh PHY_READ(sc, MII_BMSR, &bmsr);
221d064eae3Sxtraeme if (bmsr & BMSR_LINK)
222d064eae3Sxtraeme mii->mii_media_status |= IFM_ACTIVE;
223d064eae3Sxtraeme
224a5cdd4b4Smsaitoh PHY_READ(sc, MII_BMCR, &bmcr);
225d064eae3Sxtraeme if (bmcr & BMCR_ISO) {
226d064eae3Sxtraeme mii->mii_media_active |= IFM_NONE;
227d064eae3Sxtraeme mii->mii_media_status = 0;
228d064eae3Sxtraeme return;
229d064eae3Sxtraeme }
230d064eae3Sxtraeme
231d064eae3Sxtraeme if (bmcr & BMCR_LOOP)
232d064eae3Sxtraeme mii->mii_media_active |= IFM_LOOP;
233d064eae3Sxtraeme
234d064eae3Sxtraeme if (bmcr & BMCR_AUTOEN) {
235d064eae3Sxtraeme /*
236d064eae3Sxtraeme * NWay autonegotiation takes the highest-order common
237d064eae3Sxtraeme * bit of the ANAR and ANLPAR (i.e. best media advertised
238d064eae3Sxtraeme * both by us and our link partner).
239d064eae3Sxtraeme */
240d064eae3Sxtraeme if ((bmsr & BMSR_ACOMP) == 0) {
241d064eae3Sxtraeme /* Erg, still trying, I guess... */
242d064eae3Sxtraeme mii->mii_media_active |= IFM_NONE;
243d064eae3Sxtraeme return;
244d064eae3Sxtraeme }
245d064eae3Sxtraeme
246a5cdd4b4Smsaitoh PHY_READ(sc, MII_ANAR, &anar);
247a5cdd4b4Smsaitoh PHY_READ(sc, MII_ANLPAR, &anlpar);
248fc0204dfSmsaitoh result = anar & anlpar;
249fc0204dfSmsaitoh if (result != 0) {
250fc0204dfSmsaitoh if (result & ANLPAR_TX_FD)
251d064eae3Sxtraeme mii->mii_media_active |= IFM_100_TX | IFM_FDX;
252fc0204dfSmsaitoh else if (result & ANLPAR_T4)
253b211437bSmsaitoh mii->mii_media_active |= IFM_100_T4 | IFM_HDX;
254fc0204dfSmsaitoh else if (result & ANLPAR_TX)
255b211437bSmsaitoh mii->mii_media_active |= IFM_100_TX | IFM_HDX;
256fc0204dfSmsaitoh else if (result & ANLPAR_10_FD)
257d064eae3Sxtraeme mii->mii_media_active |= IFM_10_T | IFM_FDX;
258fc0204dfSmsaitoh else if (result & ANLPAR_10)
259b211437bSmsaitoh mii->mii_media_active |= IFM_10_T | IFM_HDX;
260d064eae3Sxtraeme else
261d064eae3Sxtraeme mii->mii_media_active |= IFM_NONE;
262d064eae3Sxtraeme return;
263d064eae3Sxtraeme }
264d064eae3Sxtraeme
265d064eae3Sxtraeme /*
266d064eae3Sxtraeme * If the other side doesn't support NWAY, then the
267d064eae3Sxtraeme * best we can do is determine if we have a 10Mbps or
268d064eae3Sxtraeme * 100Mbps link. There's no way to know if the link
269d064eae3Sxtraeme * is full or half duplex, so we default to half duplex
270d064eae3Sxtraeme * and hope that the user is clever enough to manually
271d064eae3Sxtraeme * change the media settings if we're wrong.
272d064eae3Sxtraeme */
273d064eae3Sxtraeme
274d064eae3Sxtraeme /*
275d064eae3Sxtraeme * The RealTek PHY supports non-NWAY link speed
276d064eae3Sxtraeme * detection, however it does not report the link
277d064eae3Sxtraeme * detection results via the ANLPAR or BMSR registers.
278d064eae3Sxtraeme * (What? RealTek doesn't do things the way everyone
279d064eae3Sxtraeme * else does? I'm just shocked, shocked I tell you.)
280d064eae3Sxtraeme * To determine the link speed, we have to do one
281d064eae3Sxtraeme * of two things:
282d064eae3Sxtraeme *
283deaee5c0Srin * - If this is a standalone RealTek RTL8201 PHY,
284d064eae3Sxtraeme * we can determine the link speed by testing bit 0
285d064eae3Sxtraeme * in the magic, vendor-specific register at offset
286d064eae3Sxtraeme * 0x19.
287d064eae3Sxtraeme *
288d064eae3Sxtraeme * - If this is a RealTek MAC with integrated PHY, we
289d064eae3Sxtraeme * can test the 'SPEED10' bit of the MAC's media status
290d064eae3Sxtraeme * register.
291d064eae3Sxtraeme */
292deaee5c0Srin if (rsc->sc_rtl8201) {
293a5cdd4b4Smsaitoh PHY_READ(sc, 0x0019, ®);
294a5cdd4b4Smsaitoh if (reg & 0x01)
295d064eae3Sxtraeme mii->mii_media_active |= IFM_100_TX;
296d064eae3Sxtraeme else
297d064eae3Sxtraeme mii->mii_media_active |= IFM_10_T;
298d60cbb92Stsutsui } else {
299a5cdd4b4Smsaitoh PHY_READ(sc, RTK_MEDIASTAT, ®);
300a5cdd4b4Smsaitoh if (reg & RTK_MEDIASTAT_SPEED10)
301d60cbb92Stsutsui mii->mii_media_active |= IFM_10_T;
302d60cbb92Stsutsui else
303d60cbb92Stsutsui mii->mii_media_active |= IFM_100_TX;
304d064eae3Sxtraeme }
305b211437bSmsaitoh mii->mii_media_active |= IFM_HDX;
306d064eae3Sxtraeme } else
307d064eae3Sxtraeme mii->mii_media_active = ife->ifm_media;
308d064eae3Sxtraeme }
309af7a0c17Stsutsui
310af7a0c17Stsutsui static void
rlphy_reset(struct mii_softc * sc)311af7a0c17Stsutsui rlphy_reset(struct mii_softc *sc)
312af7a0c17Stsutsui {
313af7a0c17Stsutsui
314*7a9a30c5Sthorpej KASSERT(mii_locked(sc->mii_pdata));
315*7a9a30c5Sthorpej
316af7a0c17Stsutsui mii_phy_reset(sc);
317af7a0c17Stsutsui
318af7a0c17Stsutsui /*
319af7a0c17Stsutsui * XXX RealTek PHY doesn't set the BMCR properly after
320af7a0c17Stsutsui * XXX reset, which breaks autonegotiation.
321af7a0c17Stsutsui */
322af7a0c17Stsutsui PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN);
323af7a0c17Stsutsui }
324