xref: /netbsd-src/sys/dev/ic/com.c (revision bada23909e740596d0a3785a73bd3583a9807fb8)
1 /*	$NetBSD: com.c,v 1.155 1999/02/28 17:10:52 explorer Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  * 3. All advertising materials mentioning features or use of this software
19  *    must display the following acknowledgement:
20  *        This product includes software developed by the NetBSD
21  *        Foundation, Inc. and its contributors.
22  * 4. Neither the name of The NetBSD Foundation nor the names of its
23  *    contributors may be used to endorse or promote products derived
24  *    from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 /*
40  * Copyright (c) 1991 The Regents of the University of California.
41  * All rights reserved.
42  *
43  * Redistribution and use in source and binary forms, with or without
44  * modification, are permitted provided that the following conditions
45  * are met:
46  * 1. Redistributions of source code must retain the above copyright
47  *    notice, this list of conditions and the following disclaimer.
48  * 2. Redistributions in binary form must reproduce the above copyright
49  *    notice, this list of conditions and the following disclaimer in the
50  *    documentation and/or other materials provided with the distribution.
51  * 3. All advertising materials mentioning features or use of this software
52  *    must display the following acknowledgement:
53  *	This product includes software developed by the University of
54  *	California, Berkeley and its contributors.
55  * 4. Neither the name of the University nor the names of its contributors
56  *    may be used to endorse or promote products derived from this software
57  *    without specific prior written permission.
58  *
59  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
60  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
61  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
62  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
63  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
64  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
65  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
66  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
67  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
68  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69  * SUCH DAMAGE.
70  *
71  *	@(#)com.c	7.5 (Berkeley) 5/16/91
72  */
73 
74 /*
75  * COM driver, uses National Semiconductor NS16450/NS16550AF UART
76  * Supports automatic hardware flow control on StarTech ST16C650A UART
77  */
78 
79 #include "opt_ddb.h"
80 
81 #include "rnd.h"
82 #if NRND > 0 && defined(RND_COM)
83 #include <sys/rnd.h>
84 #endif
85 
86 #include <sys/param.h>
87 #include <sys/systm.h>
88 #include <sys/ioctl.h>
89 #include <sys/select.h>
90 #include <sys/tty.h>
91 #include <sys/proc.h>
92 #include <sys/user.h>
93 #include <sys/conf.h>
94 #include <sys/file.h>
95 #include <sys/uio.h>
96 #include <sys/kernel.h>
97 #include <sys/syslog.h>
98 #include <sys/types.h>
99 #include <sys/device.h>
100 #include <sys/malloc.h>
101 #include <sys/timepps.h>
102 #include <sys/vnode.h>
103 
104 #include <machine/intr.h>
105 #include <machine/bus.h>
106 
107 #include <dev/ic/comreg.h>
108 #include <dev/ic/comvar.h>
109 #include <dev/ic/ns16550reg.h>
110 #include <dev/ic/st16650reg.h>
111 #ifdef COM_HAYESP
112 #include <dev/ic/hayespreg.h>
113 #endif
114 #define	com_lcr	com_cfcr
115 #include <dev/cons.h>
116 
117 #include "com.h"
118 
119 #ifdef COM_HAYESP
120 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc));
121 #endif
122 
123 #if defined(DDB) || defined(KGDB)
124 static void com_enable_debugport __P((struct com_softc *));
125 #endif
126 void	com_attach_subr	__P((struct com_softc *sc));
127 void	com_config	__P((struct com_softc *));
128 void	com_shutdown	__P((struct com_softc *));
129 int	comspeed	__P((long, long));
130 static	u_char	cflag2lcr __P((tcflag_t));
131 int	comparam	__P((struct tty *, struct termios *));
132 void	comstart	__P((struct tty *));
133 void	comstop		__P((struct tty *, int));
134 int	comhwiflow	__P((struct tty *, int));
135 
136 void	com_loadchannelregs __P((struct com_softc *));
137 void	com_hwiflow	__P((struct com_softc *));
138 void	com_break	__P((struct com_softc *, int));
139 void	com_modem	__P((struct com_softc *, int));
140 void	tiocm_to_com	__P((struct com_softc *, int, int));
141 int	com_to_tiocm	__P((struct com_softc *));
142 void	com_iflush	__P((struct com_softc *));
143 
144 int	com_common_getc	__P((bus_space_tag_t, bus_space_handle_t));
145 void	com_common_putc	__P((bus_space_tag_t, bus_space_handle_t, int));
146 
147 /* XXX: These belong elsewhere */
148 cdev_decl(com);
149 bdev_decl(com);
150 
151 int	comcngetc	__P((dev_t));
152 void	comcnputc	__P((dev_t, int));
153 void	comcnpollc	__P((dev_t, int));
154 
155 #define	integrate	static inline
156 #ifdef __GENERIC_SOFT_INTERRUPTS
157 void 	comsoft		__P((void *));
158 #else
159 #ifndef __NO_SOFT_SERIAL_INTERRUPT
160 void 	comsoft		__P((void));
161 #else
162 void 	comsoft		__P((void *));
163 #endif
164 #endif
165 integrate void com_rxsoft	__P((struct com_softc *, struct tty *));
166 integrate void com_txsoft	__P((struct com_softc *, struct tty *));
167 integrate void com_stsoft	__P((struct com_softc *, struct tty *));
168 integrate void com_schedrx	__P((struct com_softc *));
169 void	comdiag		__P((void *));
170 
171 extern struct cfdriver com_cd;
172 
173 /*
174  * Make this an option variable one can patch.
175  * But be warned:  this must be a power of 2!
176  */
177 u_int com_rbuf_size = COM_RING_SIZE;
178 
179 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */
180 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4;
181 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4;
182 
183 static int	comconsaddr;
184 static bus_space_tag_t comconstag;
185 static bus_space_handle_t comconsioh;
186 static int	comconsattached;
187 static int comconsrate;
188 static tcflag_t comconscflag;
189 
190 static int ppscap =
191 	PPS_TSFMT_TSPEC |
192 	PPS_CAPTUREASSERT |
193 	PPS_CAPTURECLEAR |
194 #ifdef  PPS_SYNC
195 	PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR |
196 #endif	/* PPS_SYNC */
197 	PPS_OFFSETASSERT | PPS_OFFSETCLEAR;
198 
199 #ifndef __GENERIC_SOFT_INTERRUPTS
200 #ifdef __NO_SOFT_SERIAL_INTERRUPT
201 volatile int	com_softintr_scheduled;
202 #endif
203 #endif
204 
205 #ifdef KGDB
206 #include <sys/kgdb.h>
207 
208 static int com_kgdb_addr;
209 static bus_space_tag_t com_kgdb_iot;
210 static bus_space_handle_t com_kgdb_ioh;
211 static int com_kgdb_attached;
212 
213 int	com_kgdb_getc __P((void *));
214 void	com_kgdb_putc __P((void *, int));
215 #endif /* KGDB */
216 
217 #define	COMUNIT_MASK	0x7ffff
218 #define	COMDIALOUT_MASK	0x80000
219 
220 #define	COMUNIT(x)	(minor(x) & COMUNIT_MASK)
221 #define	COMDIALOUT(x)	(minor(x) & COMDIALOUT_MASK)
222 
223 #define	COM_ISALIVE(sc)	((sc)->enabled != 0 && \
224 			 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE))
225 
226 int
227 comspeed(speed, frequency)
228 	long speed, frequency;
229 {
230 #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
231 
232 	int x, err;
233 
234 #if 0
235 	if (speed == 0)
236 		return (0);
237 #endif
238 	if (speed <= 0)
239 		return (-1);
240 	x = divrnd(frequency / 16, speed);
241 	if (x <= 0)
242 		return (-1);
243 	err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000;
244 	if (err < 0)
245 		err = -err;
246 	if (err > COM_TOLERANCE)
247 		return (-1);
248 	return (x);
249 
250 #undef	divrnd(n, q)
251 }
252 
253 #ifdef COM_DEBUG
254 int	com_debug = 0;
255 
256 void comstatus __P((struct com_softc *, char *));
257 void
258 comstatus(sc, str)
259 	struct com_softc *sc;
260 	char *str;
261 {
262 	struct tty *tp = sc->sc_tty;
263 
264 	printf("%s: %s %sclocal  %sdcd %sts_carr_on %sdtr %stx_stopped\n",
265 	    sc->sc_dev.dv_xname, str,
266 	    ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
267 	    ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-",
268 	    ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
269 	    ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
270 	    sc->sc_tx_stopped ? "+" : "-");
271 
272 	printf("%s: %s %scrtscts %scts %sts_ttstop  %srts %xrx_flags\n",
273 	    sc->sc_dev.dv_xname, str,
274 	    ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
275 	    ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-",
276 	    ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
277 	    ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
278 	    sc->sc_rx_flags);
279 }
280 #endif
281 
282 int
283 comprobe1(iot, ioh)
284 	bus_space_tag_t iot;
285 	bus_space_handle_t ioh;
286 {
287 
288 	/* force access to id reg */
289 	bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS);
290 	bus_space_write_1(iot, ioh, com_iir, 0);
291 	if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) ||
292 	    (bus_space_read_1(iot, ioh, com_iir) & 0x38))
293 		return (0);
294 
295 	return (1);
296 }
297 
298 #ifdef COM_HAYESP
299 int
300 comprobeHAYESP(hayespioh, sc)
301 	bus_space_handle_t hayespioh;
302 	struct com_softc *sc;
303 {
304 	char	val, dips;
305 	int	combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
306 	bus_space_tag_t iot = sc->sc_iot;
307 
308 	/*
309 	 * Hayes ESP cards have two iobases.  One is for compatibility with
310 	 * 16550 serial chips, and at the same ISA PC base addresses.  The
311 	 * other is for ESP-specific enhanced features, and lies at a
312 	 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300).
313 	 */
314 
315 	/* Test for ESP signature */
316 	if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0)
317 		return (0);
318 
319 	/*
320 	 * ESP is present at ESP enhanced base address; unknown com port
321 	 */
322 
323 	/* Get the dip-switch configurations */
324 	bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS);
325 	dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1);
326 
327 	/* Determine which com port this ESP card services: bits 0,1 of  */
328 	/*  dips is the port # (0-3); combaselist[val] is the com_iobase */
329 	if (sc->sc_iobase != combaselist[dips & 0x03])
330 		return (0);
331 
332 	printf(": ESP");
333 
334  	/* Check ESP Self Test bits. */
335 	/* Check for ESP version 2.0: bits 4,5,6 == 010 */
336 	bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST);
337 	val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */
338 	val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2);
339 	if ((val & 0x70) < 0x20) {
340 		printf("-old (%o)", val & 0x70);
341 		/* we do not support the necessary features */
342 		return (0);
343 	}
344 
345 	/* Check for ability to emulate 16550: bit 8 == 1 */
346 	if ((dips & 0x80) == 0) {
347 		printf(" slave");
348 		/* XXX Does slave really mean no 16550 support?? */
349 		return (0);
350 	}
351 
352 	/*
353 	 * If we made it this far, we are a full-featured ESP v2.0 (or
354 	 * better), at the correct com port address.
355 	 */
356 
357 	SET(sc->sc_hwflags, COM_HW_HAYESP);
358 	printf(", 1024 byte fifo\n");
359 	return (1);
360 }
361 #endif
362 
363 #if defined(DDB) || defined(KGDB)
364 static void
365 com_enable_debugport(sc)
366 	struct com_softc *sc;
367 {
368 	int s;
369 
370 	/* Turn on line break interrupt, set carrier. */
371 	s = splserial();
372 	sc->sc_ier = IER_ERXRDY;
373 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
374 	SET(sc->sc_mcr, MCR_DTR | MCR_RTS);
375 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr);
376 	splx(s);
377 }
378 #endif
379 
380 void
381 com_attach_subr(sc)
382 	struct com_softc *sc;
383 {
384 	int iobase = sc->sc_iobase;
385 	bus_space_tag_t iot = sc->sc_iot;
386 	bus_space_handle_t ioh = sc->sc_ioh;
387 	struct tty *tp;
388 #ifdef COM16650
389 	u_int8_t lcr;
390 #endif
391 #ifdef COM_HAYESP
392 	int	hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 };
393 	int	*hayespp;
394 #endif
395 
396 	/* Disable interrupts before configuring the device. */
397 	sc->sc_ier = 0;
398 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
399 
400 	if (iot == comconstag && iobase == comconsaddr) {
401 		comconsattached = 1;
402 
403 		/* Make sure the console is always "hardwired". */
404 		delay(1000);			/* wait for output to finish */
405 		SET(sc->sc_hwflags, COM_HW_CONSOLE);
406 		SET(sc->sc_swflags, TIOCFLAG_SOFTCAR);
407 	}
408 
409 #ifdef COM_HAYESP
410 	/* Look for a Hayes ESP board. */
411 	for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) {
412 		bus_space_handle_t hayespioh;
413 
414 #define	HAYESP_NPORTS	8			/* XXX XXX XXX ??? ??? ??? */
415 		if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh))
416 			continue;
417 		if (comprobeHAYESP(hayespioh, sc)) {
418 			sc->sc_hayespioh = hayespioh;
419 			sc->sc_fifolen = 1024;
420 
421 			break;
422 		}
423 		bus_space_unmap(iot, hayespioh, HAYESP_NPORTS);
424 	}
425 	/* No ESP; look for other things. */
426 	if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
427 #endif
428 	sc->sc_fifolen = 1;
429 	/* look for a NS 16550AF UART with FIFOs */
430 	bus_space_write_1(iot, ioh, com_fifo,
431 	    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14);
432 	delay(100);
433 	if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK)
434 	    == IIR_FIFO_MASK)
435 		if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14)
436 		    == FIFO_TRIGGER_14) {
437 			SET(sc->sc_hwflags, COM_HW_FIFO);
438 
439 #ifdef COM16650
440 			/*
441 			 * IIR changes into the EFR if LCR is set to LCR_EERS
442 			 * on 16650s. We also know IIR != 0 at this point.
443 			 * Write 0 into the EFR, and read it. If the result
444 			 * is 0, we have a 16650.
445 			 *
446 			 * Older 16650s were broken; the test to detect them
447 			 * is taken from the Linux driver. Apparently
448 			 * setting DLAB enable gives access to the EFR on
449 			 * these chips.
450 			 */
451 			lcr = bus_space_read_1(iot, ioh, com_lcr);
452 			bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
453 			bus_space_write_1(iot, ioh, com_efr, 0);
454 			if (bus_space_read_1(iot, ioh, com_efr) == 0) {
455 				bus_space_write_1(iot, ioh, com_lcr,
456 				    lcr | LCR_DLAB);
457 				if (bus_space_read_1(iot, ioh, com_efr) == 0) {
458 					CLR(sc->sc_hwflags, COM_HW_FIFO);
459 					sc->sc_fifolen = 0;
460 				} else {
461 					SET(sc->sc_hwflags, COM_HW_FLOW);
462 					sc->sc_fifolen = 32;
463 				}
464 			} else
465 #endif
466 				sc->sc_fifolen = 16;
467 
468 #ifdef COM16650
469 			bus_space_write_1(iot, ioh, com_lcr, lcr);
470 			if (sc->sc_fifolen == 0)
471 				printf(": st16650, broken fifo\n");
472 			else if (sc->sc_fifolen == 32)
473 				printf(": st16650a, working fifo\n");
474 			else
475 #endif
476 				printf(": ns16550a, working fifo\n");
477 		} else
478 			printf(": ns16550, broken fifo\n");
479 	else
480 		printf(": ns8250 or ns16450, no fifo\n");
481 	bus_space_write_1(iot, ioh, com_fifo, 0);
482 #ifdef COM_HAYESP
483 	}
484 #endif
485 
486 	tp = ttymalloc();
487 	tp->t_oproc = comstart;
488 	tp->t_param = comparam;
489 	tp->t_hwiflow = comhwiflow;
490 
491 	sc->sc_tty = tp;
492 	sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT);
493 	if (sc->sc_rbuf == NULL) {
494 		printf("%s: unable to allocate ring buffer\n",
495 		    sc->sc_dev.dv_xname);
496 		return;
497 	}
498 	sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1);
499 
500 	tty_attach(tp);
501 
502 	if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN))
503 		SET(sc->sc_mcr, MCR_IENABLE);
504 
505 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
506 		int maj;
507 
508 		/* locate the major number */
509 		for (maj = 0; maj < nchrdev; maj++)
510 			if (cdevsw[maj].d_open == comopen)
511 				break;
512 
513 		cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit);
514 
515 		printf("%s: console\n", sc->sc_dev.dv_xname);
516 	}
517 
518 #ifdef KGDB
519 	/*
520 	 * Allow kgdb to "take over" this port.  If this is
521 	 * the kgdb device, it has exclusive use.
522 	 */
523 	if (iot == com_kgdb_iot && iobase == com_kgdb_addr) {
524 		com_kgdb_attached = 1;
525 
526 		SET(sc->sc_hwflags, COM_HW_KGDB);
527 		printf("%s: kgdb\n", sc->sc_dev.dv_xname);
528 	}
529 #endif
530 
531 #ifdef __GENERIC_SOFT_INTERRUPTS
532 	sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc);
533 #endif
534 
535 #if NRND > 0 && defined(RND_COM)
536 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
537 			  RND_TYPE_TTY, 0);
538 #endif
539 
540 	/* if there are no enable/disable functions, assume the device
541 	   is always enabled */
542 	if (!sc->enable)
543 		sc->enabled = 1;
544 
545 	com_config(sc);
546 
547 	SET(sc->sc_hwflags, COM_HW_DEV_OK);
548 }
549 
550 void
551 com_config(sc)
552 	struct com_softc *sc;
553 {
554 	bus_space_tag_t iot = sc->sc_iot;
555 	bus_space_handle_t ioh = sc->sc_ioh;
556 
557 	/* Disable interrupts before configuring the device. */
558 	sc->sc_ier = 0;
559 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
560 
561 #ifdef COM_HAYESP
562 	/* Look for a Hayes ESP board. */
563 	if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) {
564 		sc->sc_fifolen = 1024;
565 
566 		/* Set 16550 compatibility mode */
567 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
568 				  HAYESP_SETMODE);
569 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
570 				  HAYESP_MODE_FIFO|HAYESP_MODE_RTS|
571 				  HAYESP_MODE_SCALE);
572 
573 		/* Set RTS/CTS flow control */
574 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
575 				  HAYESP_SETFLOWTYPE);
576 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
577 				  HAYESP_FLOW_RTS);
578 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
579 				  HAYESP_FLOW_CTS);
580 
581 		/* Set flow control levels */
582 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1,
583 				  HAYESP_SETRXFLOW);
584 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
585 				  HAYESP_HIBYTE(HAYESP_RXHIWMARK));
586 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
587 				  HAYESP_LOBYTE(HAYESP_RXHIWMARK));
588 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
589 				  HAYESP_HIBYTE(HAYESP_RXLOWMARK));
590 		bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2,
591 				  HAYESP_LOBYTE(HAYESP_RXLOWMARK));
592 	}
593 #endif
594 
595 #ifdef DDB
596 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
597 		com_enable_debugport(sc);
598 #endif
599 
600 #ifdef KGDB
601 	/*
602 	 * Allow kgdb to "take over" this port.  If this is
603 	 * the kgdb device, it has exclusive use.
604 	 */
605 	if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
606 		com_enable_debugport(sc);
607 #endif
608 }
609 
610 int
611 com_detach(self, flags)
612 	struct device *self;
613 	int flags;
614 {
615 	struct com_softc *sc = (struct com_softc *)self;
616 	int maj, mn;
617 
618 	/* locate the major number */
619 	for (maj = 0; maj < nchrdev; maj++)
620 		if (cdevsw[maj].d_open == comopen)
621 			break;
622 
623 	/* Nuke the vnodes for any open instances. */
624 	mn = self->dv_unit;
625 	vdevgone(maj, mn, mn, VCHR);
626 
627 	mn |= COMDIALOUT_MASK;
628 	vdevgone(maj, mn, mn, VCHR);
629 
630 	/* Free the receive buffer. */
631 	free(sc->sc_rbuf, M_DEVBUF);
632 
633 	/* Detach and free the tty. */
634 	tty_detach(sc->sc_tty);
635 	ttyfree(sc->sc_tty);
636 
637 #ifdef __GENERIC_SOFT_INTERRUPTS
638 	/* Unhook the soft interrupt handler. */
639 	softintr_disestablish(sc->sc_si);
640 #endif
641 
642 #if NRND > 0 && defined(RND_COM)
643 	/* Unhook the entropy source. */
644 	rnd_detach_source(&sc->rnd_source);
645 #endif
646 
647 	return (0);
648 }
649 
650 int
651 com_activate(self, act)
652 	struct device *self;
653 	enum devact act;
654 {
655 	struct com_softc *sc = (struct com_softc *)self;
656 	int s, rv = 0;
657 
658 	s = splserial();
659 	switch (act) {
660 	case DVACT_ACTIVATE:
661 		rv = EOPNOTSUPP;
662 		break;
663 
664 	case DVACT_DEACTIVATE:
665 		if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) {
666 			rv = EBUSY;
667 			break;
668 		}
669 
670 		if (sc->disable != NULL && sc->enabled != 0) {
671 			(*sc->disable)(sc);
672 			sc->enabled = 0;
673 		}
674 		break;
675 	}
676 	splx(s);
677 	return (rv);
678 }
679 
680 void
681 com_shutdown(sc)
682 	struct com_softc *sc;
683 {
684 	struct tty *tp = sc->sc_tty;
685 	int s;
686 
687 	s = splserial();
688 
689 	/* If we were asserting flow control, then deassert it. */
690 	SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
691 	com_hwiflow(sc);
692 
693 	/* Clear any break condition set with TIOCSBRK. */
694 	com_break(sc, 0);
695 
696 	/* Turn off PPS capture on last close. */
697 	sc->sc_ppsmask = 0;
698 	sc->ppsparam.mode = 0;
699 
700 	/*
701 	 * Hang up if necessary.  Wait a bit, so the other side has time to
702 	 * notice even if we immediately open the port again.
703 	 */
704 	if (ISSET(tp->t_cflag, HUPCL)) {
705 		com_modem(sc, 0);
706 		(void) tsleep(sc, TTIPRI, ttclos, hz);
707 	}
708 
709 	/* Turn off interrupts. */
710 #ifdef DDB
711 	if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
712 		sc->sc_ier = IER_ERXRDY; /* interrupt on break */
713 	else
714 #endif
715 		sc->sc_ier = 0;
716 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
717 
718 	if (sc->disable) {
719 #ifdef DIAGNOSTIC
720 		if (!sc->enabled)
721 			panic("com_shutdown: not enabled?");
722 #endif
723 		(*sc->disable)(sc);
724 		sc->enabled = 0;
725 	}
726 
727 	splx(s);
728 }
729 
730 int
731 comopen(dev, flag, mode, p)
732 	dev_t dev;
733 	int flag, mode;
734 	struct proc *p;
735 {
736 	int unit = COMUNIT(dev);
737 	struct com_softc *sc;
738 	struct tty *tp;
739 	int s, s2;
740 	int error;
741 
742 	if (unit >= com_cd.cd_ndevs)
743 		return (ENXIO);
744 	sc = com_cd.cd_devs[unit];
745 	if (sc == 0 || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) ||
746 	    sc->sc_rbuf == NULL)
747 		return (ENXIO);
748 
749 	if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0)
750 		return (ENXIO);
751 
752 #ifdef KGDB
753 	/*
754 	 * If this is the kgdb port, no other use is permitted.
755 	 */
756 	if (ISSET(sc->sc_hwflags, COM_HW_KGDB))
757 		return (EBUSY);
758 #endif
759 
760 	tp = sc->sc_tty;
761 
762 	if (ISSET(tp->t_state, TS_ISOPEN) &&
763 	    ISSET(tp->t_state, TS_XCLUDE) &&
764 	    p->p_ucred->cr_uid != 0)
765 		return (EBUSY);
766 
767 	s = spltty();
768 
769 	/*
770 	 * Do the following iff this is a first open.
771 	 */
772 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
773 		struct termios t;
774 
775 		tp->t_dev = dev;
776 
777 		s2 = splserial();
778 
779 		if (sc->enable) {
780 			if ((*sc->enable)(sc)) {
781 				splx(s2);
782 				splx(s);
783 				printf("%s: device enable failed\n",
784 				       sc->sc_dev.dv_xname);
785 				return (EIO);
786 			}
787 			sc->enabled = 1;
788 			com_config(sc);
789 		}
790 
791 		/* Turn on interrupts. */
792 		sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC;
793 		bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
794 
795 		/* Fetch the current modem control status, needed later. */
796 		sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr);
797 
798 		/* Clear PPS capture state on first open. */
799 		sc->sc_ppsmask = 0;
800 		sc->ppsparam.mode = 0;
801 
802 		splx(s2);
803 
804 		/*
805 		 * Initialize the termios status to the defaults.  Add in the
806 		 * sticky bits from TIOCSFLAGS.
807 		 */
808 		t.c_ispeed = 0;
809 		if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
810 			t.c_ospeed = comconsrate;
811 			t.c_cflag = comconscflag;
812 		} else {
813 			t.c_ospeed = TTYDEF_SPEED;
814 			t.c_cflag = TTYDEF_CFLAG;
815 		}
816 		if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
817 			SET(t.c_cflag, CLOCAL);
818 		if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
819 			SET(t.c_cflag, CRTSCTS);
820 		if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
821 			SET(t.c_cflag, MDMBUF);
822 		/* Make sure comparam() will do something. */
823 		tp->t_ospeed = 0;
824 		(void) comparam(tp, &t);
825 		tp->t_iflag = TTYDEF_IFLAG;
826 		tp->t_oflag = TTYDEF_OFLAG;
827 		tp->t_lflag = TTYDEF_LFLAG;
828 		ttychars(tp);
829 		ttsetwater(tp);
830 
831 		s2 = splserial();
832 
833 		/*
834 		 * Turn on DTR.  We must always do this, even if carrier is not
835 		 * present, because otherwise we'd have to use TIOCSDTR
836 		 * immediately after setting CLOCAL, which applications do not
837 		 * expect.  We always assert DTR while the device is open
838 		 * unless explicitly requested to deassert it.
839 		 */
840 		com_modem(sc, 1);
841 
842 		/* Clear the input ring, and unblock. */
843 		sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf;
844 		sc->sc_rbavail = com_rbuf_size;
845 		com_iflush(sc);
846 		CLR(sc->sc_rx_flags, RX_ANY_BLOCK);
847 		com_hwiflow(sc);
848 
849 #ifdef COM_DEBUG
850 		if (com_debug)
851 			comstatus(sc, "comopen  ");
852 #endif
853 
854 		splx(s2);
855 	}
856 
857 	splx(s);
858 
859 	error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK));
860 	if (error)
861 		goto bad;
862 
863 	error = (*linesw[tp->t_line].l_open)(dev, tp);
864 	if (error)
865 		goto bad;
866 
867 	return (0);
868 
869 bad:
870 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
871 		/*
872 		 * We failed to open the device, and nobody else had it opened.
873 		 * Clean up the state as appropriate.
874 		 */
875 		com_shutdown(sc);
876 	}
877 
878 	return (error);
879 }
880 
881 int
882 comclose(dev, flag, mode, p)
883 	dev_t dev;
884 	int flag, mode;
885 	struct proc *p;
886 {
887 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
888 	struct tty *tp = sc->sc_tty;
889 
890 	/* XXX This is for cons.c. */
891 	if (!ISSET(tp->t_state, TS_ISOPEN))
892 		return (0);
893 
894 	(*linesw[tp->t_line].l_close)(tp, flag);
895 	ttyclose(tp);
896 
897 	if (COM_ISALIVE(sc) == 0)
898 		return (0);
899 
900 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
901 		/*
902 		 * Although we got a last close, the device may still be in
903 		 * use; e.g. if this was the dialout node, and there are still
904 		 * processes waiting for carrier on the non-dialout node.
905 		 */
906 		com_shutdown(sc);
907 	}
908 
909 	return (0);
910 }
911 
912 int
913 comread(dev, uio, flag)
914 	dev_t dev;
915 	struct uio *uio;
916 	int flag;
917 {
918 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
919 	struct tty *tp = sc->sc_tty;
920 
921 	if (COM_ISALIVE(sc) == 0)
922 		return (EIO);
923 
924 	return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
925 }
926 
927 int
928 comwrite(dev, uio, flag)
929 	dev_t dev;
930 	struct uio *uio;
931 	int flag;
932 {
933 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
934 	struct tty *tp = sc->sc_tty;
935 
936 	if (COM_ISALIVE(sc) == 0)
937 		return (EIO);
938 
939 	return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
940 }
941 
942 struct tty *
943 comtty(dev)
944 	dev_t dev;
945 {
946 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
947 	struct tty *tp = sc->sc_tty;
948 
949 	return (tp);
950 }
951 
952 int
953 comioctl(dev, cmd, data, flag, p)
954 	dev_t dev;
955 	u_long cmd;
956 	caddr_t data;
957 	int flag;
958 	struct proc *p;
959 {
960 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(dev)];
961 	struct tty *tp = sc->sc_tty;
962 	int error;
963 	int s;
964 
965 	if (COM_ISALIVE(sc) == 0)
966 		return (EIO);
967 
968 	error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
969 	if (error >= 0)
970 		return (error);
971 
972 	error = ttioctl(tp, cmd, data, flag, p);
973 	if (error >= 0)
974 		return (error);
975 
976 	error = 0;
977 
978 	s = splserial();
979 
980 	switch (cmd) {
981 	case TIOCSBRK:
982 		com_break(sc, 1);
983 		break;
984 
985 	case TIOCCBRK:
986 		com_break(sc, 0);
987 		break;
988 
989 	case TIOCSDTR:
990 		com_modem(sc, 1);
991 		break;
992 
993 	case TIOCCDTR:
994 		com_modem(sc, 0);
995 		break;
996 
997 	case TIOCGFLAGS:
998 		*(int *)data = sc->sc_swflags;
999 		break;
1000 
1001 	case TIOCSFLAGS:
1002 		error = suser(p->p_ucred, &p->p_acflag);
1003 		if (error)
1004 			break;
1005 		sc->sc_swflags = *(int *)data;
1006 		break;
1007 
1008 	case TIOCMSET:
1009 	case TIOCMBIS:
1010 	case TIOCMBIC:
1011 		tiocm_to_com(sc, cmd, *(int *)data);
1012 		break;
1013 
1014 	case TIOCMGET:
1015 		*(int *)data = com_to_tiocm(sc);
1016 		break;
1017 
1018 	case PPS_CREATE:
1019 		break;
1020 
1021 	case PPS_DESTROY:
1022 		break;
1023 
1024 	case PPS_GETPARAMS: {
1025 		pps_params_t *pp;
1026 		pp = (pps_params_t *)data;
1027 		*pp = sc->ppsparam;
1028 		break;
1029 	}
1030 
1031 	case PPS_SETPARAMS: {
1032 	  	pps_params_t *pp;
1033 		int mode;
1034 		pp = (pps_params_t *)data;
1035 		if (pp->mode & ~ppscap) {
1036 			error = EINVAL;
1037 			break;
1038 		}
1039 		sc->ppsparam = *pp;
1040 	 	/*
1041 		 * Compute msr masks from user-specified timestamp state.
1042 		 */
1043 		mode = sc->ppsparam.mode;
1044 #ifdef	PPS_SYNC
1045 		if (mode & PPS_HARDPPSONASSERT) {
1046 			mode |= PPS_CAPTUREASSERT;
1047 			/* XXX revoke any previous HARDPPS source */
1048 		}
1049 		if (mode & PPS_HARDPPSONCLEAR) {
1050 			mode |= PPS_CAPTURECLEAR;
1051 			/* XXX revoke any previous HARDPPS source */
1052 		}
1053 #endif	/* PPS_SYNC */
1054 		switch (mode & PPS_CAPTUREBOTH) {
1055 		case 0:
1056 			sc->sc_ppsmask = 0;
1057 			break;
1058 
1059 		case PPS_CAPTUREASSERT:
1060 			sc->sc_ppsmask = MSR_DCD;
1061 			sc->sc_ppsassert = MSR_DCD;
1062 			sc->sc_ppsclear = -1;
1063 			break;
1064 
1065 		case PPS_CAPTURECLEAR:
1066 			sc->sc_ppsmask = MSR_DCD;
1067 			sc->sc_ppsassert = -1;
1068 			sc->sc_ppsclear = 0;
1069 			break;
1070 
1071 		case PPS_CAPTUREBOTH:
1072 			sc->sc_ppsmask = MSR_DCD;
1073 			sc->sc_ppsassert = MSR_DCD;
1074 			sc->sc_ppsclear = 0;
1075 			break;
1076 
1077 		default:
1078 			error = EINVAL;
1079 			break;
1080 		}
1081 		break;
1082 	}
1083 
1084 	case PPS_GETCAP:
1085 		*(int*)data = ppscap;
1086 		break;
1087 
1088 	case PPS_FETCH: {
1089 		pps_info_t *pi;
1090 		pi = (pps_info_t *)data;
1091 		*pi = sc->ppsinfo;
1092 		break;
1093 	}
1094 
1095 	case PPS_WAIT:
1096 		/* XXX */
1097 		error = EOPNOTSUPP;
1098 		break;
1099 
1100 	case TIOCDCDTIMESTAMP:	/* XXX old, overloaded  API used by xntpd v3 */
1101 		/*
1102 		 * Some GPS clocks models use the falling rather than
1103 		 * rising edge as the on-the-second signal.
1104 		 * The old API has no way to specify PPS polarity.
1105 		 */
1106 		sc->sc_ppsmask = MSR_DCD;
1107 #ifndef PPS_TRAILING_EDGE
1108 		sc->sc_ppsassert = MSR_DCD;
1109 		sc->sc_ppsclear = -1;
1110 		TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1111 		    &sc->ppsinfo.assert_timestamp);
1112 #else
1113 		sc->sc_ppsassert = -1
1114 		sc->sc_ppsclear = 0;
1115 		TIMESPEC_TO_TIMEVAL((struct timeval *)data,
1116 		    &sc->ppsinfo.clear_timestamp);
1117 #endif
1118 		break;
1119 
1120 	default:
1121 		error = ENOTTY;
1122 		break;
1123 	}
1124 
1125 	splx(s);
1126 
1127 #ifdef COM_DEBUG
1128 	if (com_debug)
1129 		comstatus(sc, "comioctl ");
1130 #endif
1131 
1132 	return (error);
1133 }
1134 
1135 integrate void
1136 com_schedrx(sc)
1137 	struct com_softc *sc;
1138 {
1139 
1140 	sc->sc_rx_ready = 1;
1141 
1142 	/* Wake up the poller. */
1143 #ifdef __GENERIC_SOFT_INTERRUPTS
1144 	softintr_schedule(sc->sc_si);
1145 #else
1146 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1147 	setsoftserial();
1148 #else
1149 	if (!com_softintr_scheduled) {
1150 		com_softintr_scheduled = 1;
1151 		timeout(comsoft, NULL, 1);
1152 	}
1153 #endif
1154 #endif
1155 }
1156 
1157 void
1158 com_break(sc, onoff)
1159 	struct com_softc *sc;
1160 	int onoff;
1161 {
1162 
1163 	if (onoff)
1164 		SET(sc->sc_lcr, LCR_SBREAK);
1165 	else
1166 		CLR(sc->sc_lcr, LCR_SBREAK);
1167 
1168 	if (!sc->sc_heldchange) {
1169 		if (sc->sc_tx_busy) {
1170 			sc->sc_heldtbc = sc->sc_tbc;
1171 			sc->sc_tbc = 0;
1172 			sc->sc_heldchange = 1;
1173 		} else
1174 			com_loadchannelregs(sc);
1175 	}
1176 }
1177 
1178 void
1179 com_modem(sc, onoff)
1180 	struct com_softc *sc;
1181 	int onoff;
1182 {
1183 
1184 	if (sc->sc_mcr_dtr == 0)
1185 		return;
1186 
1187 	if (onoff)
1188 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
1189 	else
1190 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1191 
1192 	if (!sc->sc_heldchange) {
1193 		if (sc->sc_tx_busy) {
1194 			sc->sc_heldtbc = sc->sc_tbc;
1195 			sc->sc_tbc = 0;
1196 			sc->sc_heldchange = 1;
1197 		} else
1198 			com_loadchannelregs(sc);
1199 	}
1200 }
1201 
1202 void
1203 tiocm_to_com(sc, how, ttybits)
1204 	struct com_softc *sc;
1205 	int how, ttybits;
1206 {
1207 	u_char combits;
1208 
1209 	combits = 0;
1210 	if (ISSET(ttybits, TIOCM_DTR))
1211 		SET(combits, MCR_DTR);
1212 	if (ISSET(ttybits, TIOCM_RTS))
1213 		SET(combits, MCR_RTS);
1214 
1215 	switch (how) {
1216 	case TIOCMBIC:
1217 		CLR(sc->sc_mcr, combits);
1218 		break;
1219 
1220 	case TIOCMBIS:
1221 		SET(sc->sc_mcr, combits);
1222 		break;
1223 
1224 	case TIOCMSET:
1225 		CLR(sc->sc_mcr, MCR_DTR | MCR_RTS);
1226 		SET(sc->sc_mcr, combits);
1227 		break;
1228 	}
1229 
1230 	if (!sc->sc_heldchange) {
1231 		if (sc->sc_tx_busy) {
1232 			sc->sc_heldtbc = sc->sc_tbc;
1233 			sc->sc_tbc = 0;
1234 			sc->sc_heldchange = 1;
1235 		} else
1236 			com_loadchannelregs(sc);
1237 	}
1238 }
1239 
1240 int
1241 com_to_tiocm(sc)
1242 	struct com_softc *sc;
1243 {
1244 	u_char combits;
1245 	int ttybits = 0;
1246 
1247 	combits = sc->sc_mcr;
1248 	if (ISSET(combits, MCR_DTR))
1249 		SET(ttybits, TIOCM_DTR);
1250 	if (ISSET(combits, MCR_RTS))
1251 		SET(ttybits, TIOCM_RTS);
1252 
1253 	combits = sc->sc_msr;
1254 	if (ISSET(combits, MSR_DCD))
1255 		SET(ttybits, TIOCM_CD);
1256 	if (ISSET(combits, MSR_CTS))
1257 		SET(ttybits, TIOCM_CTS);
1258 	if (ISSET(combits, MSR_DSR))
1259 		SET(ttybits, TIOCM_DSR);
1260 	if (ISSET(combits, MSR_RI | MSR_TERI))
1261 		SET(ttybits, TIOCM_RI);
1262 
1263 	if (sc->sc_ier != 0)
1264 		SET(ttybits, TIOCM_LE);
1265 
1266 	return (ttybits);
1267 }
1268 
1269 static u_char
1270 cflag2lcr(cflag)
1271 	tcflag_t cflag;
1272 {
1273 	u_char lcr = 0;
1274 
1275 	switch (ISSET(cflag, CSIZE)) {
1276 	case CS5:
1277 		SET(lcr, LCR_5BITS);
1278 		break;
1279 	case CS6:
1280 		SET(lcr, LCR_6BITS);
1281 		break;
1282 	case CS7:
1283 		SET(lcr, LCR_7BITS);
1284 		break;
1285 	case CS8:
1286 		SET(lcr, LCR_8BITS);
1287 		break;
1288 	}
1289 	if (ISSET(cflag, PARENB)) {
1290 		SET(lcr, LCR_PENAB);
1291 		if (!ISSET(cflag, PARODD))
1292 			SET(lcr, LCR_PEVEN);
1293 	}
1294 	if (ISSET(cflag, CSTOPB))
1295 		SET(lcr, LCR_STOPB);
1296 
1297 	return (lcr);
1298 }
1299 
1300 int
1301 comparam(tp, t)
1302 	struct tty *tp;
1303 	struct termios *t;
1304 {
1305 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1306 	int ospeed = comspeed(t->c_ospeed, sc->sc_frequency);
1307 	u_char lcr;
1308 	int s;
1309 
1310 	if (COM_ISALIVE(sc) == 0)
1311 		return (EIO);
1312 
1313 	/* Check requested parameters. */
1314 	if (ospeed < 0)
1315 		return (EINVAL);
1316 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1317 		return (EINVAL);
1318 
1319 	/*
1320 	 * For the console, always force CLOCAL and !HUPCL, so that the port
1321 	 * is always active.
1322 	 */
1323 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
1324 	    ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1325 		SET(t->c_cflag, CLOCAL);
1326 		CLR(t->c_cflag, HUPCL);
1327 	}
1328 
1329 	/*
1330 	 * If there were no changes, don't do anything.  This avoids dropping
1331 	 * input and improves performance when all we did was frob things like
1332 	 * VMIN and VTIME.
1333 	 */
1334 	if (tp->t_ospeed == t->c_ospeed &&
1335 	    tp->t_cflag == t->c_cflag)
1336 		return (0);
1337 
1338 	lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag);
1339 
1340 	s = splserial();
1341 
1342 	sc->sc_lcr = lcr;
1343 
1344 	/*
1345 	 * If we're not in a mode that assumes a connection is present, then
1346 	 * ignore carrier changes.
1347 	 */
1348 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
1349 		sc->sc_msr_dcd = 0;
1350 	else
1351 		sc->sc_msr_dcd = MSR_DCD;
1352 	/*
1353 	 * Set the flow control pins depending on the current flow control
1354 	 * mode.
1355 	 */
1356 	if (ISSET(t->c_cflag, CRTSCTS)) {
1357 		sc->sc_mcr_dtr = MCR_DTR;
1358 		sc->sc_mcr_rts = MCR_RTS;
1359 		sc->sc_msr_cts = MSR_CTS;
1360 		sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS;
1361 	} else if (ISSET(t->c_cflag, MDMBUF)) {
1362 		/*
1363 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
1364 		 * carrier detection.
1365 		 */
1366 		sc->sc_mcr_dtr = 0;
1367 		sc->sc_mcr_rts = MCR_DTR;
1368 		sc->sc_msr_cts = MSR_DCD;
1369 		sc->sc_efr = 0;
1370 	} else {
1371 		/*
1372 		 * If no flow control, then always set RTS.  This will make
1373 		 * the other side happy if it mistakenly thinks we're doing
1374 		 * RTS/CTS flow control.
1375 		 */
1376 		sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
1377 		sc->sc_mcr_rts = 0;
1378 		sc->sc_msr_cts = 0;
1379 		sc->sc_efr = 0;
1380 		if (ISSET(sc->sc_mcr, MCR_DTR))
1381 			SET(sc->sc_mcr, MCR_RTS);
1382 		else
1383 			CLR(sc->sc_mcr, MCR_RTS);
1384 	}
1385 	sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
1386 
1387 #if 0
1388 	if (ospeed == 0)
1389 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
1390 	else
1391 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
1392 #endif
1393 
1394 	sc->sc_dlbl = ospeed;
1395 	sc->sc_dlbh = ospeed >> 8;
1396 
1397 	/*
1398 	 * Set the FIFO threshold based on the receive speed.
1399 	 *
1400 	 *  * If it's a low speed, it's probably a mouse or some other
1401 	 *    interactive device, so set the threshold low.
1402 	 *  * If it's a high speed, trim the trigger level down to prevent
1403 	 *    overflows.
1404 	 *  * Otherwise set it a bit higher.
1405 	 */
1406 	if (ISSET(sc->sc_hwflags, COM_HW_HAYESP))
1407 		sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8;
1408 	else if (ISSET(sc->sc_hwflags, COM_HW_FIFO))
1409 		sc->sc_fifo = FIFO_ENABLE |
1410 		    (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 :
1411 		     t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4);
1412 	else
1413 		sc->sc_fifo = 0;
1414 
1415 	/* And copy to tty. */
1416 	tp->t_ispeed = 0;
1417 	tp->t_ospeed = t->c_ospeed;
1418 	tp->t_cflag = t->c_cflag;
1419 
1420 	if (!sc->sc_heldchange) {
1421 		if (sc->sc_tx_busy) {
1422 			sc->sc_heldtbc = sc->sc_tbc;
1423 			sc->sc_tbc = 0;
1424 			sc->sc_heldchange = 1;
1425 		} else
1426 			com_loadchannelregs(sc);
1427 	}
1428 
1429 	if (!ISSET(t->c_cflag, CHWFLOW)) {
1430 		/* Disable the high water mark. */
1431 		sc->sc_r_hiwat = 0;
1432 		sc->sc_r_lowat = 0;
1433 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1434 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1435 			com_schedrx(sc);
1436 		}
1437 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) {
1438 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED);
1439 			com_hwiflow(sc);
1440 		}
1441 	} else {
1442 		sc->sc_r_hiwat = com_rbuf_hiwat;
1443 		sc->sc_r_lowat = com_rbuf_lowat;
1444 	}
1445 
1446 	splx(s);
1447 
1448 	/*
1449 	 * Update the tty layer's idea of the carrier bit, in case we changed
1450 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that by
1451 	 * explicit request.
1452 	 */
1453 	(void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD));
1454 
1455 #ifdef COM_DEBUG
1456 	if (com_debug)
1457 		comstatus(sc, "comparam ");
1458 #endif
1459 
1460 	if (!ISSET(t->c_cflag, CHWFLOW)) {
1461 		if (sc->sc_tx_stopped) {
1462 			sc->sc_tx_stopped = 0;
1463 			comstart(tp);
1464 		}
1465 	}
1466 
1467 	return (0);
1468 }
1469 
1470 void
1471 com_iflush(sc)
1472 	struct com_softc *sc;
1473 {
1474 	bus_space_tag_t iot = sc->sc_iot;
1475 	bus_space_handle_t ioh = sc->sc_ioh;
1476 #ifdef DIAGNOSTIC
1477 	int reg;
1478 #endif
1479 	int timo;
1480 
1481 #ifdef DIAGNOSTIC
1482 	reg = 0xffff;
1483 #endif
1484 	timo = 50000;
1485 	/* flush any pending I/O */
1486 	while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)
1487 	    && --timo)
1488 #ifdef DIAGNOSTIC
1489 		reg =
1490 #else
1491 		    (void)
1492 #endif
1493 		    bus_space_read_1(iot, ioh, com_data);
1494 #ifdef DIAGNOSTIC
1495 	if (!timo)
1496 		printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname,
1497 		       reg);
1498 #endif
1499 }
1500 
1501 void
1502 com_loadchannelregs(sc)
1503 	struct com_softc *sc;
1504 {
1505 	bus_space_tag_t iot = sc->sc_iot;
1506 	bus_space_handle_t ioh = sc->sc_ioh;
1507 
1508 	/* XXXXX necessary? */
1509 	com_iflush(sc);
1510 
1511 	bus_space_write_1(iot, ioh, com_ier, 0);
1512 
1513 	if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) {
1514 		bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
1515 		bus_space_write_1(iot, ioh, com_efr, sc->sc_efr);
1516 	}
1517 	bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB);
1518 	bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl);
1519 	bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh);
1520 	bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr);
1521 	bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr);
1522 	bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo);
1523 
1524 	bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1525 }
1526 
1527 int
1528 comhwiflow(tp, block)
1529 	struct tty *tp;
1530 	int block;
1531 {
1532 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1533 	int s;
1534 
1535 	if (COM_ISALIVE(sc) == 0)
1536 		return (0);
1537 
1538 	if (sc->sc_mcr_rts == 0)
1539 		return (0);
1540 
1541 	s = splserial();
1542 	if (block) {
1543 		if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1544 			SET(sc->sc_rx_flags, RX_TTY_BLOCKED);
1545 			com_hwiflow(sc);
1546 		}
1547 	} else {
1548 		if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) {
1549 			CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1550 			com_schedrx(sc);
1551 		}
1552 		if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1553 			CLR(sc->sc_rx_flags, RX_TTY_BLOCKED);
1554 			com_hwiflow(sc);
1555 		}
1556 	}
1557 	splx(s);
1558 	return (1);
1559 }
1560 
1561 /*
1562  * (un)block input via hw flowcontrol
1563  */
1564 void
1565 com_hwiflow(sc)
1566 	struct com_softc *sc;
1567 {
1568 	bus_space_tag_t iot = sc->sc_iot;
1569 	bus_space_handle_t ioh = sc->sc_ioh;
1570 
1571 	if (sc->sc_mcr_rts == 0)
1572 		return;
1573 
1574 	if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) {
1575 		CLR(sc->sc_mcr, sc->sc_mcr_rts);
1576 		CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
1577 	} else {
1578 		SET(sc->sc_mcr, sc->sc_mcr_rts);
1579 		SET(sc->sc_mcr_active, sc->sc_mcr_rts);
1580 	}
1581 	bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active);
1582 }
1583 
1584 
1585 void
1586 comstart(tp)
1587 	struct tty *tp;
1588 {
1589 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1590 	bus_space_tag_t iot = sc->sc_iot;
1591 	bus_space_handle_t ioh = sc->sc_ioh;
1592 	int s;
1593 
1594 	if (COM_ISALIVE(sc) == 0)
1595 		return;
1596 
1597 	s = spltty();
1598 	if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP))
1599 		goto out;
1600 	if (sc->sc_tx_stopped)
1601 		goto out;
1602 
1603 	if (tp->t_outq.c_cc <= tp->t_lowat) {
1604 		if (ISSET(tp->t_state, TS_ASLEEP)) {
1605 			CLR(tp->t_state, TS_ASLEEP);
1606 			wakeup(&tp->t_outq);
1607 		}
1608 		selwakeup(&tp->t_wsel);
1609 		if (tp->t_outq.c_cc == 0)
1610 			goto out;
1611 	}
1612 
1613 	/* Grab the first contiguous region of buffer space. */
1614 	{
1615 		u_char *tba;
1616 		int tbc;
1617 
1618 		tba = tp->t_outq.c_cf;
1619 		tbc = ndqb(&tp->t_outq, 0);
1620 
1621 		(void)splserial();
1622 
1623 		sc->sc_tba = tba;
1624 		sc->sc_tbc = tbc;
1625 	}
1626 
1627 	SET(tp->t_state, TS_BUSY);
1628 	sc->sc_tx_busy = 1;
1629 
1630 	/* Enable transmit completion interrupts if necessary. */
1631 	if (!ISSET(sc->sc_ier, IER_ETXRDY)) {
1632 		SET(sc->sc_ier, IER_ETXRDY);
1633 		bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1634 	}
1635 
1636 	/* Output the first chunk of the contiguous buffer. */
1637 	{
1638 		int n;
1639 
1640 		n = sc->sc_tbc;
1641 		if (n > sc->sc_fifolen)
1642 			n = sc->sc_fifolen;
1643 		bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
1644 		sc->sc_tbc -= n;
1645 		sc->sc_tba += n;
1646 	}
1647 out:
1648 	splx(s);
1649 	return;
1650 }
1651 
1652 /*
1653  * Stop output on a line.
1654  */
1655 void
1656 comstop(tp, flag)
1657 	struct tty *tp;
1658 	int flag;
1659 {
1660 	struct com_softc *sc = com_cd.cd_devs[COMUNIT(tp->t_dev)];
1661 	int s;
1662 
1663 	s = splserial();
1664 	if (ISSET(tp->t_state, TS_BUSY)) {
1665 		/* Stop transmitting at the next chunk. */
1666 		sc->sc_tbc = 0;
1667 		sc->sc_heldtbc = 0;
1668 		if (!ISSET(tp->t_state, TS_TTSTOP))
1669 			SET(tp->t_state, TS_FLUSH);
1670 	}
1671 	splx(s);
1672 }
1673 
1674 void
1675 comdiag(arg)
1676 	void *arg;
1677 {
1678 	struct com_softc *sc = arg;
1679 	int overflows, floods;
1680 	int s;
1681 
1682 	s = splserial();
1683 	overflows = sc->sc_overflows;
1684 	sc->sc_overflows = 0;
1685 	floods = sc->sc_floods;
1686 	sc->sc_floods = 0;
1687 	sc->sc_errors = 0;
1688 	splx(s);
1689 
1690 	log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n",
1691 	    sc->sc_dev.dv_xname,
1692 	    overflows, overflows == 1 ? "" : "s",
1693 	    floods, floods == 1 ? "" : "s");
1694 }
1695 
1696 integrate void
1697 com_rxsoft(sc, tp)
1698 	struct com_softc *sc;
1699 	struct tty *tp;
1700 {
1701 	int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint;
1702 	u_char *get, *end;
1703 	u_int cc, scc;
1704 	u_char lsr;
1705 	int code;
1706 	int s;
1707 
1708 	end = sc->sc_ebuf;
1709 	get = sc->sc_rbget;
1710 	scc = cc = com_rbuf_size - sc->sc_rbavail;
1711 
1712 	if (cc == com_rbuf_size) {
1713 		sc->sc_floods++;
1714 		if (sc->sc_errors++ == 0)
1715 			timeout(comdiag, sc, 60 * hz);
1716 	}
1717 
1718 	while (cc) {
1719 		code = get[0];
1720 		lsr = get[1];
1721 		if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) {
1722 			if (ISSET(lsr, LSR_OE)) {
1723 				sc->sc_overflows++;
1724 				if (sc->sc_errors++ == 0)
1725 					timeout(comdiag, sc, 60 * hz);
1726 			}
1727 			if (ISSET(lsr, LSR_BI | LSR_FE))
1728 				SET(code, TTY_FE);
1729 			if (ISSET(lsr, LSR_PE))
1730 				SET(code, TTY_PE);
1731 		}
1732 		if ((*rint)(code, tp) == -1) {
1733 			/*
1734 			 * The line discipline's buffer is out of space.
1735 			 */
1736 			if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) {
1737 				/*
1738 				 * We're either not using flow control, or the
1739 				 * line discipline didn't tell us to block for
1740 				 * some reason.  Either way, we have no way to
1741 				 * know when there's more space available, so
1742 				 * just drop the rest of the data.
1743 				 */
1744 				get += cc << 1;
1745 				if (get >= end)
1746 					get -= com_rbuf_size << 1;
1747 				cc = 0;
1748 			} else {
1749 				/*
1750 				 * Don't schedule any more receive processing
1751 				 * until the line discipline tells us there's
1752 				 * space available (through comhwiflow()).
1753 				 * Leave the rest of the data in the input
1754 				 * buffer.
1755 				 */
1756 				SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED);
1757 			}
1758 			break;
1759 		}
1760 		get += 2;
1761 		if (get >= end)
1762 			get = sc->sc_rbuf;
1763 		cc--;
1764 	}
1765 
1766 	if (cc != scc) {
1767 		sc->sc_rbget = get;
1768 		s = splserial();
1769 		cc = sc->sc_rbavail += scc - cc;
1770 		/* Buffers should be ok again, release possible block. */
1771 		if (cc >= sc->sc_r_lowat) {
1772 			if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1773 				CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1774 				SET(sc->sc_ier, IER_ERXRDY);
1775 				bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier);
1776 			}
1777 			if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) {
1778 				CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1779 				com_hwiflow(sc);
1780 			}
1781 		}
1782 		splx(s);
1783 	}
1784 }
1785 
1786 integrate void
1787 com_txsoft(sc, tp)
1788 	struct com_softc *sc;
1789 	struct tty *tp;
1790 {
1791 
1792 	CLR(tp->t_state, TS_BUSY);
1793 	if (ISSET(tp->t_state, TS_FLUSH))
1794 		CLR(tp->t_state, TS_FLUSH);
1795 	else
1796 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1797 	(*linesw[tp->t_line].l_start)(tp);
1798 }
1799 
1800 integrate void
1801 com_stsoft(sc, tp)
1802 	struct com_softc *sc;
1803 	struct tty *tp;
1804 {
1805 	u_char msr, delta;
1806 	int s;
1807 
1808 	s = splserial();
1809 	msr = sc->sc_msr;
1810 	delta = sc->sc_msr_delta;
1811 	sc->sc_msr_delta = 0;
1812 	splx(s);
1813 
1814 	if (ISSET(delta, sc->sc_msr_dcd)) {
1815 		/*
1816 		 * Inform the tty layer that carrier detect changed.
1817 		 */
1818 		(void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD));
1819 	}
1820 
1821 	if (ISSET(delta, sc->sc_msr_cts)) {
1822 		/* Block or unblock output according to flow control. */
1823 		if (ISSET(msr, sc->sc_msr_cts)) {
1824 			sc->sc_tx_stopped = 0;
1825 			(*linesw[tp->t_line].l_start)(tp);
1826 		} else {
1827 			sc->sc_tx_stopped = 1;
1828 		}
1829 	}
1830 
1831 #ifdef COM_DEBUG
1832 	if (com_debug)
1833 		comstatus(sc, "com_stsoft");
1834 #endif
1835 }
1836 
1837 #ifdef __GENERIC_SOFT_INTERRUPTS
1838 void
1839 comsoft(arg)
1840 	void *arg;
1841 {
1842 	struct com_softc *sc = arg;
1843 	struct tty *tp;
1844 
1845 	if (COM_ISALIVE(sc) == 0)
1846 		return;
1847 
1848 	{
1849 #else
1850 void
1851 #ifndef __NO_SOFT_SERIAL_INTERRUPT
1852 comsoft()
1853 #else
1854 comsoft(arg)
1855 	void *arg;
1856 #endif
1857 {
1858 	struct com_softc	*sc;
1859 	struct tty	*tp;
1860 	int	unit;
1861 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1862 	int s;
1863 
1864 	s = splsoftserial();
1865 	com_softintr_scheduled = 0;
1866 #endif
1867 
1868 	for (unit = 0; unit < com_cd.cd_ndevs; unit++) {
1869 		sc = com_cd.cd_devs[unit];
1870 		if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK))
1871 			continue;
1872 
1873 		if (COM_ISALIVE(sc) == 0)
1874 			continue;
1875 
1876 		tp = sc->sc_tty;
1877 		if (tp == NULL)
1878 			continue;
1879 		if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)
1880 			continue;
1881 #endif
1882 		tp = sc->sc_tty;
1883 
1884 		if (sc->sc_rx_ready) {
1885 			sc->sc_rx_ready = 0;
1886 			com_rxsoft(sc, tp);
1887 		}
1888 
1889 		if (sc->sc_st_check) {
1890 			sc->sc_st_check = 0;
1891 			com_stsoft(sc, tp);
1892 		}
1893 
1894 		if (sc->sc_tx_done) {
1895 			sc->sc_tx_done = 0;
1896 			com_txsoft(sc, tp);
1897 		}
1898 	}
1899 
1900 #ifndef __GENERIC_SOFT_INTERRUPTS
1901 #ifdef __NO_SOFT_SERIAL_INTERRUPT
1902 	splx(s);
1903 #endif
1904 #endif
1905 }
1906 
1907 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS
1908 	/* there has got to be a better way to do comsoft() */
1909 }}
1910 #endif
1911 
1912 int
1913 comintr(arg)
1914 	void *arg;
1915 {
1916 	struct com_softc *sc = arg;
1917 	bus_space_tag_t iot = sc->sc_iot;
1918 	bus_space_handle_t ioh = sc->sc_ioh;
1919 	u_char *put, *end;
1920 	u_int cc;
1921 	u_char lsr, iir;
1922 
1923 	if (COM_ISALIVE(sc) == 0)
1924 		return (0);
1925 
1926 	iir = bus_space_read_1(iot, ioh, com_iir);
1927 	if (ISSET(iir, IIR_NOPEND))
1928 		return (0);
1929 
1930 	end = sc->sc_ebuf;
1931 	put = sc->sc_rbput;
1932 	cc = sc->sc_rbavail;
1933 
1934 	do {
1935 		u_char	msr, delta;
1936 
1937 		lsr = bus_space_read_1(iot, ioh, com_lsr);
1938 #if defined(DDB) || defined(KGDB)
1939 		if (ISSET(lsr, LSR_BI)) {
1940 #ifdef DDB
1941 			if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) {
1942 				console_debugger();
1943 				continue;
1944 			}
1945 #endif
1946 #ifdef KGDB
1947 			if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) {
1948 				kgdb_connect(1);
1949 				continue;
1950 			}
1951 #endif
1952 		}
1953 #endif /* DDB || KGDB */
1954 
1955 		if (ISSET(lsr, LSR_RCV_MASK) &&
1956 		    !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) {
1957 			while (cc > 0) {
1958 				put[0] = bus_space_read_1(iot, ioh, com_data);
1959 				put[1] = lsr;
1960 				put += 2;
1961 				if (put >= end)
1962 					put = sc->sc_rbuf;
1963 				cc--;
1964 
1965 				lsr = bus_space_read_1(iot, ioh, com_lsr);
1966 				if (!ISSET(lsr, LSR_RCV_MASK))
1967 					break;
1968 			}
1969 
1970 			/*
1971 			 * Current string of incoming characters ended because
1972 			 * no more data was available or we ran out of space.
1973 			 * Schedule a receive event if any data was received.
1974 			 * If we're out of space, turn off receive interrupts.
1975 			 */
1976 			sc->sc_rbput = put;
1977 			sc->sc_rbavail = cc;
1978 			if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED))
1979 				sc->sc_rx_ready = 1;
1980 
1981 			/*
1982 			 * See if we are in danger of overflowing a buffer. If
1983 			 * so, use hardware flow control to ease the pressure.
1984 			 */
1985 			if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) &&
1986 			    cc < sc->sc_r_hiwat) {
1987 				SET(sc->sc_rx_flags, RX_IBUF_BLOCKED);
1988 				com_hwiflow(sc);
1989 			}
1990 
1991 			/*
1992 			 * If we're out of space, disable receive interrupts
1993 			 * until the queue has drained a bit.
1994 			 */
1995 			if (!cc) {
1996 				SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED);
1997 				CLR(sc->sc_ier, IER_ERXRDY);
1998 				bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
1999 			}
2000 		} else {
2001 			if ((iir & IIR_IMASK) == IIR_RXRDY) {
2002 				bus_space_write_1(iot, ioh, com_ier, 0);
2003 				delay(10);
2004 				bus_space_write_1(iot, ioh, com_ier,sc->sc_ier);
2005 				iir = IIR_NOPEND;
2006 				continue;
2007 			}
2008 		}
2009 
2010 		msr = bus_space_read_1(iot, ioh, com_msr);
2011 		delta = msr ^ sc->sc_msr;
2012 		sc->sc_msr = msr;
2013 		if (ISSET(delta, sc->sc_msr_mask)) {
2014 			SET(sc->sc_msr_delta, delta);
2015 
2016 			/*
2017 			 * Pulse-per-second clock signal on edge of DCD?
2018 			 */
2019 			if (ISSET(delta, sc->sc_ppsmask)) {
2020 				struct timeval tv;
2021 			    	if (ISSET(msr, sc->sc_ppsmask) ==
2022 				    sc->sc_ppsassert) {
2023 					/* XXX nanotime() */
2024 					microtime(&tv);
2025 					TIMEVAL_TO_TIMESPEC(&tv,
2026 					    &sc->ppsinfo.assert_timestamp);
2027 					if (sc->ppsparam.mode & PPS_OFFSETASSERT) {
2028 						timespecadd(&sc->ppsinfo.assert_timestamp,
2029 						    &sc->ppsparam.assert_offset,
2030 						    &sc->ppsinfo.assert_timestamp);
2031 						TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp);
2032 	}
2033 
2034 #ifdef PPS_SYNC
2035 					if (sc->ppsparam.mode & PPS_HARDPPSONASSERT)
2036 						hardpps(&tv, tv.tv_usec);
2037 #endif
2038 					sc->ppsinfo.assert_sequence++;
2039 					sc->ppsinfo.current_mode =
2040 					    sc->ppsparam.mode;
2041 
2042 				} else if (ISSET(msr, sc->sc_ppsmask) ==
2043 				    sc->sc_ppsclear) {
2044 					/* XXX nanotime() */
2045 					microtime(&tv);
2046 					TIMEVAL_TO_TIMESPEC(&tv,
2047 					    &sc->ppsinfo.clear_timestamp);
2048 					if (sc->ppsparam.mode & PPS_OFFSETCLEAR) {
2049 						timespecadd(&sc->ppsinfo.clear_timestamp,
2050 						    &sc->ppsparam.clear_offset,
2051 						    &sc->ppsinfo.clear_timestamp);
2052 						TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp);
2053 	}
2054 
2055 #ifdef PPS_SYNC
2056 					if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR)
2057 						hardpps(&tv, tv.tv_usec);
2058 #endif
2059 					sc->ppsinfo.clear_sequence++;
2060 					sc->ppsinfo.current_mode =
2061 					    sc->ppsparam.mode;
2062 				}
2063 			}
2064 
2065 			/*
2066 			 * Stop output immediately if we lose the output
2067 			 * flow control signal or carrier detect.
2068 			 */
2069 			if (ISSET(~msr, sc->sc_msr_mask)) {
2070 				sc->sc_tbc = 0;
2071 				sc->sc_heldtbc = 0;
2072 #ifdef COM_DEBUG
2073 				if (com_debug)
2074 					comstatus(sc, "comintr  ");
2075 #endif
2076 			}
2077 
2078 			sc->sc_st_check = 1;
2079 		}
2080 	} while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND));
2081 
2082 	/*
2083 	 * Done handling any receive interrupts. See if data can be
2084 	 * transmitted as well. Schedule tx done event if no data left
2085 	 * and tty was marked busy.
2086 	 */
2087 	if (ISSET(lsr, LSR_TXRDY)) {
2088 		/*
2089 		 * If we've delayed a parameter change, do it now, and restart
2090 		 * output.
2091 		 */
2092 		if (sc->sc_heldchange) {
2093 			com_loadchannelregs(sc);
2094 			sc->sc_heldchange = 0;
2095 			sc->sc_tbc = sc->sc_heldtbc;
2096 			sc->sc_heldtbc = 0;
2097 		}
2098 
2099 		/* Output the next chunk of the contiguous buffer, if any. */
2100 		if (sc->sc_tbc > 0) {
2101 			int n;
2102 
2103 			n = sc->sc_tbc;
2104 			if (n > sc->sc_fifolen)
2105 				n = sc->sc_fifolen;
2106 			bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n);
2107 			sc->sc_tbc -= n;
2108 			sc->sc_tba += n;
2109 		} else {
2110 			/* Disable transmit completion interrupts if necessary. */
2111 			if (ISSET(sc->sc_ier, IER_ETXRDY)) {
2112 				CLR(sc->sc_ier, IER_ETXRDY);
2113 				bus_space_write_1(iot, ioh, com_ier, sc->sc_ier);
2114 			}
2115 			if (sc->sc_tx_busy) {
2116 				sc->sc_tx_busy = 0;
2117 				sc->sc_tx_done = 1;
2118 			}
2119 		}
2120 	}
2121 
2122 	/* Wake up the poller. */
2123 #ifdef __GENERIC_SOFT_INTERRUPTS
2124 	softintr_schedule(sc->sc_si);
2125 #else
2126 #ifndef __NO_SOFT_SERIAL_INTERRUPT
2127 	setsoftserial();
2128 #else
2129 	if (!com_softintr_scheduled) {
2130 		com_softintr_scheduled = 1;
2131 		timeout(comsoft, NULL, 1);
2132 	}
2133 #endif
2134 #endif
2135 
2136 #if NRND > 0 && defined(RND_COM)
2137 	rnd_add_uint32(&sc->rnd_source, iir | lsr);
2138 #endif
2139 
2140 	return (1);
2141 }
2142 
2143 /*
2144  * The following functions are polled getc and putc routines, shared
2145  * by the console and kgdb glue.
2146  */
2147 
2148 int
2149 com_common_getc(iot, ioh)
2150 	bus_space_tag_t iot;
2151 	bus_space_handle_t ioh;
2152 {
2153 	int s = splserial();
2154 	u_char stat, c;
2155 
2156 	/* block until a character becomes available */
2157 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY))
2158 		;
2159 
2160 	c = bus_space_read_1(iot, ioh, com_data);
2161 	stat = bus_space_read_1(iot, ioh, com_iir);
2162 	splx(s);
2163 	return (c);
2164 }
2165 
2166 void
2167 com_common_putc(iot, ioh, c)
2168 	bus_space_tag_t iot;
2169 	bus_space_handle_t ioh;
2170 	int c;
2171 {
2172 	int s = splserial();
2173 	u_char stat;
2174 	int timo;
2175 
2176 	/* wait for any pending transmission to finish */
2177 	timo = 50000;
2178 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY)
2179 	    && --timo)
2180 		;
2181 
2182 	bus_space_write_1(iot, ioh, com_data, c);
2183 	/* wait for this transmission to complete */
2184 	timo = 1500000;
2185 	while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY)
2186 	    && --timo)
2187 		;
2188 
2189 	/* clear any interrupts generated by this transmission */
2190 	stat = bus_space_read_1(iot, ioh, com_iir);
2191 	splx(s);
2192 }
2193 
2194 /*
2195  * Initialize UART to known state.
2196  */
2197 int
2198 cominit(iot, iobase, rate, frequency, cflag, iohp)
2199 	bus_space_tag_t iot;
2200 	int iobase;
2201 	int rate, frequency;
2202 	tcflag_t cflag;
2203 	bus_space_handle_t *iohp;
2204 {
2205 	bus_space_handle_t ioh;
2206 
2207 	if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh))
2208 		return (ENOMEM); /* ??? */
2209 
2210 	bus_space_write_1(iot, ioh, com_lcr, LCR_EERS);
2211 	bus_space_write_1(iot, ioh, com_efr, 0);
2212 	bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB);
2213 	rate = comspeed(rate, frequency);
2214 	bus_space_write_1(iot, ioh, com_dlbl, rate);
2215 	bus_space_write_1(iot, ioh, com_dlbh, rate >> 8);
2216 	bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag));
2217 	bus_space_write_1(iot, ioh, com_mcr, 0);
2218 	bus_space_write_1(iot, ioh, com_fifo,
2219 	    FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1);
2220 	bus_space_write_1(iot, ioh, com_ier, 0);
2221 
2222 	*iohp = ioh;
2223 	return (0);
2224 }
2225 
2226 /*
2227  * Following are all routines needed for COM to act as console
2228  */
2229 
2230 int
2231 comcnattach(iot, iobase, rate, frequency, cflag)
2232 	bus_space_tag_t iot;
2233 	int iobase;
2234 	int rate, frequency;
2235 	tcflag_t cflag;
2236 {
2237 	int res;
2238 	static struct consdev comcons = {
2239 		NULL, NULL, comcngetc, comcnputc, comcnpollc, NODEV, CN_NORMAL
2240 	};
2241 
2242 	res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh);
2243 	if (res)
2244 		return (res);
2245 
2246 	cn_tab = &comcons;
2247 
2248 	comconstag = iot;
2249 	comconsaddr = iobase;
2250 	comconsrate = rate;
2251 	comconscflag = cflag;
2252 
2253 	return (0);
2254 }
2255 
2256 int
2257 comcngetc(dev)
2258 	dev_t dev;
2259 {
2260 
2261 	return (com_common_getc(comconstag, comconsioh));
2262 }
2263 
2264 /*
2265  * Console kernel output character routine.
2266  */
2267 void
2268 comcnputc(dev, c)
2269 	dev_t dev;
2270 	int c;
2271 {
2272 
2273 	com_common_putc(comconstag, comconsioh, c);
2274 }
2275 
2276 void
2277 comcnpollc(dev, on)
2278 	dev_t dev;
2279 	int on;
2280 {
2281 
2282 }
2283 
2284 #ifdef KGDB
2285 int
2286 com_kgdb_attach(iot, iobase, rate, frequency, cflag)
2287 	bus_space_tag_t iot;
2288 	int iobase;
2289 	int rate, frequency;
2290 	tcflag_t cflag;
2291 {
2292 	int res;
2293 
2294 	if (iot == comconstag && iobase == comconsaddr)
2295 		return (EBUSY); /* cannot share with console */
2296 
2297 	res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh);
2298 	if (res)
2299 		return (res);
2300 
2301 	kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL);
2302 	kgdb_dev = 123; /* unneeded, only to satisfy some tests */
2303 
2304 	com_kgdb_iot = iot;
2305 	com_kgdb_addr = iobase;
2306 
2307 	return (0);
2308 }
2309 
2310 /* ARGSUSED */
2311 int
2312 com_kgdb_getc(arg)
2313 	void *arg;
2314 {
2315 
2316 	return (com_common_getc(com_kgdb_iot, com_kgdb_ioh));
2317 }
2318 
2319 /* ARGSUSED */
2320 void
2321 com_kgdb_putc(arg, c)
2322 	void *arg;
2323 	int c;
2324 {
2325 
2326 	return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c));
2327 }
2328 #endif /* KGDB */
2329 
2330 /* helper function to identify the com ports used by
2331  console or KGDB (and not yet autoconf attached) */
2332 int
2333 com_is_console(iot, iobase, ioh)
2334 	bus_space_tag_t iot;
2335 	int iobase;
2336 	bus_space_handle_t *ioh;
2337 {
2338 	bus_space_handle_t help;
2339 
2340 	if (!comconsattached &&
2341 	    iot == comconstag && iobase == comconsaddr)
2342 		help = comconsioh;
2343 #ifdef KGDB
2344 	else if (!com_kgdb_attached &&
2345 	    iot == com_kgdb_iot && iobase == com_kgdb_addr)
2346 		help = com_kgdb_ioh;
2347 #endif
2348 	else
2349 		return (0);
2350 
2351 	if (ioh)
2352 		*ioh = help;
2353 	return (1);
2354 }
2355