1 /* $NetBSD: bha.c,v 1.30 1999/01/14 04:47:18 ross Exp $ */ 2 3 #include "opt_ddb.h" 4 #undef BHADIAG 5 #ifdef DDB 6 #define integrate 7 #else 8 #define integrate static inline 9 #endif 10 11 /*- 12 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 13 * All rights reserved. 14 * 15 * This code is derived from software contributed to The NetBSD Foundation 16 * by Charles M. Hannum and by Jason R. Thorpe of the Numerical Aerospace 17 * Simulation Facility, NASA Ames Research Center. 18 * 19 * Redistribution and use in source and binary forms, with or without 20 * modification, are permitted provided that the following conditions 21 * are met: 22 * 1. Redistributions of source code must retain the above copyright 23 * notice, this list of conditions and the following disclaimer. 24 * 2. Redistributions in binary form must reproduce the above copyright 25 * notice, this list of conditions and the following disclaimer in the 26 * documentation and/or other materials provided with the distribution. 27 * 3. All advertising materials mentioning features or use of this software 28 * must display the following acknowledgement: 29 * This product includes software developed by the NetBSD 30 * Foundation, Inc. and its contributors. 31 * 4. Neither the name of The NetBSD Foundation nor the names of its 32 * contributors may be used to endorse or promote products derived 33 * from this software without specific prior written permission. 34 * 35 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 36 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 37 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 38 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 39 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 40 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 41 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 42 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 43 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 44 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 45 * POSSIBILITY OF SUCH DAMAGE. 46 */ 47 48 /* 49 * Originally written by Julian Elischer (julian@tfs.com) 50 * for TRW Financial Systems for use under the MACH(2.5) operating system. 51 * 52 * TRW Financial Systems, in accordance with their agreement with Carnegie 53 * Mellon University, makes this software available to CMU to distribute 54 * or use in any manner that they see fit as long as this message is kept with 55 * the software. For this reason TFS also grants any other persons or 56 * organisations permission to use or modify this software. 57 * 58 * TFS supplies this software to be publicly redistributed 59 * on the understanding that TFS is not responsible for the correct 60 * functioning of this software in any circumstances. 61 */ 62 63 #include <sys/types.h> 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #include <sys/kernel.h> 67 #include <sys/errno.h> 68 #include <sys/ioctl.h> 69 #include <sys/device.h> 70 #include <sys/malloc.h> 71 #include <sys/buf.h> 72 #include <sys/proc.h> 73 #include <sys/user.h> 74 75 #include <machine/bus.h> 76 #include <machine/intr.h> 77 78 #include <dev/scsipi/scsi_all.h> 79 #include <dev/scsipi/scsipi_all.h> 80 #include <dev/scsipi/scsiconf.h> 81 82 #include <dev/ic/bhareg.h> 83 #include <dev/ic/bhavar.h> 84 85 #ifndef DDB 86 #define Debugger() panic("should call debugger here (bha.c)") 87 #endif /* ! DDB */ 88 89 #define BHA_MAXXFER ((BHA_NSEG - 1) << PGSHIFT) 90 91 #ifdef BHADEBUG 92 int bha_debug = 0; 93 #endif /* BHADEBUG */ 94 95 int bha_cmd __P((bus_space_tag_t, bus_space_handle_t, struct bha_softc *, 96 int, u_char *, int, u_char *)); 97 integrate void bha_finish_ccbs __P((struct bha_softc *)); 98 integrate void bha_reset_ccb __P((struct bha_softc *, struct bha_ccb *)); 99 void bha_free_ccb __P((struct bha_softc *, struct bha_ccb *)); 100 integrate int bha_init_ccb __P((struct bha_softc *, struct bha_ccb *)); 101 struct bha_ccb *bha_get_ccb __P((struct bha_softc *, int)); 102 struct bha_ccb *bha_ccb_phys_kv __P((struct bha_softc *, u_long)); 103 void bha_queue_ccb __P((struct bha_softc *, struct bha_ccb *)); 104 void bha_collect_mbo __P((struct bha_softc *)); 105 void bha_start_ccbs __P((struct bha_softc *)); 106 void bha_done __P((struct bha_softc *, struct bha_ccb *)); 107 int bha_init __P((struct bha_softc *)); 108 void bhaminphys __P((struct buf *)); 109 int bha_scsi_cmd __P((struct scsipi_xfer *)); 110 int bha_poll __P((struct bha_softc *, struct scsipi_xfer *, int)); 111 void bha_timeout __P((void *arg)); 112 int bha_create_ccbs __P((struct bha_softc *, struct bha_ccb *, int)); 113 114 /* the below structure is so we have a default dev struct for out link struct */ 115 struct scsipi_device bha_dev = { 116 NULL, /* Use default error handler */ 117 NULL, /* have a queue, served by this */ 118 NULL, /* have no async handler */ 119 NULL, /* Use default 'done' routine */ 120 }; 121 122 #define BHA_RESET_TIMEOUT 2000 /* time to wait for reset (mSec) */ 123 #define BHA_ABORT_TIMEOUT 2000 /* time to wait for abort (mSec) */ 124 125 /* 126 * bha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) 127 * 128 * Activate Adapter command 129 * icnt: number of args (outbound bytes including opcode) 130 * ibuf: argument buffer 131 * ocnt: number of expected returned bytes 132 * obuf: result buffer 133 * wait: number of seconds to wait for response 134 * 135 * Performs an adapter command through the ports. Not to be confused with a 136 * scsi command, which is read in via the dma; one of the adapter commands 137 * tells it to read in a scsi command. 138 */ 139 int 140 bha_cmd(iot, ioh, sc, icnt, ibuf, ocnt, obuf) 141 bus_space_tag_t iot; 142 bus_space_handle_t ioh; 143 struct bha_softc *sc; 144 int icnt, ocnt; 145 u_char *ibuf, *obuf; 146 { 147 const char *name; 148 register int i; 149 int wait; 150 u_char sts; 151 u_char opcode = ibuf[0]; 152 153 if (sc != NULL) 154 name = sc->sc_dev.dv_xname; 155 else 156 name = "(bha probe)"; 157 158 /* 159 * Calculate a reasonable timeout for the command. 160 */ 161 switch (opcode) { 162 case BHA_INQUIRE_DEVICES: 163 case BHA_INQUIRE_DEVICES_2: 164 wait = 90 * 20000; 165 break; 166 default: 167 wait = 1 * 20000; 168 break; 169 } 170 171 /* 172 * Wait for the adapter to go idle, unless it's one of 173 * the commands which don't need this 174 */ 175 if (opcode != BHA_MBO_INTR_EN) { 176 for (i = 20000; i; i--) { /* 1 sec? */ 177 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT); 178 if (sts & BHA_STAT_IDLE) 179 break; 180 delay(50); 181 } 182 if (!i) { 183 printf("%s: bha_cmd, host not idle(0x%x)\n", 184 name, sts); 185 return (1); 186 } 187 } 188 /* 189 * Now that it is idle, if we expect output, preflush the 190 * queue feeding to us. 191 */ 192 if (ocnt) { 193 while ((bus_space_read_1(iot, ioh, BHA_STAT_PORT)) & 194 BHA_STAT_DF) 195 bus_space_read_1(iot, ioh, BHA_DATA_PORT); 196 } 197 /* 198 * Output the command and the number of arguments given 199 * for each byte, first check the port is empty. 200 */ 201 while (icnt--) { 202 for (i = wait; i; i--) { 203 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT); 204 if (!(sts & BHA_STAT_CDF)) 205 break; 206 delay(50); 207 } 208 if (!i) { 209 if (opcode != BHA_INQUIRE_REVISION) 210 printf("%s: bha_cmd, cmd/data port full\n", 211 name); 212 goto bad; 213 } 214 bus_space_write_1(iot, ioh, BHA_CMD_PORT, *ibuf++); 215 } 216 /* 217 * If we expect input, loop that many times, each time, 218 * looking for the data register to have valid data 219 */ 220 while (ocnt--) { 221 for (i = wait; i; i--) { 222 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT); 223 if (sts & BHA_STAT_DF) 224 break; 225 delay(50); 226 } 227 if (!i) { 228 if (opcode != BHA_INQUIRE_REVISION) 229 printf("%s: bha_cmd, cmd/data port empty %d\n", 230 name, ocnt); 231 goto bad; 232 } 233 *obuf++ = bus_space_read_1(iot, ioh, BHA_DATA_PORT); 234 } 235 /* 236 * Wait for the board to report a finished instruction. 237 * We may get an extra interrupt for the HACC signal, but this is 238 * unimportant. 239 */ 240 if (opcode != BHA_MBO_INTR_EN && opcode != BHA_MODIFY_IOPORT) { 241 for (i = 20000; i; i--) { /* 1 sec? */ 242 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT); 243 /* XXX Need to save this in the interrupt handler? */ 244 if (sts & BHA_INTR_HACC) 245 break; 246 delay(50); 247 } 248 if (!i) { 249 printf("%s: bha_cmd, host not finished(0x%x)\n", 250 name, sts); 251 return (1); 252 } 253 } 254 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST); 255 return (0); 256 257 bad: 258 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_SRST); 259 return (1); 260 } 261 262 /* 263 * Attach all the sub-devices we can find 264 */ 265 void 266 bha_attach(sc, bpd) 267 struct bha_softc *sc; 268 struct bha_probe_data *bpd; 269 { 270 271 /* 272 * Fill in the adapter. 273 */ 274 sc->sc_adapter.scsipi_cmd = bha_scsi_cmd; 275 sc->sc_adapter.scsipi_minphys = bhaminphys; 276 277 /* 278 * fill in the prototype scsipi_link. 279 */ 280 sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE; 281 sc->sc_link.adapter_softc = sc; 282 sc->sc_link.scsipi_scsi.adapter_target = bpd->sc_scsi_dev; 283 sc->sc_link.adapter = &sc->sc_adapter; 284 sc->sc_link.device = &bha_dev; 285 sc->sc_link.openings = 4; 286 sc->sc_link.scsipi_scsi.max_target = bpd->sc_iswide ? 15 : 7; 287 sc->sc_link.scsipi_scsi.max_lun = 7; 288 sc->sc_link.type = BUS_SCSI; 289 290 TAILQ_INIT(&sc->sc_free_ccb); 291 TAILQ_INIT(&sc->sc_waiting_ccb); 292 TAILQ_INIT(&sc->sc_queue); 293 294 bha_inquire_setup_information(sc); 295 296 printf("%s: model BT-%s, firmware %s\n", sc->sc_dev.dv_xname, 297 sc->sc_model, sc->sc_firmware); 298 299 if (bha_init(sc) != 0) { 300 /* Error during initialization! */ 301 return; 302 } 303 304 /* 305 * ask the adapter what subunits are present 306 */ 307 config_found(&sc->sc_dev, &sc->sc_link, scsiprint); 308 } 309 310 integrate void 311 bha_finish_ccbs(sc) 312 struct bha_softc *sc; 313 { 314 struct bha_mbx_in *wmbi; 315 struct bha_ccb *ccb; 316 int i; 317 318 wmbi = wmbx->tmbi; 319 320 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 321 BHA_MBI_OFF(wmbi), sizeof(struct bha_mbx_in), 322 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 323 324 if (wmbi->stat == BHA_MBI_FREE) { 325 for (i = 0; i < BHA_MBX_SIZE; i++) { 326 if (wmbi->stat != BHA_MBI_FREE) { 327 printf("%s: mbi not in round-robin order\n", 328 sc->sc_dev.dv_xname); 329 goto AGAIN; 330 } 331 bha_nextmbx(wmbi, wmbx, mbi); 332 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 333 BHA_MBI_OFF(wmbi), sizeof(struct bha_mbx_in), 334 BUS_DMASYNC_POSTREAD); 335 } 336 #ifdef BHADIAGnot 337 printf("%s: mbi interrupt with no full mailboxes\n", 338 sc->sc_dev.dv_xname); 339 #endif 340 return; 341 } 342 343 AGAIN: 344 do { 345 ccb = bha_ccb_phys_kv(sc, phystol(wmbi->ccb_addr)); 346 if (!ccb) { 347 printf("%s: bad mbi ccb pointer; skipping\n", 348 sc->sc_dev.dv_xname); 349 goto next; 350 } 351 352 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 353 BHA_CCB_OFF(ccb), sizeof(struct bha_ccb), 354 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 355 356 #ifdef BHADEBUG 357 if (bha_debug) { 358 struct scsi_generic *cmd = &ccb->scsi_cmd; 359 printf("op=%x %x %x %x %x %x\n", 360 cmd->opcode, cmd->bytes[0], cmd->bytes[1], 361 cmd->bytes[2], cmd->bytes[3], cmd->bytes[4]); 362 printf("stat %x for mbi addr = 0x%p, ", 363 wmbi->stat, wmbi); 364 printf("ccb addr = %p\n", ccb); 365 } 366 #endif /* BHADEBUG */ 367 368 switch (wmbi->stat) { 369 case BHA_MBI_OK: 370 case BHA_MBI_ERROR: 371 if ((ccb->flags & CCB_ABORT) != 0) { 372 /* 373 * If we already started an abort, wait for it 374 * to complete before clearing the CCB. We 375 * could instead just clear CCB_SENDING, but 376 * what if the mailbox was already received? 377 * The worst that happens here is that we clear 378 * the CCB a bit later than we need to. BFD. 379 */ 380 goto next; 381 } 382 break; 383 384 case BHA_MBI_ABORT: 385 case BHA_MBI_UNKNOWN: 386 /* 387 * Even if the CCB wasn't found, we clear it anyway. 388 * See preceeding comment. 389 */ 390 break; 391 392 default: 393 printf("%s: bad mbi status %02x; skipping\n", 394 sc->sc_dev.dv_xname, wmbi->stat); 395 goto next; 396 } 397 398 untimeout(bha_timeout, ccb); 399 bha_done(sc, ccb); 400 401 next: 402 wmbi->stat = BHA_MBI_FREE; 403 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 404 BHA_MBI_OFF(wmbi), sizeof(struct bha_mbx_in), 405 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 406 bha_nextmbx(wmbi, wmbx, mbi); 407 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 408 BHA_MBI_OFF(wmbi), sizeof(struct bha_mbx_in), 409 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 410 } while (wmbi->stat != BHA_MBI_FREE); 411 412 wmbx->tmbi = wmbi; 413 } 414 415 /* 416 * Catch an interrupt from the adaptor 417 */ 418 int 419 bha_intr(arg) 420 void *arg; 421 { 422 struct bha_softc *sc = arg; 423 bus_space_tag_t iot = sc->sc_iot; 424 bus_space_handle_t ioh = sc->sc_ioh; 425 u_char sts; 426 427 #ifdef BHADEBUG 428 printf("%s: bha_intr ", sc->sc_dev.dv_xname); 429 #endif /* BHADEBUG */ 430 431 /* 432 * First acknowlege the interrupt, Then if it's not telling about 433 * a completed operation just return. 434 */ 435 sts = bus_space_read_1(iot, ioh, BHA_INTR_PORT); 436 if ((sts & BHA_INTR_ANYINTR) == 0) 437 return (0); 438 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, BHA_CTRL_IRST); 439 440 #ifdef BHADIAG 441 /* Make sure we clear CCB_SENDING before finishing a CCB. */ 442 bha_collect_mbo(sc); 443 #endif 444 445 /* Mail box out empty? */ 446 if (sts & BHA_INTR_MBOA) { 447 struct bha_toggle toggle; 448 449 toggle.cmd.opcode = BHA_MBO_INTR_EN; 450 toggle.cmd.enable = 0; 451 bha_cmd(iot, ioh, sc, 452 sizeof(toggle.cmd), (u_char *)&toggle.cmd, 453 0, (u_char *)0); 454 bha_start_ccbs(sc); 455 } 456 457 /* Mail box in full? */ 458 if (sts & BHA_INTR_MBIF) 459 bha_finish_ccbs(sc); 460 461 return (1); 462 } 463 464 integrate void 465 bha_reset_ccb(sc, ccb) 466 struct bha_softc *sc; 467 struct bha_ccb *ccb; 468 { 469 470 ccb->flags = 0; 471 } 472 473 /* 474 * A ccb is put onto the free list. 475 */ 476 void 477 bha_free_ccb(sc, ccb) 478 struct bha_softc *sc; 479 struct bha_ccb *ccb; 480 { 481 int s; 482 483 s = splbio(); 484 485 bha_reset_ccb(sc, ccb); 486 TAILQ_INSERT_HEAD(&sc->sc_free_ccb, ccb, chain); 487 488 /* 489 * If there were none, wake anybody waiting for one to come free, 490 * starting with queued entries. 491 */ 492 if (ccb->chain.tqe_next == 0) 493 wakeup(&sc->sc_free_ccb); 494 495 splx(s); 496 } 497 498 integrate int 499 bha_init_ccb(sc, ccb) 500 struct bha_softc *sc; 501 struct bha_ccb *ccb; 502 { 503 bus_dma_tag_t dmat = sc->sc_dmat; 504 int hashnum, error; 505 506 /* 507 * Create the DMA map for this CCB. 508 */ 509 error = bus_dmamap_create(dmat, BHA_MAXXFER, BHA_NSEG, BHA_MAXXFER, 510 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW | sc->sc_dmaflags, 511 &ccb->dmamap_xfer); 512 if (error) { 513 printf("%s: unable to create ccb DMA map, error = %d\n", 514 sc->sc_dev.dv_xname, error); 515 return (error); 516 } 517 518 /* 519 * put in the phystokv hash table 520 * Never gets taken out. 521 */ 522 ccb->hashkey = sc->sc_dmamap_control->dm_segs[0].ds_addr + 523 BHA_CCB_OFF(ccb); 524 hashnum = CCB_HASH(ccb->hashkey); 525 ccb->nexthash = sc->sc_ccbhash[hashnum]; 526 sc->sc_ccbhash[hashnum] = ccb; 527 bha_reset_ccb(sc, ccb); 528 return (0); 529 } 530 531 /* 532 * Create a set of ccbs and add them to the free list. Called once 533 * by bha_init(). We return the number of CCBs successfully created. 534 */ 535 int 536 bha_create_ccbs(sc, ccbstore, count) 537 struct bha_softc *sc; 538 struct bha_ccb *ccbstore; 539 int count; 540 { 541 struct bha_ccb *ccb; 542 int i, error; 543 544 bzero(ccbstore, sizeof(struct bha_ccb) * count); 545 for (i = 0; i < count; i++) { 546 ccb = &ccbstore[i]; 547 if ((error = bha_init_ccb(sc, ccb)) != 0) { 548 printf("%s: unable to initialize ccb, error = %d\n", 549 sc->sc_dev.dv_xname, error); 550 goto out; 551 } 552 TAILQ_INSERT_TAIL(&sc->sc_free_ccb, ccb, chain); 553 } 554 out: 555 return (i); 556 } 557 558 /* 559 * Get a free ccb 560 * 561 * If there are none, see if we can allocate a new one. If so, put it in 562 * the hash table too otherwise either return an error or sleep. 563 */ 564 struct bha_ccb * 565 bha_get_ccb(sc, flags) 566 struct bha_softc *sc; 567 int flags; 568 { 569 struct bha_ccb *ccb; 570 int s; 571 572 s = splbio(); 573 574 /* 575 * If we can and have to, sleep waiting for one to come free 576 * but only if we can't allocate a new one. 577 */ 578 for (;;) { 579 ccb = sc->sc_free_ccb.tqh_first; 580 if (ccb) { 581 TAILQ_REMOVE(&sc->sc_free_ccb, ccb, chain); 582 break; 583 } 584 if ((flags & SCSI_NOSLEEP) != 0) 585 goto out; 586 tsleep(&sc->sc_free_ccb, PRIBIO, "bhaccb", 0); 587 } 588 589 ccb->flags |= CCB_ALLOC; 590 591 out: 592 splx(s); 593 return (ccb); 594 } 595 596 /* 597 * Given a physical address, find the ccb that it corresponds to. 598 */ 599 struct bha_ccb * 600 bha_ccb_phys_kv(sc, ccb_phys) 601 struct bha_softc *sc; 602 u_long ccb_phys; 603 { 604 int hashnum = CCB_HASH(ccb_phys); 605 struct bha_ccb *ccb = sc->sc_ccbhash[hashnum]; 606 607 while (ccb) { 608 if (ccb->hashkey == ccb_phys) 609 break; 610 ccb = ccb->nexthash; 611 } 612 return (ccb); 613 } 614 615 /* 616 * Queue a CCB to be sent to the controller, and send it if possible. 617 */ 618 void 619 bha_queue_ccb(sc, ccb) 620 struct bha_softc *sc; 621 struct bha_ccb *ccb; 622 { 623 624 TAILQ_INSERT_TAIL(&sc->sc_waiting_ccb, ccb, chain); 625 bha_start_ccbs(sc); 626 } 627 628 /* 629 * Garbage collect mailboxes that are no longer in use. 630 */ 631 void 632 bha_collect_mbo(sc) 633 struct bha_softc *sc; 634 { 635 struct bha_mbx_out *wmbo; /* Mail Box Out pointer */ 636 #ifdef BHADIAG 637 struct bha_ccb *ccb; 638 #endif 639 640 wmbo = wmbx->cmbo; 641 642 while (sc->sc_mbofull > 0) { 643 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 644 BHA_MBO_OFF(wmbo), sizeof(struct bha_mbx_out), 645 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE); 646 if (wmbo->cmd != BHA_MBO_FREE) 647 break; 648 649 #ifdef BHADIAG 650 ccb = bha_ccb_phys_kv(sc, phystol(wmbo->ccb_addr)); 651 ccb->flags &= ~CCB_SENDING; 652 #endif 653 654 --sc->sc_mbofull; 655 bha_nextmbx(wmbo, wmbx, mbo); 656 } 657 658 wmbx->cmbo = wmbo; 659 } 660 661 /* 662 * Send as many CCBs as we have empty mailboxes for. 663 */ 664 void 665 bha_start_ccbs(sc) 666 struct bha_softc *sc; 667 { 668 bus_space_tag_t iot = sc->sc_iot; 669 bus_space_handle_t ioh = sc->sc_ioh; 670 struct bha_mbx_out *wmbo; /* Mail Box Out pointer */ 671 struct bha_ccb *ccb; 672 673 wmbo = wmbx->tmbo; 674 675 while ((ccb = sc->sc_waiting_ccb.tqh_first) != NULL) { 676 if (sc->sc_mbofull >= BHA_MBX_SIZE) { 677 bha_collect_mbo(sc); 678 if (sc->sc_mbofull >= BHA_MBX_SIZE) { 679 struct bha_toggle toggle; 680 681 toggle.cmd.opcode = BHA_MBO_INTR_EN; 682 toggle.cmd.enable = 1; 683 bha_cmd(iot, ioh, sc, 684 sizeof(toggle.cmd), (u_char *)&toggle.cmd, 685 0, (u_char *)0); 686 break; 687 } 688 } 689 690 TAILQ_REMOVE(&sc->sc_waiting_ccb, ccb, chain); 691 #ifdef BHADIAG 692 ccb->flags |= CCB_SENDING; 693 #endif 694 695 /* Link ccb to mbo. */ 696 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 697 BHA_CCB_OFF(ccb), wmbo->ccb_addr); 698 if (ccb->flags & CCB_ABORT) 699 wmbo->cmd = BHA_MBO_ABORT; 700 else 701 wmbo->cmd = BHA_MBO_START; 702 703 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 704 BHA_MBO_OFF(wmbo), sizeof(struct bha_mbx_out), 705 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 706 707 /* Tell the card to poll immediately. */ 708 bus_space_write_1(iot, ioh, BHA_CMD_PORT, BHA_START_SCSI); 709 710 if ((ccb->xs->flags & SCSI_POLL) == 0) 711 timeout(bha_timeout, ccb, (ccb->timeout * hz) / 1000); 712 713 ++sc->sc_mbofull; 714 bha_nextmbx(wmbo, wmbx, mbo); 715 } 716 717 wmbx->tmbo = wmbo; 718 } 719 720 /* 721 * We have a ccb which has been processed by the 722 * adaptor, now we look to see how the operation 723 * went. Wake up the owner if waiting 724 */ 725 void 726 bha_done(sc, ccb) 727 struct bha_softc *sc; 728 struct bha_ccb *ccb; 729 { 730 bus_dma_tag_t dmat = sc->sc_dmat; 731 struct scsipi_sense_data *s1, *s2; 732 struct scsipi_xfer *xs = ccb->xs; 733 734 SC_DEBUG(xs->sc_link, SDEV_DB2, ("bha_done\n")); 735 736 /* 737 * If we were a data transfer, unload the map that described 738 * the data buffer. 739 */ 740 if (xs->datalen) { 741 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 742 ccb->dmamap_xfer->dm_mapsize, 743 (xs->flags & SCSI_DATA_IN) ? BUS_DMASYNC_POSTREAD : 744 BUS_DMASYNC_POSTWRITE); 745 bus_dmamap_unload(dmat, ccb->dmamap_xfer); 746 } 747 748 /* 749 * Otherwise, put the results of the operation 750 * into the xfer and call whoever started it 751 */ 752 #ifdef BHADIAG 753 if (ccb->flags & CCB_SENDING) { 754 printf("%s: exiting ccb still in transit!\n", 755 sc->sc_dev.dv_xname); 756 Debugger(); 757 return; 758 } 759 #endif 760 if ((ccb->flags & CCB_ALLOC) == 0) { 761 printf("%s: exiting ccb not allocated!\n", 762 sc->sc_dev.dv_xname); 763 Debugger(); 764 return; 765 } 766 if (xs->error == XS_NOERROR) { 767 if (ccb->host_stat != BHA_OK) { 768 switch (ccb->host_stat) { 769 case BHA_SEL_TIMEOUT: /* No response */ 770 xs->error = XS_SELTIMEOUT; 771 break; 772 default: /* Other scsi protocol messes */ 773 printf("%s: host_stat %x\n", 774 sc->sc_dev.dv_xname, ccb->host_stat); 775 xs->error = XS_DRIVER_STUFFUP; 776 break; 777 } 778 } else if (ccb->target_stat != SCSI_OK) { 779 switch (ccb->target_stat) { 780 case SCSI_CHECK: 781 s1 = &ccb->scsi_sense; 782 s2 = &xs->sense.scsi_sense; 783 *s2 = *s1; 784 xs->error = XS_SENSE; 785 break; 786 case SCSI_BUSY: 787 xs->error = XS_BUSY; 788 break; 789 default: 790 printf("%s: target_stat %x\n", 791 sc->sc_dev.dv_xname, ccb->target_stat); 792 xs->error = XS_DRIVER_STUFFUP; 793 break; 794 } 795 } else 796 xs->resid = 0; 797 } 798 bha_free_ccb(sc, ccb); 799 xs->flags |= ITSDONE; 800 scsipi_done(xs); 801 802 /* 803 * If there are queue entries in the software queue, try to 804 * run the first one. We should be more or less guaranteed 805 * to succeed, since we just freed a CCB. 806 * 807 * NOTE: bha_scsi_cmd() relies on our calling it with 808 * the first entry in the queue. 809 */ 810 if ((xs = TAILQ_FIRST(&sc->sc_queue)) != NULL) 811 (void) bha_scsi_cmd(xs); 812 } 813 814 /* 815 * Find the board and find it's irq/drq 816 */ 817 int 818 bha_find(iot, ioh, sc) 819 bus_space_tag_t iot; 820 bus_space_handle_t ioh; 821 struct bha_probe_data *sc; 822 { 823 int i, iswide; 824 u_char sts; 825 struct bha_extended_inquire inquire; 826 struct bha_config config; 827 int irq, drq; 828 829 /* Check something is at the ports we need to access */ 830 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT); 831 if (sts == 0xFF) 832 return (0); 833 834 /* 835 * Reset board, If it doesn't respond, assume 836 * that it's not there.. good for the probe 837 */ 838 839 bus_space_write_1(iot, ioh, BHA_CTRL_PORT, 840 BHA_CTRL_HRST | BHA_CTRL_SRST); 841 842 delay(100); 843 for (i = BHA_RESET_TIMEOUT; i; i--) { 844 sts = bus_space_read_1(iot, ioh, BHA_STAT_PORT); 845 if (sts == (BHA_STAT_IDLE | BHA_STAT_INIT)) 846 break; 847 delay(1000); 848 } 849 if (!i) { 850 #ifdef BHADEBUG 851 if (bha_debug) 852 printf("bha_find: No answer from buslogic board\n"); 853 #endif /* BHADEBUG */ 854 return (0); 855 } 856 857 /* 858 * The BusLogic cards implement an Adaptec 1542 (aha)-compatible 859 * interface. The native bha interface is not compatible with 860 * an aha. 1542. We need to ensure that we never match an 861 * Adaptec 1542. We must also avoid sending Adaptec-compatible 862 * commands to a real bha, lest it go into 1542 emulation mode. 863 * (On an indirect bus like ISA, we should always probe for BusLogic 864 * interfaces before Adaptec interfaces). 865 */ 866 867 /* 868 * Make sure we don't match an AHA-1542A or AHA-1542B, by checking 869 * for an extended-geometry register. The 1542[AB] don't have one. 870 */ 871 sts = bus_space_read_1(iot, ioh, BHA_EXTGEOM_PORT); 872 if (sts == 0xFF) 873 return (0); 874 875 /* 876 * Check that we actually know how to use this board. 877 */ 878 delay(1000); 879 inquire.cmd.opcode = BHA_INQUIRE_EXTENDED; 880 inquire.cmd.len = sizeof(inquire.reply); 881 i = bha_cmd(iot, ioh, (struct bha_softc *)0, 882 sizeof(inquire.cmd), (u_char *)&inquire.cmd, 883 sizeof(inquire.reply), (u_char *)&inquire.reply); 884 885 /* 886 * Some 1542Cs (CP, perhaps not CF, may depend on firmware rev) 887 * have the extended-geometry register and also respond to 888 * BHA_INQUIRE_EXTENDED. Make sure we never match such cards, 889 * by checking the size of the reply is what a BusLogic card returns. 890 */ 891 if (i) { 892 #ifdef BHADEBUG 893 printf("bha_find: board returned %d instead of %d to %s\n", 894 i, sizeof(inquire.reply), "INQUIRE_EXTENDED"); 895 #endif 896 return (0); 897 } 898 899 /* OK, we know we've found a buslogic adaptor. */ 900 901 switch (inquire.reply.bus_type) { 902 case BHA_BUS_TYPE_24BIT: 903 case BHA_BUS_TYPE_32BIT: 904 break; 905 case BHA_BUS_TYPE_MCA: 906 /* We don't grok MicroChannel (yet). */ 907 return (0); 908 default: 909 printf("bha_find: illegal bus type %c\n", 910 inquire.reply.bus_type); 911 return (0); 912 } 913 914 /* Note if we have a wide bus. */ 915 iswide = inquire.reply.scsi_flags & BHA_SCSI_WIDE; 916 917 /* 918 * Assume we have a board at this stage setup dma channel from 919 * jumpers and save int level 920 */ 921 delay(1000); 922 config.cmd.opcode = BHA_INQUIRE_CONFIG; 923 bha_cmd(iot, ioh, (struct bha_softc *)0, 924 sizeof(config.cmd), (u_char *)&config.cmd, 925 sizeof(config.reply), (u_char *)&config.reply); 926 switch (config.reply.chan) { 927 case EISADMA: 928 drq = -1; 929 break; 930 case CHAN0: 931 drq = 0; 932 break; 933 case CHAN5: 934 drq = 5; 935 break; 936 case CHAN6: 937 drq = 6; 938 break; 939 case CHAN7: 940 drq = 7; 941 break; 942 default: 943 printf("bha_find: illegal drq setting %x\n", 944 config.reply.chan); 945 return (0); 946 } 947 948 switch (config.reply.intr) { 949 case INT9: 950 irq = 9; 951 break; 952 case INT10: 953 irq = 10; 954 break; 955 case INT11: 956 irq = 11; 957 break; 958 case INT12: 959 irq = 12; 960 break; 961 case INT14: 962 irq = 14; 963 break; 964 case INT15: 965 irq = 15; 966 break; 967 default: 968 printf("bha_find: illegal irq setting %x\n", 969 config.reply.intr); 970 return (0); 971 } 972 973 /* if we want to fill in softc, do so now */ 974 if (sc != NULL) { 975 sc->sc_irq = irq; 976 sc->sc_drq = drq; 977 sc->sc_scsi_dev = config.reply.scsi_dev; 978 sc->sc_iswide = iswide; 979 } 980 981 return (1); 982 } 983 984 985 /* 986 * Disable the ISA-compatiblity ioports on PCI bha devices, 987 * to ensure they're not autoconfigured a second time as an ISA bha. 988 */ 989 int 990 bha_disable_isacompat(sc) 991 struct bha_softc *sc; 992 { 993 struct bha_isadisable isa_disable; 994 995 isa_disable.cmd.opcode = BHA_MODIFY_IOPORT; 996 isa_disable.cmd.modifier = BHA_IOMODIFY_DISABLE1; 997 bha_cmd(sc->sc_iot, sc->sc_ioh, sc, 998 sizeof(isa_disable.cmd), (u_char*)&isa_disable.cmd, 999 0, (u_char *)0); 1000 return (0); 1001 } 1002 1003 1004 /* 1005 * Start the board, ready for normal operation 1006 */ 1007 int 1008 bha_init(sc) 1009 struct bha_softc *sc; 1010 { 1011 bus_space_tag_t iot = sc->sc_iot; 1012 bus_space_handle_t ioh = sc->sc_ioh; 1013 bus_dma_segment_t seg; 1014 struct bha_devices devices; 1015 struct bha_setup setup; 1016 struct bha_mailbox mailbox; 1017 struct bha_period period; 1018 int error, i, j, initial_ccbs, rlen, rseg; 1019 1020 /* Enable round-robin scheme - appeared at firmware rev. 3.31. */ 1021 if (strcmp(sc->sc_firmware, "3.31") >= 0) { 1022 struct bha_toggle toggle; 1023 1024 toggle.cmd.opcode = BHA_ROUND_ROBIN; 1025 toggle.cmd.enable = 1; 1026 bha_cmd(iot, ioh, sc, 1027 sizeof(toggle.cmd), (u_char *)&toggle.cmd, 1028 0, (u_char *)0); 1029 } 1030 1031 /* 1032 * Inquire installed devices (to force synchronous negotiation). 1033 */ 1034 1035 /* 1036 * Poll targets 0 - 7. 1037 */ 1038 devices.cmd.opcode = BHA_INQUIRE_DEVICES; 1039 bha_cmd(iot, ioh, sc, 1040 sizeof(devices.cmd), (u_char *)&devices.cmd, 1041 sizeof(devices.reply), (u_char *)&devices.reply); 1042 1043 /* Count installed units. */ 1044 initial_ccbs = 0; 1045 for (i = 0; i < 8; i++) { 1046 for (j = 0; j < 8; j++) { 1047 if (((devices.reply.lun_map[i] >> j) & 1) == 1) 1048 initial_ccbs++; 1049 } 1050 } 1051 1052 /* 1053 * Poll targets 8 - 15 if we have a wide bus. 1054 */ 1055 if (ISWIDE(sc)) { 1056 devices.cmd.opcode = BHA_INQUIRE_DEVICES_2; 1057 bha_cmd(iot, ioh, sc, 1058 sizeof(devices.cmd), (u_char *)&devices.cmd, 1059 sizeof(devices.reply), (u_char *)&devices.reply); 1060 1061 for (i = 0; i < 8; i++) { 1062 for (j = 0; j < 8; j++) { 1063 if (((devices.reply.lun_map[i] >> j) & 1) == 1) 1064 initial_ccbs++; 1065 } 1066 } 1067 } 1068 1069 initial_ccbs *= sc->sc_link.openings; 1070 if (initial_ccbs > BHA_CCB_MAX) 1071 initial_ccbs = BHA_CCB_MAX; 1072 if (initial_ccbs == 0) /* yes, this can happen */ 1073 initial_ccbs = sc->sc_link.openings; 1074 1075 /* Obtain setup information from. */ 1076 rlen = sizeof(setup.reply) + 1077 (ISWIDE(sc) ? sizeof(setup.reply_w) : 0); 1078 setup.cmd.opcode = BHA_INQUIRE_SETUP; 1079 setup.cmd.len = rlen; 1080 bha_cmd(iot, ioh, sc, 1081 sizeof(setup.cmd), (u_char *)&setup.cmd, 1082 rlen, (u_char *)&setup.reply); 1083 1084 printf("%s: %s, %s\n", 1085 sc->sc_dev.dv_xname, 1086 setup.reply.sync_neg ? "sync" : "async", 1087 setup.reply.parity ? "parity" : "no parity"); 1088 1089 for (i = 0; i < 8; i++) 1090 period.reply.period[i] = setup.reply.sync[i].period * 5 + 20; 1091 if (ISWIDE(sc)) { 1092 for (i = 0; i < 8; i++) 1093 period.reply_w.period[i] = 1094 setup.reply_w.sync[i].period * 5 + 20; 1095 } 1096 1097 if (sc->sc_firmware[0] >= '3') { 1098 rlen = sizeof(period.reply) + 1099 (ISWIDE(sc) ? sizeof(period.reply_w) : 0); 1100 period.cmd.opcode = BHA_INQUIRE_PERIOD; 1101 period.cmd.len = rlen; 1102 bha_cmd(iot, ioh, sc, 1103 sizeof(period.cmd), (u_char *)&period.cmd, 1104 rlen, (u_char *)&period.reply); 1105 } 1106 1107 for (i = 0; i < 8; i++) { 1108 if (!setup.reply.sync[i].valid || 1109 (!setup.reply.sync[i].offset && 1110 !setup.reply.sync[i].period)) 1111 continue; 1112 printf("%s targ %d: sync, offset %d, period %dnsec\n", 1113 sc->sc_dev.dv_xname, i, 1114 setup.reply.sync[i].offset, period.reply.period[i] * 10); 1115 } 1116 if (ISWIDE(sc)) { 1117 for (i = 0; i < 8; i++) { 1118 if (!setup.reply_w.sync[i].valid || 1119 (!setup.reply_w.sync[i].offset && 1120 !setup.reply_w.sync[i].period)) 1121 continue; 1122 printf("%s targ %d: sync, offset %d, period %dnsec\n", 1123 sc->sc_dev.dv_xname, i + 8, 1124 setup.reply_w.sync[i].offset, 1125 period.reply_w.period[i] * 10); 1126 } 1127 } 1128 1129 /* 1130 * Allocate the mailbox and control blocks. 1131 */ 1132 if ((error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct bha_control), 1133 NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) != 0) { 1134 printf("%s: unable to allocate control structures, " 1135 "error = %d\n", sc->sc_dev.dv_xname, error); 1136 return (error); 1137 } 1138 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 1139 sizeof(struct bha_control), (caddr_t *)&sc->sc_control, 1140 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 1141 printf("%s: unable to map control structures, error = %d\n", 1142 sc->sc_dev.dv_xname, error); 1143 return (error); 1144 } 1145 1146 /* 1147 * Create and load the DMA map used for the mailbox and 1148 * control blocks. 1149 */ 1150 if ((error = bus_dmamap_create(sc->sc_dmat, sizeof(struct bha_control), 1151 1, sizeof(struct bha_control), 0, BUS_DMA_NOWAIT | sc->sc_dmaflags, 1152 &sc->sc_dmamap_control)) != 0) { 1153 printf("%s: unable to create control DMA map, error = %d\n", 1154 sc->sc_dev.dv_xname, error); 1155 return (error); 1156 } 1157 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap_control, 1158 sc->sc_control, sizeof(struct bha_control), NULL, 1159 BUS_DMA_NOWAIT)) != 0) { 1160 printf("%s: unable to load control DMA map, error = %d\n", 1161 sc->sc_dev.dv_xname, error); 1162 return (error); 1163 } 1164 1165 /* 1166 * Initialize the control blocks. 1167 */ 1168 i = bha_create_ccbs(sc, sc->sc_control->bc_ccbs, initial_ccbs); 1169 if (i == 0) { 1170 printf("%s: unable to create control blocks\n", 1171 sc->sc_dev.dv_xname); 1172 return (ENOMEM); 1173 } else if (i != initial_ccbs) { 1174 printf("%s: WARNING: only %d of %d control blocks created\n", 1175 sc->sc_dev.dv_xname, i, initial_ccbs); 1176 } 1177 1178 /* 1179 * Set up initial mail box for round-robin operation. 1180 */ 1181 for (i = 0; i < BHA_MBX_SIZE; i++) { 1182 wmbx->mbo[i].cmd = BHA_MBO_FREE; 1183 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1184 BHA_MBO_OFF(&wmbx->mbo[i]), sizeof(struct bha_mbx_out), 1185 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1186 wmbx->mbi[i].stat = BHA_MBI_FREE; 1187 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1188 BHA_MBI_OFF(&wmbx->mbi[i]), sizeof(struct bha_mbx_in), 1189 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1190 } 1191 wmbx->cmbo = wmbx->tmbo = &wmbx->mbo[0]; 1192 wmbx->tmbi = &wmbx->mbi[0]; 1193 sc->sc_mbofull = 0; 1194 1195 /* Initialize mail box. */ 1196 mailbox.cmd.opcode = BHA_MBX_INIT_EXTENDED; 1197 mailbox.cmd.nmbx = BHA_MBX_SIZE; 1198 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 1199 offsetof(struct bha_control, bc_mbx), mailbox.cmd.addr); 1200 bha_cmd(iot, ioh, sc, 1201 sizeof(mailbox.cmd), (u_char *)&mailbox.cmd, 1202 0, (u_char *)0); 1203 return (0); 1204 } 1205 1206 void 1207 bha_inquire_setup_information(sc) 1208 struct bha_softc *sc; 1209 { 1210 bus_space_tag_t iot = sc->sc_iot; 1211 bus_space_handle_t ioh = sc->sc_ioh; 1212 struct bha_model model; 1213 struct bha_revision revision; 1214 struct bha_digit digit; 1215 char *p; 1216 1217 /* 1218 * Get the firmware revision. 1219 */ 1220 p = sc->sc_firmware; 1221 revision.cmd.opcode = BHA_INQUIRE_REVISION; 1222 bha_cmd(iot, ioh, sc, 1223 sizeof(revision.cmd), (u_char *)&revision.cmd, 1224 sizeof(revision.reply), (u_char *)&revision.reply); 1225 *p++ = revision.reply.firm_revision; 1226 *p++ = '.'; 1227 *p++ = revision.reply.firm_version; 1228 digit.cmd.opcode = BHA_INQUIRE_REVISION_3; 1229 bha_cmd(iot, ioh, sc, 1230 sizeof(digit.cmd), (u_char *)&digit.cmd, 1231 sizeof(digit.reply), (u_char *)&digit.reply); 1232 *p++ = digit.reply.digit; 1233 if (revision.reply.firm_revision >= '3' || 1234 (revision.reply.firm_revision == '3' && 1235 revision.reply.firm_version >= '3')) { 1236 digit.cmd.opcode = BHA_INQUIRE_REVISION_4; 1237 bha_cmd(iot, ioh, sc, 1238 sizeof(digit.cmd), (u_char *)&digit.cmd, 1239 sizeof(digit.reply), (u_char *)&digit.reply); 1240 *p++ = digit.reply.digit; 1241 } 1242 while (p > sc->sc_firmware && (p[-1] == ' ' || p[-1] == '\0')) 1243 p--; 1244 *p = '\0'; 1245 1246 /* 1247 * Get the model number. 1248 */ 1249 if (revision.reply.firm_revision >= '3') { 1250 p = sc->sc_model; 1251 model.cmd.opcode = BHA_INQUIRE_MODEL; 1252 model.cmd.len = sizeof(model.reply); 1253 bha_cmd(iot, ioh, sc, 1254 sizeof(model.cmd), (u_char *)&model.cmd, 1255 sizeof(model.reply), (u_char *)&model.reply); 1256 *p++ = model.reply.id[0]; 1257 *p++ = model.reply.id[1]; 1258 *p++ = model.reply.id[2]; 1259 *p++ = model.reply.id[3]; 1260 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0')) 1261 p--; 1262 *p++ = model.reply.version[0]; 1263 *p++ = model.reply.version[1]; 1264 while (p > sc->sc_model && (p[-1] == ' ' || p[-1] == '\0')) 1265 p--; 1266 *p = '\0'; 1267 } else 1268 strcpy(sc->sc_model, "542B"); 1269 } 1270 1271 void 1272 bhaminphys(bp) 1273 struct buf *bp; 1274 { 1275 1276 if (bp->b_bcount > BHA_MAXXFER) 1277 bp->b_bcount = BHA_MAXXFER; 1278 minphys(bp); 1279 } 1280 1281 /* 1282 * start a scsi operation given the command and the data address. Also needs 1283 * the unit, target and lu. 1284 */ 1285 int 1286 bha_scsi_cmd(xs) 1287 struct scsipi_xfer *xs; 1288 { 1289 struct scsipi_link *sc_link = xs->sc_link; 1290 struct bha_softc *sc = sc_link->adapter_softc; 1291 bus_dma_tag_t dmat = sc->sc_dmat; 1292 struct bha_ccb *ccb; 1293 int error, seg, flags, s; 1294 int fromqueue = 0, dontqueue = 0; 1295 1296 SC_DEBUG(sc_link, SDEV_DB2, ("bha_scsi_cmd\n")); 1297 1298 s = splbio(); /* protect the queue */ 1299 1300 /* 1301 * If we're running the queue from bha_done(), we've been 1302 * called with the first queue entry as our argument. 1303 */ 1304 if (xs == TAILQ_FIRST(&sc->sc_queue)) { 1305 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); 1306 fromqueue = 1; 1307 goto get_ccb; 1308 } 1309 1310 /* Polled requests can't be queued for later. */ 1311 dontqueue = xs->flags & SCSI_POLL; 1312 1313 /* 1314 * If there are jobs in the queue, run them first. 1315 */ 1316 if (TAILQ_FIRST(&sc->sc_queue) != NULL) { 1317 /* 1318 * If we can't queue, we have to abort, since 1319 * we have to preserve order. 1320 */ 1321 if (dontqueue) { 1322 splx(s); 1323 xs->error = XS_DRIVER_STUFFUP; 1324 return (TRY_AGAIN_LATER); 1325 } 1326 1327 /* 1328 * Swap with the first queue entry. 1329 */ 1330 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); 1331 xs = TAILQ_FIRST(&sc->sc_queue); 1332 TAILQ_REMOVE(&sc->sc_queue, xs, adapter_q); 1333 fromqueue = 1; 1334 } 1335 1336 get_ccb: 1337 /* 1338 * get a ccb to use. If the transfer 1339 * is from a buf (possibly from interrupt time) 1340 * then we can't allow it to sleep 1341 */ 1342 flags = xs->flags; 1343 if ((ccb = bha_get_ccb(sc, flags)) == NULL) { 1344 /* 1345 * If we can't queue, we lose. 1346 */ 1347 if (dontqueue) { 1348 splx(s); 1349 xs->error = XS_DRIVER_STUFFUP; 1350 return (TRY_AGAIN_LATER); 1351 } 1352 1353 /* 1354 * Stuff ourselves into the queue, in front 1355 * if we came off in the first place. 1356 */ 1357 if (fromqueue) 1358 TAILQ_INSERT_HEAD(&sc->sc_queue, xs, adapter_q); 1359 else 1360 TAILQ_INSERT_TAIL(&sc->sc_queue, xs, adapter_q); 1361 splx(s); 1362 return (SUCCESSFULLY_QUEUED); 1363 } 1364 1365 splx(s); /* done playing with the queue */ 1366 1367 ccb->xs = xs; 1368 ccb->timeout = xs->timeout; 1369 1370 /* 1371 * Put all the arguments for the xfer in the ccb 1372 */ 1373 if (flags & SCSI_RESET) { 1374 ccb->opcode = BHA_RESET_CCB; 1375 ccb->scsi_cmd_length = 0; 1376 } else { 1377 /* can't use S/G if zero length */ 1378 ccb->opcode = (xs->datalen ? BHA_INIT_SCAT_GATH_CCB 1379 : BHA_INITIATOR_CCB); 1380 bcopy(xs->cmd, &ccb->scsi_cmd, 1381 ccb->scsi_cmd_length = xs->cmdlen); 1382 } 1383 1384 if (xs->datalen) { 1385 /* 1386 * Map the DMA transfer. 1387 */ 1388 #ifdef TFS 1389 if (flags & SCSI_DATA_UIO) { 1390 error = bus_dmamap_load_uio(dmat, 1391 ccb->dmamap_xfer, (struct uio *)xs->data, 1392 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : 1393 BUS_DMA_WAITOK); 1394 } else 1395 #endif /* TFS */ 1396 { 1397 error = bus_dmamap_load(dmat, 1398 ccb->dmamap_xfer, xs->data, xs->datalen, NULL, 1399 (flags & SCSI_NOSLEEP) ? BUS_DMA_NOWAIT : 1400 BUS_DMA_WAITOK); 1401 } 1402 1403 if (error) { 1404 if (error == EFBIG) { 1405 printf("%s: bha_scsi_cmd, more than %d" 1406 " dma segments\n", 1407 sc->sc_dev.dv_xname, BHA_NSEG); 1408 } else { 1409 printf("%s: bha_scsi_cmd, error %d loading" 1410 " dma map\n", 1411 sc->sc_dev.dv_xname, error); 1412 } 1413 goto bad; 1414 } 1415 1416 bus_dmamap_sync(dmat, ccb->dmamap_xfer, 0, 1417 ccb->dmamap_xfer->dm_mapsize, 1418 (flags & SCSI_DATA_IN) ? BUS_DMASYNC_PREREAD : 1419 BUS_DMASYNC_PREWRITE); 1420 1421 /* 1422 * Load the hardware scatter/gather map with the 1423 * contents of the DMA map. 1424 */ 1425 for (seg = 0; seg < ccb->dmamap_xfer->dm_nsegs; seg++) { 1426 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_addr, 1427 ccb->scat_gath[seg].seg_addr); 1428 ltophys(ccb->dmamap_xfer->dm_segs[seg].ds_len, 1429 ccb->scat_gath[seg].seg_len); 1430 } 1431 1432 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 1433 BHA_CCB_OFF(ccb) + offsetof(struct bha_ccb, scat_gath), 1434 ccb->data_addr); 1435 ltophys(ccb->dmamap_xfer->dm_nsegs * 1436 sizeof(struct bha_scat_gath), ccb->data_length); 1437 } else { 1438 /* 1439 * No data xfer, use non S/G values. 1440 */ 1441 ltophys(0, ccb->data_addr); 1442 ltophys(0, ccb->data_length); 1443 } 1444 1445 ccb->data_out = 0; 1446 ccb->data_in = 0; 1447 ccb->target = sc_link->scsipi_scsi.target; 1448 ccb->lun = sc_link->scsipi_scsi.lun; 1449 ltophys(sc->sc_dmamap_control->dm_segs[0].ds_addr + 1450 BHA_CCB_OFF(ccb) + offsetof(struct bha_ccb, scsi_sense), 1451 ccb->sense_ptr); 1452 ccb->req_sense_length = sizeof(ccb->scsi_sense); 1453 ccb->host_stat = 0x00; 1454 ccb->target_stat = 0x00; 1455 ccb->link_id = 0; 1456 ltophys(0, ccb->link_addr); 1457 1458 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap_control, 1459 BHA_CCB_OFF(ccb), sizeof(struct bha_ccb), 1460 BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); 1461 1462 s = splbio(); 1463 bha_queue_ccb(sc, ccb); 1464 splx(s); 1465 1466 /* 1467 * Usually return SUCCESSFULLY QUEUED 1468 */ 1469 SC_DEBUG(sc_link, SDEV_DB3, ("cmd_sent\n")); 1470 if ((flags & SCSI_POLL) == 0) 1471 return (SUCCESSFULLY_QUEUED); 1472 1473 /* 1474 * If we can't use interrupts, poll on completion 1475 */ 1476 if (bha_poll(sc, xs, ccb->timeout)) { 1477 bha_timeout(ccb); 1478 if (bha_poll(sc, xs, ccb->timeout)) 1479 bha_timeout(ccb); 1480 } 1481 return (COMPLETE); 1482 1483 bad: 1484 xs->error = XS_DRIVER_STUFFUP; 1485 bha_free_ccb(sc, ccb); 1486 return (COMPLETE); 1487 } 1488 1489 /* 1490 * Poll a particular unit, looking for a particular xs 1491 */ 1492 int 1493 bha_poll(sc, xs, count) 1494 struct bha_softc *sc; 1495 struct scsipi_xfer *xs; 1496 int count; 1497 { 1498 bus_space_tag_t iot = sc->sc_iot; 1499 bus_space_handle_t ioh = sc->sc_ioh; 1500 1501 /* timeouts are in msec, so we loop in 1000 usec cycles */ 1502 while (count) { 1503 /* 1504 * If we had interrupts enabled, would we 1505 * have got an interrupt? 1506 */ 1507 if (bus_space_read_1(iot, ioh, BHA_INTR_PORT) & 1508 BHA_INTR_ANYINTR) 1509 bha_intr(sc); 1510 if (xs->flags & ITSDONE) 1511 return (0); 1512 delay(1000); /* only happens in boot so ok */ 1513 count--; 1514 } 1515 return (1); 1516 } 1517 1518 void 1519 bha_timeout(arg) 1520 void *arg; 1521 { 1522 struct bha_ccb *ccb = arg; 1523 struct scsipi_xfer *xs = ccb->xs; 1524 struct scsipi_link *sc_link = xs->sc_link; 1525 struct bha_softc *sc = sc_link->adapter_softc; 1526 int s; 1527 1528 scsi_print_addr(sc_link); 1529 printf("timed out"); 1530 1531 s = splbio(); 1532 1533 #ifdef BHADIAG 1534 /* 1535 * If the ccb's mbx is not free, then the board has gone Far East? 1536 */ 1537 bha_collect_mbo(sc); 1538 if (ccb->flags & CCB_SENDING) { 1539 printf("%s: not taking commands!\n", sc->sc_dev.dv_xname); 1540 Debugger(); 1541 } 1542 #endif 1543 1544 /* 1545 * If it has been through before, then 1546 * a previous abort has failed, don't 1547 * try abort again 1548 */ 1549 if (ccb->flags & CCB_ABORT) { 1550 /* abort timed out */ 1551 printf(" AGAIN\n"); 1552 /* XXX Must reset! */ 1553 } else { 1554 /* abort the operation that has timed out */ 1555 printf("\n"); 1556 ccb->xs->error = XS_TIMEOUT; 1557 ccb->timeout = BHA_ABORT_TIMEOUT; 1558 ccb->flags |= CCB_ABORT; 1559 bha_queue_ccb(sc, ccb); 1560 } 1561 1562 splx(s); 1563 } 1564