1*c1215136Sriastradh /* $NetBSD: i2c_exec.c,v 1.18 2022/10/24 10:17:27 riastradh Exp $ */
22652188cSthorpej
32652188cSthorpej /*
42652188cSthorpej * Copyright (c) 2003 Wasabi Systems, Inc.
52652188cSthorpej * All rights reserved.
62652188cSthorpej *
72652188cSthorpej * Written by Jason R. Thorpe for Wasabi Systems, Inc.
82652188cSthorpej *
92652188cSthorpej * Redistribution and use in source and binary forms, with or without
102652188cSthorpej * modification, are permitted provided that the following conditions
112652188cSthorpej * are met:
122652188cSthorpej * 1. Redistributions of source code must retain the above copyright
132652188cSthorpej * notice, this list of conditions and the following disclaimer.
142652188cSthorpej * 2. Redistributions in binary form must reproduce the above copyright
152652188cSthorpej * notice, this list of conditions and the following disclaimer in the
162652188cSthorpej * documentation and/or other materials provided with the distribution.
172652188cSthorpej * 3. All advertising materials mentioning features or use of this software
182652188cSthorpej * must display the following acknowledgement:
192652188cSthorpej * This product includes software developed for the NetBSD Project by
202652188cSthorpej * Wasabi Systems, Inc.
212652188cSthorpej * 4. The name of Wasabi Systems, Inc. may not be used to endorse
222652188cSthorpej * or promote products derived from this software without specific prior
232652188cSthorpej * written permission.
242652188cSthorpej *
252652188cSthorpej * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
262652188cSthorpej * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
272652188cSthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
282652188cSthorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
292652188cSthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
302652188cSthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
312652188cSthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
322652188cSthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
332652188cSthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
342652188cSthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
352652188cSthorpej * POSSIBILITY OF SUCH DAMAGE.
362652188cSthorpej */
372652188cSthorpej
38b5530672Slukem #include <sys/cdefs.h>
39*c1215136Sriastradh __KERNEL_RCSID(0, "$NetBSD: i2c_exec.c,v 1.18 2022/10/24 10:17:27 riastradh Exp $");
40b5530672Slukem
412652188cSthorpej #include <sys/param.h>
422652188cSthorpej #include <sys/systm.h>
43601e1783Sthorpej #include <sys/cpu.h>
442652188cSthorpej #include <sys/device.h>
4522ca8619Sjmcneill #include <sys/module.h>
462652188cSthorpej #include <sys/event.h>
472652188cSthorpej #include <sys/conf.h>
4862fc563cSthorpej #include <sys/kernel.h>
492652188cSthorpej
502652188cSthorpej #define _I2C_PRIVATE
512652188cSthorpej #include <dev/i2c/i2cvar.h>
522652188cSthorpej
53913f185fSjmcneill static uint8_t iic_smbus_crc8(uint16_t);
54913f185fSjmcneill static uint8_t iic_smbus_pec(int, uint8_t *, uint8_t *);
55913f185fSjmcneill
5622ca8619Sjmcneill static int i2cexec_modcmd(modcmd_t, void *);
5722ca8619Sjmcneill
5862fc563cSthorpej static inline int
iic_op_flags(int flags)5962fc563cSthorpej iic_op_flags(int flags)
6062fc563cSthorpej {
6162fc563cSthorpej
62c22653c7Sthorpej return flags | ((cold || shutting_down) ? I2C_F_POLL : 0);
6362fc563cSthorpej }
6462fc563cSthorpej
652652188cSthorpej /*
66601e1783Sthorpej * iic_tag_init:
67601e1783Sthorpej *
68601e1783Sthorpej * Perform some basic initialization of the i2c controller tag.
69601e1783Sthorpej */
70601e1783Sthorpej void
iic_tag_init(i2c_tag_t tag)71601e1783Sthorpej iic_tag_init(i2c_tag_t tag)
72601e1783Sthorpej {
73601e1783Sthorpej
74601e1783Sthorpej memset(tag, 0, sizeof(*tag));
75601e1783Sthorpej mutex_init(&tag->ic_bus_lock, MUTEX_DEFAULT, IPL_NONE);
76601e1783Sthorpej }
77601e1783Sthorpej
78601e1783Sthorpej /*
79601e1783Sthorpej * iic_tag_fini:
80601e1783Sthorpej *
81601e1783Sthorpej * Teardown of the i2c controller tag.
82601e1783Sthorpej */
83601e1783Sthorpej void
iic_tag_fini(i2c_tag_t tag)84601e1783Sthorpej iic_tag_fini(i2c_tag_t tag)
85601e1783Sthorpej {
86601e1783Sthorpej
87601e1783Sthorpej mutex_destroy(&tag->ic_bus_lock);
88601e1783Sthorpej }
89601e1783Sthorpej
90601e1783Sthorpej /*
9198ec1b8dSthorpej * iic_acquire_bus:
9298ec1b8dSthorpej *
9398ec1b8dSthorpej * Acquire the I2C bus for use by a client.
9498ec1b8dSthorpej */
9598ec1b8dSthorpej int
iic_acquire_bus(i2c_tag_t tag,int flags)9698ec1b8dSthorpej iic_acquire_bus(i2c_tag_t tag, int flags)
9798ec1b8dSthorpej {
9898ec1b8dSthorpej
99d52651a2Sthorpej #if 0 /* XXX Not quite ready for this yet. */
100601e1783Sthorpej KASSERT(!cpu_intr_p());
101d52651a2Sthorpej #endif
102601e1783Sthorpej
10362fc563cSthorpej flags = iic_op_flags(flags);
10462fc563cSthorpej
105601e1783Sthorpej if (flags & I2C_F_POLL) {
106601e1783Sthorpej /*
107601e1783Sthorpej * Polling should only be used in rare and/or
108601e1783Sthorpej * extreme circumstances; most i2c clients
109601e1783Sthorpej * should be allowed to sleep.
110601e1783Sthorpej *
111601e1783Sthorpej * Really, the ONLY user of I2C_F_POLL should be
112601e1783Sthorpej * "when cold", i.e. during early autoconfiguration
113601e1783Sthorpej * when there is only proc0, and we might have to
114601e1783Sthorpej * read SEEPROMs, etc. There should be no other
115601e1783Sthorpej * users interfering with our access of the i2c bus
116601e1783Sthorpej * in that case.
117601e1783Sthorpej */
118601e1783Sthorpej if (mutex_tryenter(&tag->ic_bus_lock) == 0) {
119601e1783Sthorpej return EBUSY;
120601e1783Sthorpej }
121601e1783Sthorpej } else {
122601e1783Sthorpej /*
123601e1783Sthorpej * N.B. We implement this as a mutex that we hold across
124601e1783Sthorpej * across a series of requests beause we'd like to get the
125601e1783Sthorpej * priority boost if a higher-priority process wants the
126601e1783Sthorpej * i2c bus while we're asleep waiting for the controller
127601e1783Sthorpej * to perform the I/O.
128601e1783Sthorpej *
129601e1783Sthorpej * XXXJRT Disable preemption here? We'd like to keep
130601e1783Sthorpej * the CPU while holding this resource, unless we release
131601e1783Sthorpej * it voluntarily (which should only happen while waiting
132601e1783Sthorpej * for a controller to complete I/O).
133601e1783Sthorpej */
134601e1783Sthorpej mutex_enter(&tag->ic_bus_lock);
135601e1783Sthorpej }
136601e1783Sthorpej
137601e1783Sthorpej int error = 0;
138601e1783Sthorpej if (tag->ic_acquire_bus) {
139601e1783Sthorpej error = (*tag->ic_acquire_bus)(tag->ic_cookie, flags);
140601e1783Sthorpej }
141601e1783Sthorpej
14219628cf9Sthorpej if (__predict_false(error)) {
14319628cf9Sthorpej mutex_exit(&tag->ic_bus_lock);
14419628cf9Sthorpej }
14519628cf9Sthorpej
146601e1783Sthorpej return error;
14798ec1b8dSthorpej }
14898ec1b8dSthorpej
14998ec1b8dSthorpej /*
15098ec1b8dSthorpej * iic_release_bus:
15198ec1b8dSthorpej *
152de4fa9d7Sandvar * Release the I2C bus, allowing another client to use it.
15398ec1b8dSthorpej */
15498ec1b8dSthorpej void
iic_release_bus(i2c_tag_t tag,int flags)15598ec1b8dSthorpej iic_release_bus(i2c_tag_t tag, int flags)
15698ec1b8dSthorpej {
15798ec1b8dSthorpej
158d52651a2Sthorpej #if 0 /* XXX Not quite ready for this yet. */
159601e1783Sthorpej KASSERT(!cpu_intr_p());
160d52651a2Sthorpej #endif
161601e1783Sthorpej
16262fc563cSthorpej flags = iic_op_flags(flags);
16362fc563cSthorpej
164601e1783Sthorpej if (tag->ic_release_bus) {
16598ec1b8dSthorpej (*tag->ic_release_bus)(tag->ic_cookie, flags);
16698ec1b8dSthorpej }
16798ec1b8dSthorpej
168601e1783Sthorpej mutex_exit(&tag->ic_bus_lock);
169601e1783Sthorpej }
170601e1783Sthorpej
17198ec1b8dSthorpej /*
1722652188cSthorpej * iic_exec:
1732652188cSthorpej *
1742652188cSthorpej * Simplified I2C client interface engine.
1752652188cSthorpej *
1762652188cSthorpej * This and the SMBus routines are the preferred interface for
1772652188cSthorpej * client access to I2C/SMBus, since many automated controllers
1782652188cSthorpej * do not provide access to the low-level primitives of the I2C
1792652188cSthorpej * bus protocol.
1802652188cSthorpej */
1812652188cSthorpej int
iic_exec(i2c_tag_t tag,i2c_op_t op,i2c_addr_t addr,const void * vcmd,size_t cmdlen,void * vbuf,size_t buflen,int flags)1822652188cSthorpej iic_exec(i2c_tag_t tag, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
1832652188cSthorpej size_t cmdlen, void *vbuf, size_t buflen, int flags)
1842652188cSthorpej {
1852652188cSthorpej const uint8_t *cmd = vcmd;
1862652188cSthorpej uint8_t *buf = vbuf;
187dc3fafcaSmycroft int error;
1882652188cSthorpej size_t len;
1892652188cSthorpej
190d52651a2Sthorpej #if 0 /* XXX Not quite ready for this yet. */
191601e1783Sthorpej KASSERT(!cpu_intr_p());
192d52651a2Sthorpej #endif
193601e1783Sthorpej
19462fc563cSthorpej flags = iic_op_flags(flags);
19562fc563cSthorpej
196913f185fSjmcneill if ((flags & I2C_F_PEC) && cmdlen > 0 && tag->ic_exec != NULL) {
197913f185fSjmcneill uint8_t data[33]; /* XXX */
198913f185fSjmcneill uint8_t b[3];
199913f185fSjmcneill
200913f185fSjmcneill b[0] = addr << 1;
201913f185fSjmcneill b[1] = cmd[0];
202913f185fSjmcneill
203913f185fSjmcneill switch (buflen) {
204913f185fSjmcneill case 0:
205913f185fSjmcneill data[0] = iic_smbus_pec(2, b, NULL);
206913f185fSjmcneill buflen++;
207913f185fSjmcneill break;
208913f185fSjmcneill case 1:
209913f185fSjmcneill b[2] = buf[0];
210913f185fSjmcneill data[0] = iic_smbus_pec(3, b, NULL);
211913f185fSjmcneill data[1] = b[2];
212913f185fSjmcneill buflen++;
213913f185fSjmcneill break;
214913f185fSjmcneill case 2:
215913f185fSjmcneill break;
216913f185fSjmcneill default:
217929a512fSmartin KASSERT(buflen+1 < sizeof(data));
218929a512fSmartin memcpy(data, vbuf, buflen);
219929a512fSmartin data[buflen] = iic_smbus_pec(2, b, data);
220913f185fSjmcneill buflen++;
221913f185fSjmcneill break;
222913f185fSjmcneill }
223913f185fSjmcneill
224913f185fSjmcneill return ((*tag->ic_exec)(tag->ic_cookie, op, addr, cmd,
225913f185fSjmcneill cmdlen, data, buflen, flags));
226913f185fSjmcneill }
227913f185fSjmcneill
2282652188cSthorpej /*
2292652188cSthorpej * Defer to the controller if it provides an exec function. Use
2302652188cSthorpej * it if it does.
2312652188cSthorpej */
2322652188cSthorpej if (tag->ic_exec != NULL)
2332652188cSthorpej return ((*tag->ic_exec)(tag->ic_cookie, op, addr, cmd,
2342652188cSthorpej cmdlen, buf, buflen, flags));
2352652188cSthorpej
2362652188cSthorpej if ((len = cmdlen) != 0) {
2372652188cSthorpej if ((error = iic_initiate_xfer(tag, addr, flags)) != 0)
2382652188cSthorpej goto bad;
2392652188cSthorpej while (len--) {
2402652188cSthorpej if ((error = iic_write_byte(tag, *cmd++, flags)) != 0)
2412652188cSthorpej goto bad;
2422652188cSthorpej }
243b4d7d7bbSpgoyette } else if (buflen == 0) {
244b4d7d7bbSpgoyette /*
245b4d7d7bbSpgoyette * This is a quick_read()/quick_write() command with
246b4d7d7bbSpgoyette * neither command nor data bytes
247b4d7d7bbSpgoyette */
248b4d7d7bbSpgoyette if (I2C_OP_STOP_P(op))
249b4d7d7bbSpgoyette flags |= I2C_F_STOP;
250b4d7d7bbSpgoyette if (I2C_OP_READ_P(op))
251b4d7d7bbSpgoyette flags |= I2C_F_READ;
252b4d7d7bbSpgoyette if ((error = iic_initiate_xfer(tag, addr, flags)) != 0)
253b4d7d7bbSpgoyette goto bad;
2542652188cSthorpej }
2552652188cSthorpej
2562652188cSthorpej if (I2C_OP_READ_P(op))
2572652188cSthorpej flags |= I2C_F_READ;
2582652188cSthorpej
2592652188cSthorpej len = buflen;
2602652188cSthorpej while (len--) {
2612652188cSthorpej if (len == 0 && I2C_OP_STOP_P(op))
2622652188cSthorpej flags |= I2C_F_STOP;
2632652188cSthorpej if (I2C_OP_READ_P(op)) {
2642652188cSthorpej /* Send REPEATED START. */
2652652188cSthorpej if ((len + 1) == buflen &&
2662652188cSthorpej (error = iic_initiate_xfer(tag, addr, flags)) != 0)
2672652188cSthorpej goto bad;
2682652188cSthorpej /* NACK on last byte. */
2692652188cSthorpej if (len == 0)
2702652188cSthorpej flags |= I2C_F_LAST;
2712652188cSthorpej if ((error = iic_read_byte(tag, buf++, flags)) != 0)
2722652188cSthorpej goto bad;
2732652188cSthorpej } else {
2742652188cSthorpej /* Maybe send START. */
2752652188cSthorpej if ((len + 1) == buflen && cmdlen == 0 &&
2762652188cSthorpej (error = iic_initiate_xfer(tag, addr, flags)) != 0)
2772652188cSthorpej goto bad;
278dc3fafcaSmycroft if ((error = iic_write_byte(tag, *buf++, flags)) != 0)
2792652188cSthorpej goto bad;
2802652188cSthorpej }
2812652188cSthorpej }
2822652188cSthorpej
2832652188cSthorpej return (0);
2842652188cSthorpej bad:
2852652188cSthorpej iic_send_stop(tag, flags);
2862652188cSthorpej return (error);
2872652188cSthorpej }
2882652188cSthorpej
2892652188cSthorpej /*
2902652188cSthorpej * iic_smbus_write_byte:
2912652188cSthorpej *
2922652188cSthorpej * Perform an SMBus "write byte" operation.
2932652188cSthorpej */
2942652188cSthorpej int
iic_smbus_write_byte(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint8_t val,int flags)2952652188cSthorpej iic_smbus_write_byte(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
2962652188cSthorpej uint8_t val, int flags)
2972652188cSthorpej {
2982652188cSthorpej
2992652188cSthorpej return (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, addr, &cmd, 1,
3002652188cSthorpej &val, 1, flags));
3012652188cSthorpej }
3022652188cSthorpej
3032652188cSthorpej /*
304913f185fSjmcneill * iic_smbus_write_word:
305913f185fSjmcneill *
306913f185fSjmcneill * Perform an SMBus "write word" operation.
307913f185fSjmcneill */
308913f185fSjmcneill int
iic_smbus_write_word(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint16_t val,int flags)309913f185fSjmcneill iic_smbus_write_word(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
310913f185fSjmcneill uint16_t val, int flags)
311913f185fSjmcneill {
312913f185fSjmcneill uint8_t vbuf[2];
313913f185fSjmcneill
314913f185fSjmcneill vbuf[0] = val & 0xff;
315913f185fSjmcneill vbuf[1] = (val >> 8) & 0xff;
316913f185fSjmcneill
317913f185fSjmcneill return (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, addr, &cmd, 1,
318913f185fSjmcneill vbuf, 2, flags));
319913f185fSjmcneill }
320913f185fSjmcneill
321913f185fSjmcneill /*
3222652188cSthorpej * iic_smbus_read_byte:
3232652188cSthorpej *
3242652188cSthorpej * Perform an SMBus "read byte" operation.
3252652188cSthorpej */
3262652188cSthorpej int
iic_smbus_read_byte(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint8_t * valp,int flags)3272652188cSthorpej iic_smbus_read_byte(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
3282652188cSthorpej uint8_t *valp, int flags)
3292652188cSthorpej {
3302652188cSthorpej
3312652188cSthorpej return (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, &cmd, 1,
3322652188cSthorpej valp, 1, flags));
3332652188cSthorpej }
3342652188cSthorpej
3352652188cSthorpej /*
336913f185fSjmcneill * iic_smbus_read_word:
337913f185fSjmcneill *
338913f185fSjmcneill * Perform an SMBus "read word" operation.
339913f185fSjmcneill */
340913f185fSjmcneill int
iic_smbus_read_word(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint16_t * valp,int flags)341913f185fSjmcneill iic_smbus_read_word(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
342913f185fSjmcneill uint16_t *valp, int flags)
343913f185fSjmcneill {
344913f185fSjmcneill
345913f185fSjmcneill return (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, &cmd, 1,
346913f185fSjmcneill (uint8_t *)valp, 2, flags));
347913f185fSjmcneill }
348913f185fSjmcneill
349913f185fSjmcneill /*
3502652188cSthorpej * iic_smbus_receive_byte:
3512652188cSthorpej *
3522652188cSthorpej * Perform an SMBus "receive byte" operation.
3532652188cSthorpej */
3542652188cSthorpej int
iic_smbus_receive_byte(i2c_tag_t tag,i2c_addr_t addr,uint8_t * valp,int flags)3552652188cSthorpej iic_smbus_receive_byte(i2c_tag_t tag, i2c_addr_t addr, uint8_t *valp,
3562652188cSthorpej int flags)
3572652188cSthorpej {
3582652188cSthorpej
3592652188cSthorpej return (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, NULL, 0,
3602652188cSthorpej valp, 1, flags));
3612652188cSthorpej }
362913f185fSjmcneill
363913f185fSjmcneill /*
364913f185fSjmcneill * iic_smbus_send_byte:
365913f185fSjmcneill *
366913f185fSjmcneill * Perform an SMBus "send byte" operation.
367913f185fSjmcneill */
368913f185fSjmcneill int
iic_smbus_send_byte(i2c_tag_t tag,i2c_addr_t addr,uint8_t val,int flags)369913f185fSjmcneill iic_smbus_send_byte(i2c_tag_t tag, i2c_addr_t addr, uint8_t val, int flags)
370913f185fSjmcneill {
371913f185fSjmcneill
372913f185fSjmcneill return (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, addr, NULL, 0,
373913f185fSjmcneill &val, 1, flags));
374913f185fSjmcneill }
375913f185fSjmcneill
376913f185fSjmcneill /*
377913f185fSjmcneill * iic_smbus_quick_read:
378913f185fSjmcneill *
379913f185fSjmcneill * Perform an SMBus "quick read" operation.
380913f185fSjmcneill */
381913f185fSjmcneill int
iic_smbus_quick_read(i2c_tag_t tag,i2c_addr_t addr,int flags)382913f185fSjmcneill iic_smbus_quick_read(i2c_tag_t tag, i2c_addr_t addr, int flags)
383913f185fSjmcneill {
384913f185fSjmcneill
385913f185fSjmcneill return (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, NULL, 0,
386913f185fSjmcneill NULL, 0, flags));
387913f185fSjmcneill }
388913f185fSjmcneill
389913f185fSjmcneill /*
390913f185fSjmcneill * iic_smbus_quick_write:
391913f185fSjmcneill *
392913f185fSjmcneill * Perform an SMBus "quick write" operation.
393913f185fSjmcneill */
394913f185fSjmcneill int
iic_smbus_quick_write(i2c_tag_t tag,i2c_addr_t addr,int flags)395913f185fSjmcneill iic_smbus_quick_write(i2c_tag_t tag, i2c_addr_t addr, int flags)
396913f185fSjmcneill {
397913f185fSjmcneill
398913f185fSjmcneill return (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, addr, NULL, 0,
399913f185fSjmcneill NULL, 0, flags));
400913f185fSjmcneill }
401913f185fSjmcneill
402913f185fSjmcneill /*
403913f185fSjmcneill * iic_smbus_block_read:
404913f185fSjmcneill *
405913f185fSjmcneill * Perform an SMBus "block read" operation.
406913f185fSjmcneill */
407913f185fSjmcneill int
iic_smbus_block_read(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint8_t * vbuf,size_t buflen,int flags)408913f185fSjmcneill iic_smbus_block_read(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
409913f185fSjmcneill uint8_t *vbuf, size_t buflen, int flags)
410913f185fSjmcneill {
411913f185fSjmcneill
4126ecf19e0Spgoyette return (iic_exec(tag, I2C_OP_READ_BLOCK, addr, &cmd, 1,
413913f185fSjmcneill vbuf, buflen, flags));
414913f185fSjmcneill }
415913f185fSjmcneill
416913f185fSjmcneill /*
417913f185fSjmcneill * iic_smbus_block_write:
418913f185fSjmcneill *
419913f185fSjmcneill * Perform an SMBus "block write" operation.
420913f185fSjmcneill */
421913f185fSjmcneill int
iic_smbus_block_write(i2c_tag_t tag,i2c_addr_t addr,uint8_t cmd,uint8_t * vbuf,size_t buflen,int flags)422913f185fSjmcneill iic_smbus_block_write(i2c_tag_t tag, i2c_addr_t addr, uint8_t cmd,
423913f185fSjmcneill uint8_t *vbuf, size_t buflen, int flags)
424913f185fSjmcneill {
425913f185fSjmcneill
4266ecf19e0Spgoyette return (iic_exec(tag, I2C_OP_WRITE_BLOCK, addr, &cmd, 1,
427913f185fSjmcneill vbuf, buflen, flags));
428913f185fSjmcneill }
429913f185fSjmcneill
430913f185fSjmcneill /*
431913f185fSjmcneill * iic_smbus_crc8
432913f185fSjmcneill *
433913f185fSjmcneill * Private helper for calculating packet error checksum
434913f185fSjmcneill */
435913f185fSjmcneill static uint8_t
iic_smbus_crc8(uint16_t data)436913f185fSjmcneill iic_smbus_crc8(uint16_t data)
437913f185fSjmcneill {
438913f185fSjmcneill int i;
439913f185fSjmcneill
440913f185fSjmcneill for (i = 0; i < 8; i++) {
441913f185fSjmcneill if (data & 0x8000)
442913f185fSjmcneill data = data ^ (0x1070U << 3);
443913f185fSjmcneill data = data << 1;
444913f185fSjmcneill }
445913f185fSjmcneill
446913f185fSjmcneill return (uint8_t)(data >> 8);
447913f185fSjmcneill }
448913f185fSjmcneill
449913f185fSjmcneill /*
450913f185fSjmcneill * iic_smbus_pec
451913f185fSjmcneill *
452913f185fSjmcneill * Private function for calculating packet error checking on SMBus
453913f185fSjmcneill * packets.
454913f185fSjmcneill */
455913f185fSjmcneill static uint8_t
iic_smbus_pec(int count,uint8_t * s,uint8_t * r)456913f185fSjmcneill iic_smbus_pec(int count, uint8_t *s, uint8_t *r)
457913f185fSjmcneill {
458913f185fSjmcneill int i;
459913f185fSjmcneill uint8_t crc = 0;
460913f185fSjmcneill
461913f185fSjmcneill for (i = 0; i < count; i++)
462913f185fSjmcneill crc = iic_smbus_crc8((crc ^ s[i]) << 8);
463913f185fSjmcneill if (r != NULL)
464913f185fSjmcneill for (i = 0; i <= r[0]; i++)
465913f185fSjmcneill crc = iic_smbus_crc8((crc ^ r[i]) << 8);
466913f185fSjmcneill
467913f185fSjmcneill return crc;
468913f185fSjmcneill }
46922ca8619Sjmcneill
47022ca8619Sjmcneill MODULE(MODULE_CLASS_MISC, i2cexec, NULL);
47122ca8619Sjmcneill
47222ca8619Sjmcneill static int
i2cexec_modcmd(modcmd_t cmd,void * opaque)47322ca8619Sjmcneill i2cexec_modcmd(modcmd_t cmd, void *opaque)
47422ca8619Sjmcneill {
47522ca8619Sjmcneill switch (cmd) {
47622ca8619Sjmcneill case MODULE_CMD_INIT:
47722ca8619Sjmcneill case MODULE_CMD_FINI:
47822ca8619Sjmcneill return 0;
47922ca8619Sjmcneill break;
48022ca8619Sjmcneill default:
48122ca8619Sjmcneill return ENOTTY;
48222ca8619Sjmcneill }
48322ca8619Sjmcneill }
484