1*5f3ac896Sthorpej /* $NetBSD: ddc.c,v 1.9 2019/12/23 18:12:50 thorpej Exp $ */
29f862191Sgdamore
39f862191Sgdamore /*-
49f862191Sgdamore * Copyright (c) 2006 Itronix Inc.
59f862191Sgdamore * All rights reserved.
69f862191Sgdamore *
79f862191Sgdamore * Written by Garrett D'Amore for Itronix Inc.
89f862191Sgdamore *
99f862191Sgdamore * Redistribution and use in source and binary forms, with or without
109f862191Sgdamore * modification, are permitted provided that the following conditions
119f862191Sgdamore * are met:
129f862191Sgdamore * 1. Redistributions of source code must retain the above copyright
139f862191Sgdamore * notice, this list of conditions and the following disclaimer.
149f862191Sgdamore * 2. Redistributions in binary form must reproduce the above copyright
159f862191Sgdamore * notice, this list of conditions and the following disclaimer in the
169f862191Sgdamore * documentation and/or other materials provided with the distribution.
179f862191Sgdamore * 3. The name of Itronix Inc. may not be used to endorse
189f862191Sgdamore * or promote products derived from this software without specific
199f862191Sgdamore * prior written permission.
209f862191Sgdamore *
219f862191Sgdamore * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND ANY EXPRESS
229f862191Sgdamore * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
239f862191Sgdamore * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
249f862191Sgdamore * ARE DISCLAIMED. IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
259f862191Sgdamore * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
269f862191Sgdamore * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
279f862191Sgdamore * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
289f862191Sgdamore * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
299f862191Sgdamore * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
309f862191Sgdamore * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
319f862191Sgdamore * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
329f862191Sgdamore */
339f862191Sgdamore
349f862191Sgdamore #include <sys/cdefs.h>
35*5f3ac896Sthorpej __KERNEL_RCSID(0, "$NetBSD: ddc.c,v 1.9 2019/12/23 18:12:50 thorpej Exp $");
369f862191Sgdamore
379f862191Sgdamore #include <sys/param.h>
389f862191Sgdamore #include <sys/systm.h>
399f862191Sgdamore #include <sys/device.h>
409f862191Sgdamore #include <sys/kernel.h>
419f862191Sgdamore
42a2a38285Sad #include <sys/bus.h>
439f862191Sgdamore #include <dev/i2c/i2cvar.h>
449f862191Sgdamore #include <dev/i2c/ddcreg.h>
459f862191Sgdamore #include <dev/i2c/ddcvar.h>
469f862191Sgdamore
479f862191Sgdamore /*
489f862191Sgdamore * VESA Display Data Channel I2C client, used to access EDID
499f862191Sgdamore * information.
509f862191Sgdamore *
519f862191Sgdamore * Note that this only supports DDC version 2, which uses normal I2C.
529f862191Sgdamore * The older DDCv1 standard used sync signaling to provide the I2C
539f862191Sgdamore * clock, and is typically not used on reasonably recent monitors.
549f862191Sgdamore */
559f862191Sgdamore
569f862191Sgdamore struct ddc_softc {
579f862191Sgdamore i2c_tag_t sc_tag;
589f862191Sgdamore int sc_address;
599f862191Sgdamore };
609f862191Sgdamore
619fbdf159Sxtraeme static int ddc_match(device_t, cfdata_t, void *);
629fbdf159Sxtraeme static void ddc_attach(device_t, device_t, void *);
639f862191Sgdamore
649fbdf159Sxtraeme CFATTACH_DECL_NEW(ddc, sizeof (struct ddc_softc),
659f862191Sgdamore ddc_match, ddc_attach, NULL, NULL);
669f862191Sgdamore
679f862191Sgdamore static int
ddc_match(device_t parent,cfdata_t cf,void * aux)689fbdf159Sxtraeme ddc_match(device_t parent, cfdata_t cf, void *aux)
699f862191Sgdamore {
709f862191Sgdamore struct i2c_attach_args *ia = aux;
719f862191Sgdamore
729f862191Sgdamore if (ia->ia_addr == DDC_ADDR)
73aa41e992Sthorpej return I2C_MATCH_ADDRESS_ONLY;
749f862191Sgdamore return 0;
759f862191Sgdamore }
769f862191Sgdamore
779f862191Sgdamore static void
ddc_attach(device_t parent,device_t self,void * aux)789fbdf159Sxtraeme ddc_attach(device_t parent, device_t self, void *aux)
799f862191Sgdamore {
809f862191Sgdamore struct ddc_softc *sc = device_private(self);
819f862191Sgdamore struct i2c_attach_args *ia = aux;
829f862191Sgdamore
83741d9fcdSjmcneill sc->sc_tag = ia->ia_tag;
849f862191Sgdamore sc->sc_address = ia->ia_addr;
859f862191Sgdamore
869f862191Sgdamore aprint_naive(": DDC\n");
879f862191Sgdamore aprint_normal(": DDC\n");
889f862191Sgdamore }
899f862191Sgdamore
909f862191Sgdamore /* XXX: add cdev ops? */
919f862191Sgdamore
929f862191Sgdamore int
ddc_read_edid(i2c_tag_t tag,uint8_t * dest,size_t len)939f862191Sgdamore ddc_read_edid(i2c_tag_t tag, uint8_t *dest, size_t len)
949f862191Sgdamore {
95eb56a1b7Sjmcneill return ddc_read_edid_block(tag, dest, len, DDC_EDID_START);
96eb56a1b7Sjmcneill }
97eb56a1b7Sjmcneill
98eb56a1b7Sjmcneill int
ddc_read_edid_block(i2c_tag_t tag,uint8_t * dest,size_t len,uint8_t block)99eb56a1b7Sjmcneill ddc_read_edid_block(i2c_tag_t tag, uint8_t *dest, size_t len, uint8_t block)
100eb56a1b7Sjmcneill {
101d080cb02Sjmcneill uint8_t edid[256];
1029f862191Sgdamore uint8_t wbuf[2];
103741d9fcdSjmcneill int error;
1049f862191Sgdamore
105*5f3ac896Sthorpej if ((error = iic_acquire_bus(tag, 0)) != 0)
106741d9fcdSjmcneill return error;
1079f862191Sgdamore
108d080cb02Sjmcneill wbuf[0] = block >> 1; /* start address */
1099f862191Sgdamore
110741d9fcdSjmcneill if ((error = iic_exec(tag, I2C_OP_READ_WITH_STOP, DDC_ADDR, wbuf, 1,
111*5f3ac896Sthorpej edid, sizeof(edid), 0)) != 0) {
112*5f3ac896Sthorpej iic_release_bus(tag, 0);
113741d9fcdSjmcneill return error;
1149f862191Sgdamore }
115*5f3ac896Sthorpej iic_release_bus(tag, 0);
116d080cb02Sjmcneill
117d080cb02Sjmcneill if (block & 1) {
118d1579b2dSriastradh memcpy(dest, &edid[128], uimin(len, 128));
119d080cb02Sjmcneill } else {
120d1579b2dSriastradh memcpy(dest, &edid[0], uimin(len, 128));
121d080cb02Sjmcneill }
122d080cb02Sjmcneill
1239f862191Sgdamore return 0;
1249f862191Sgdamore }
125741d9fcdSjmcneill
126741d9fcdSjmcneill int
ddc_dev_read_edid(device_t dev,uint8_t * dest,size_t len)127741d9fcdSjmcneill ddc_dev_read_edid(device_t dev, uint8_t *dest, size_t len)
128741d9fcdSjmcneill {
129741d9fcdSjmcneill return ddc_dev_read_edid_block(dev, dest, len, DDC_EDID_START);
130741d9fcdSjmcneill }
131741d9fcdSjmcneill
132741d9fcdSjmcneill int
ddc_dev_read_edid_block(device_t dev,uint8_t * dest,size_t len,uint8_t block)133741d9fcdSjmcneill ddc_dev_read_edid_block(device_t dev, uint8_t *dest, size_t len, uint8_t block)
134741d9fcdSjmcneill {
135741d9fcdSjmcneill if (!device_is_a(dev, "ddc"))
136741d9fcdSjmcneill return EINVAL;
137741d9fcdSjmcneill
138741d9fcdSjmcneill const struct ddc_softc *sc = device_private(dev);
139741d9fcdSjmcneill return ddc_read_edid_block(sc->sc_tag, dest, len, block);
140741d9fcdSjmcneill }
141