xref: /netbsd-src/sys/dev/fdt/cdns3_fdt.c (revision d908d4c5672fb6a1455f85f0a1343c43d66a77bd)
1*d908d4c5Sskrll /* $NetBSD: cdns3_fdt.c,v 1.1 2024/01/18 07:48:57 skrll Exp $ */
2*d908d4c5Sskrll 
3*d908d4c5Sskrll /*-
4*d908d4c5Sskrll  * Copyright (c) 2023 The NetBSD Foundation, Inc.
5*d908d4c5Sskrll  * All rights reserved.
6*d908d4c5Sskrll  *
7*d908d4c5Sskrll  * This code is derived from software contributed to The NetBSD Foundation
8*d908d4c5Sskrll  * by Nick Hudson
9*d908d4c5Sskrll  *
10*d908d4c5Sskrll  * Redistribution and use in source and binary forms, with or without
11*d908d4c5Sskrll  * modification, are permitted provided that the following conditions
12*d908d4c5Sskrll  * are met:
13*d908d4c5Sskrll  * 1. Redistributions of source code must retain the above copyright
14*d908d4c5Sskrll  *    notice, this list of conditions and the following disclaimer.
15*d908d4c5Sskrll  * 2. Redistributions in binary form must reproduce the above copyright
16*d908d4c5Sskrll  *    notice, this list of conditions and the following disclaimer in the
17*d908d4c5Sskrll  *    documentation and/or other materials provided with the distribution.
18*d908d4c5Sskrll  *
19*d908d4c5Sskrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20*d908d4c5Sskrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21*d908d4c5Sskrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22*d908d4c5Sskrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23*d908d4c5Sskrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24*d908d4c5Sskrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25*d908d4c5Sskrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26*d908d4c5Sskrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27*d908d4c5Sskrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28*d908d4c5Sskrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29*d908d4c5Sskrll  * POSSIBILITY OF SUCH DAMAGE.
30*d908d4c5Sskrll  */
31*d908d4c5Sskrll 
32*d908d4c5Sskrll #include <sys/cdefs.h>
33*d908d4c5Sskrll __KERNEL_RCSID(0, "$NetBSD: cdns3_fdt.c,v 1.1 2024/01/18 07:48:57 skrll Exp $");
34*d908d4c5Sskrll 
35*d908d4c5Sskrll #include <sys/param.h>
36*d908d4c5Sskrll 
37*d908d4c5Sskrll #include <sys/bus.h>
38*d908d4c5Sskrll #include <sys/device.h>
39*d908d4c5Sskrll #include <sys/intr.h>
40*d908d4c5Sskrll 
41*d908d4c5Sskrll #include <dev/usb/xhcireg.h>
42*d908d4c5Sskrll #include <dev/usb/xhcivar.h>
43*d908d4c5Sskrll 
44*d908d4c5Sskrll #include <dev/fdt/fdtvar.h>
45*d908d4c5Sskrll 
46*d908d4c5Sskrll struct cdns3_fdt_softc {
47*d908d4c5Sskrll 	struct xhci_softc	 sc_xhci;
48*d908d4c5Sskrll 	bus_space_tag_t		 sc_otg_bst;
49*d908d4c5Sskrll 	bus_space_handle_t	 sc_otg_bsh;
50*d908d4c5Sskrll 	void			*sc_ih;
51*d908d4c5Sskrll };
52*d908d4c5Sskrll 
53*d908d4c5Sskrll #define	OTGRD4(sc, reg)							\
54*d908d4c5Sskrll 	bus_space_read_4((sc)->sc_otg_bst, (sc)->sc_otg_bsh, (reg))
55*d908d4c5Sskrll #define	OTGWR4(sc, reg, val)						\
56*d908d4c5Sskrll 	bus_space_write_4((sc)->sc_otg_bst, (sc)->sc_otg_bsh, (reg), (val))
57*d908d4c5Sskrll 
58*d908d4c5Sskrll 
59*d908d4c5Sskrll /*
60*d908d4c5Sskrll  * Cadence USB3 controller.
61*d908d4c5Sskrll  */
62*d908d4c5Sskrll 
63*d908d4c5Sskrll #define	OTG_DID                 0x0000
64*d908d4c5Sskrll #define	 OTG_DID_V1             0x4024e
65*d908d4c5Sskrll #define	OTG_CMD                 0x10
66*d908d4c5Sskrll #define	 OTG_CMD_HOST_BUS_REQ   __BIT(1)
67*d908d4c5Sskrll #define	 OTG_CMD_OTG_DIS        __BIT(3)
68*d908d4c5Sskrll #define	OTG_STS                 0x14
69*d908d4c5Sskrll #define	 OTG_STS_XHCI_READY     __BIT(26)
70*d908d4c5Sskrll 
71*d908d4c5Sskrll 
72*d908d4c5Sskrll static const struct device_compatible_entry compat_data[] = {
73*d908d4c5Sskrll 	{ .compat = "cdns,usb3" },
74*d908d4c5Sskrll 	DEVICE_COMPAT_EOL
75*d908d4c5Sskrll };
76*d908d4c5Sskrll 
77*d908d4c5Sskrll static int
cdns3_fdt_match(device_t parent,cfdata_t cf,void * aux)78*d908d4c5Sskrll cdns3_fdt_match(device_t parent, cfdata_t cf, void *aux)
79*d908d4c5Sskrll {
80*d908d4c5Sskrll 	struct fdt_attach_args * const faa = aux;
81*d908d4c5Sskrll 
82*d908d4c5Sskrll 	return of_compatible_match(faa->faa_phandle, compat_data);
83*d908d4c5Sskrll }
84*d908d4c5Sskrll 
85*d908d4c5Sskrll static void
cdns3_fdt_attach(device_t parent,device_t self,void * aux)86*d908d4c5Sskrll cdns3_fdt_attach(device_t parent, device_t self, void *aux)
87*d908d4c5Sskrll {
88*d908d4c5Sskrll 	struct cdns3_fdt_softc * const cfsc = device_private(self);
89*d908d4c5Sskrll 	struct xhci_softc * const sc = &cfsc->sc_xhci;
90*d908d4c5Sskrll 	struct fdt_attach_args * const faa = aux;
91*d908d4c5Sskrll 	const int phandle = faa->faa_phandle;
92*d908d4c5Sskrll 
93*d908d4c5Sskrll 	struct fdtbus_phy *phy;
94*d908d4c5Sskrll 	char intrstr[128];
95*d908d4c5Sskrll 	bus_addr_t addr;
96*d908d4c5Sskrll 	bus_size_t size;
97*d908d4c5Sskrll 	int error;
98*d908d4c5Sskrll 
99*d908d4c5Sskrll 	/*
100*d908d4c5Sskrll 	 * Only host mode is supported, but this includes otg devices
101*d908d4c5Sskrll 	 * that have 'usb-role-switch' and 'role-switch-default-mode' of
102*d908d4c5Sskrll 	 * 'host'
103*d908d4c5Sskrll 	 */
104*d908d4c5Sskrll 	const char *dr_mode = fdtbus_get_string(phandle, "dr_mode");
105*d908d4c5Sskrll 	if (dr_mode == NULL || strcmp(dr_mode, "otg") == 0) {
106*d908d4c5Sskrll 		bool ok = false;
107*d908d4c5Sskrll 		if (of_hasprop(phandle, "usb-role-switch")) {
108*d908d4c5Sskrll 			const char *rsdm = fdtbus_get_string(phandle,
109*d908d4c5Sskrll 			    "role-switch-default-mode");
110*d908d4c5Sskrll 			if (rsdm != NULL && strcmp(rsdm, "host") == 0)
111*d908d4c5Sskrll 				ok = true;
112*d908d4c5Sskrll 
113*d908d4c5Sskrll 			if (!ok) {
114*d908d4c5Sskrll 				aprint_error(": host is not default mode\n");
115*d908d4c5Sskrll 				return;
116*d908d4c5Sskrll 			}
117*d908d4c5Sskrll 		}
118*d908d4c5Sskrll 		if (!ok) {
119*d908d4c5Sskrll 			aprint_error(": cannot switch 'otg' mode to host\n");
120*d908d4c5Sskrll 			return;
121*d908d4c5Sskrll 		}
122*d908d4c5Sskrll 	} else if (strcmp(dr_mode, "host") != 0) {
123*d908d4c5Sskrll 		aprint_error(": '%s' not supported\n", dr_mode);
124*d908d4c5Sskrll 		return;
125*d908d4c5Sskrll 	}
126*d908d4c5Sskrll 
127*d908d4c5Sskrll 	sc->sc_dev = self;
128*d908d4c5Sskrll 	sc->sc_bus.ub_hcpriv = sc;
129*d908d4c5Sskrll 	sc->sc_bus.ub_dmatag = faa->faa_dmat;
130*d908d4c5Sskrll 	sc->sc_iot = faa->faa_bst;
131*d908d4c5Sskrll 
132*d908d4c5Sskrll 	bus_space_handle_t bsh;
133*d908d4c5Sskrll 	if (fdtbus_get_reg_byname(phandle, "otg", &addr, &size) != 0 ||
134*d908d4c5Sskrll 	    bus_space_map(faa->faa_bst, addr, size, 0, &bsh) != 0) {
135*d908d4c5Sskrll 		aprint_error(": couldn't map otg registers\n");
136*d908d4c5Sskrll 		return;
137*d908d4c5Sskrll 	}
138*d908d4c5Sskrll 	cfsc->sc_otg_bst = faa->faa_bst;
139*d908d4c5Sskrll 	cfsc->sc_otg_bsh = bsh;
140*d908d4c5Sskrll 
141*d908d4c5Sskrll 	if (fdtbus_get_reg_byname(phandle, "xhci", &addr, &size) != 0 ||
142*d908d4c5Sskrll 	    bus_space_map(faa->faa_bst, addr, size, 0, &bsh) != 0) {
143*d908d4c5Sskrll 		aprint_error(": couldn't map xhci registers\n");
144*d908d4c5Sskrll 		return;
145*d908d4c5Sskrll 	}
146*d908d4c5Sskrll 
147*d908d4c5Sskrll 	sc->sc_ios = size;
148*d908d4c5Sskrll 	sc->sc_ioh = bsh;
149*d908d4c5Sskrll 
150*d908d4c5Sskrll 	uint32_t did = OTGRD4(cfsc, OTG_DID);
151*d908d4c5Sskrll 	if (did != OTG_DID_V1) {
152*d908d4c5Sskrll 		aprint_error(": unsupported IP (%#x)\n", did);
153*d908d4c5Sskrll 		return;
154*d908d4c5Sskrll 	}
155*d908d4c5Sskrll 	OTGWR4(cfsc, OTG_CMD, OTG_CMD_HOST_BUS_REQ | OTG_CMD_OTG_DIS);
156*d908d4c5Sskrll 	int tries;
157*d908d4c5Sskrll 	uint32_t sts;
158*d908d4c5Sskrll 	for (tries = 100; tries > 0; tries--) {
159*d908d4c5Sskrll 		sts = OTGRD4(cfsc, OTG_STS);
160*d908d4c5Sskrll 		if (sts & OTG_STS_XHCI_READY)
161*d908d4c5Sskrll 			break;
162*d908d4c5Sskrll 		delay(1000);
163*d908d4c5Sskrll 	}
164*d908d4c5Sskrll 	if (tries == 0) {
165*d908d4c5Sskrll 		aprint_error(": not ready (%#x)\n", sts);
166*d908d4c5Sskrll 		return;
167*d908d4c5Sskrll 	}
168*d908d4c5Sskrll 
169*d908d4c5Sskrll 	aprint_naive("\n");
170*d908d4c5Sskrll 	aprint_normal(": Cadence USB3 XHCI\n");
171*d908d4c5Sskrll 
172*d908d4c5Sskrll 	/* Enable PHY devices */
173*d908d4c5Sskrll 	for (u_int i = 0; ; i++) {
174*d908d4c5Sskrll 		phy = fdtbus_phy_get_index(phandle, i);
175*d908d4c5Sskrll 		if (phy == NULL)
176*d908d4c5Sskrll 			break;
177*d908d4c5Sskrll 		if (fdtbus_phy_enable(phy, true) != 0)
178*d908d4c5Sskrll 			aprint_error_dev(self, "couldn't enable phy #%d\n", i);
179*d908d4c5Sskrll 	}
180*d908d4c5Sskrll 
181*d908d4c5Sskrll 	if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
182*d908d4c5Sskrll 		aprint_error_dev(self, "failed to decode interrupt\n");
183*d908d4c5Sskrll 		return;
184*d908d4c5Sskrll 	}
185*d908d4c5Sskrll 
186*d908d4c5Sskrll 	void *ih = fdtbus_intr_establish_xname(phandle, 0, IPL_USB,
187*d908d4c5Sskrll 	    FDT_INTR_MPSAFE, xhci_intr, sc, device_xname(self));
188*d908d4c5Sskrll 	if (ih == NULL) {
189*d908d4c5Sskrll 		aprint_error_dev(self, "couldn't establish interrupt on %s\n",
190*d908d4c5Sskrll 		    intrstr);
191*d908d4c5Sskrll 		return;
192*d908d4c5Sskrll 	}
193*d908d4c5Sskrll 	aprint_normal_dev(self, "interrupting on %s\n", intrstr);
194*d908d4c5Sskrll 
195*d908d4c5Sskrll 	sc->sc_bus.ub_revision = USBREV_3_0;
196*d908d4c5Sskrll 	error = xhci_init(sc);
197*d908d4c5Sskrll 	if (error) {
198*d908d4c5Sskrll 		aprint_error_dev(self, "init failed, error = %d\n", error);
199*d908d4c5Sskrll 		return;
200*d908d4c5Sskrll 	}
201*d908d4c5Sskrll 
202*d908d4c5Sskrll 	sc->sc_child = config_found(self, &sc->sc_bus, usbctlprint, CFARGS_NONE);
203*d908d4c5Sskrll 	sc->sc_child2 = config_found(self, &sc->sc_bus2, usbctlprint,
204*d908d4c5Sskrll 	    CFARGS_NONE);
205*d908d4c5Sskrll }
206*d908d4c5Sskrll 
207*d908d4c5Sskrll 
208*d908d4c5Sskrll CFATTACH_DECL2_NEW(cdns3_fdt, sizeof(struct cdns3_fdt_softc),
209*d908d4c5Sskrll 	cdns3_fdt_match, cdns3_fdt_attach, NULL,
210*d908d4c5Sskrll 	xhci_activate, NULL, xhci_childdet);
211