xref: /netbsd-src/sys/arch/zaurus/dev/scoopreg.h (revision 94ff29c8faa3abeb8d5aa089a2d82b4c4aef15e3)
1*94ff29c8Snonaka /*	$NetBSD: scoopreg.h,v 1.6 2014/09/23 14:49:46 nonaka Exp $	*/
2953d3b5bSober /*	$OpenBSD: zaurus_scoopreg.h,v 1.7 2005/07/01 23:51:55 uwe Exp $	*/
3953d3b5bSober 
4953d3b5bSober /*
5953d3b5bSober  * Copyright (c) 2005 Uwe Stuehler <uwe@bsdx.de>
6953d3b5bSober  *
7953d3b5bSober  * Permission to use, copy, modify, and distribute this software for any
8953d3b5bSober  * purpose with or without fee is hereby granted, provided that the above
9953d3b5bSober  * copyright notice and this permission notice appear in all copies.
10953d3b5bSober  *
11953d3b5bSober  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12953d3b5bSober  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13953d3b5bSober  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14953d3b5bSober  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15953d3b5bSober  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16953d3b5bSober  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17953d3b5bSober  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18953d3b5bSober  */
19953d3b5bSober 
20953d3b5bSober #define SCOOP_SIZE		0x2c
21953d3b5bSober 
22953d3b5bSober /* registers and values */
23953d3b5bSober 
24953d3b5bSober #define SCOOP_MCR		0x00
25953d3b5bSober #define  SCP_MCR_IOCARD		0x0010
26953d3b5bSober #define SCOOP_CDR		0x04	/* card detect register */
27953d3b5bSober #define  SCP_CDR_DETECT		0x0002
28953d3b5bSober #define SCOOP_CSR		0x08	/* card status register */
29953d3b5bSober #define  SCP_CSR_READY		0x0002
30953d3b5bSober #define  SCP_CSR_MISSING	0x0004
31953d3b5bSober #define  SCP_CSR_WPROT		0x0008
32953d3b5bSober #define  SCP_CSR_BVD1		0x0010
33953d3b5bSober #define  SCP_CSR_BVD2		0x0020
34953d3b5bSober #define  SCP_CSR_3V		0x0040
35953d3b5bSober #define  SCP_CSR_PWR		0x0080
36953d3b5bSober #define SCOOP_CPR		0x0c	/* card power register */
37953d3b5bSober #define  SCP_CPR_OFF		0x0000
389efd71caSnonaka #define  SCP_CPR_3V		0x0001	/* 3V for CF card */
399efd71caSnonaka #define  SCP_CPR_5V		0x0002	/* 5V for CF card */
409efd71caSnonaka #define  SCP_CPR_SD_3V		0x0004	/* 3.3V for SD/MMC card */
419efd71caSnonaka #define  SCP_CPR_VOLTAGE_MSK	0x0007
42953d3b5bSober #define  SCP_CPR_PWR		0x0080
43953d3b5bSober #define SCOOP_CCR		0x10	/* card control register */
44953d3b5bSober #define  SCP_CCR_RESET		0x0080
45953d3b5bSober #define SCOOP_IRR		0x14	/* XXX for pcic: bit 0x4 role is? */
46953d3b5bSober #define SCOOP_IRM		0x14
47953d3b5bSober #define SCOOP_IMR		0x18
48953d3b5bSober #define  SCP_IMR_READY		0x0002
49953d3b5bSober #define  SCP_IMR_DETECT		0x0004
50953d3b5bSober #define  SCP_IMR_WRPROT		0x0008
51953d3b5bSober #define  SCP_IMR_STSCHG		0x0010
52953d3b5bSober #define  SCP_IMR_BATWARN	0x0020
53953d3b5bSober #define  SCP_IMR_UNKN0		0x0040
54953d3b5bSober #define  SCP_IMR_UNKN1		0x0080
55953d3b5bSober #define SCOOP_ISR		0x1c
56953d3b5bSober #define SCOOP_GPCR		0x20	/* GPIO pin direction (R/W) */
57953d3b5bSober #define SCOOP_GPWR		0x24	/* GPIO pin output level (R/W) */
58953d3b5bSober #define SCOOP_GPRR		0x28	/* GPIO pin input level (R) */
59953d3b5bSober 
60953d3b5bSober /* GPIO bits */
61953d3b5bSober 
62953d3b5bSober #define SCOOP0_LED_GREEN		1
63953d3b5bSober #define SCOOP0_JK_B_C3000		2
64533071c4Stsutsui #define SCOOP0_SWA_C860			2
65953d3b5bSober #define SCOOP0_CHARGE_OFF_C3000		3
66533071c4Stsutsui #define SCOOP0_SWB_C860			3
67953d3b5bSober #define SCOOP0_MUTE_L			4
68953d3b5bSober #define SCOOP0_MUTE_R			5
69953d3b5bSober #define SCOOP0_AKIN_PULLUP		6
70953d3b5bSober #define SCOOP0_CF_POWER_C3000		6
71*94ff29c8Snonaka #define SCOOP0_AMP_ON			7
72953d3b5bSober #define SCOOP0_LED_ORANGE_C3000		7
73953d3b5bSober #define SCOOP0_BACKLIGHT_CONT		8
74953d3b5bSober #define SCOOP0_JK_A_C3000		8
75953d3b5bSober #define SCOOP0_MIC_BIAS			9
76953d3b5bSober #define SCOOP0_ADC_TEMP_ON_C3000	9
77953d3b5bSober 
78953d3b5bSober #define SCOOP1_IR_ON			1
79953d3b5bSober #define SCOOP1_AKIN_PULLUP		2
80953d3b5bSober #define SCOOP1_RESERVED_3		3
81953d3b5bSober #define SCOOP1_RESERVED_4		4
82953d3b5bSober #define SCOOP1_RESERVED_5		5
83953d3b5bSober #define SCOOP1_RESERVED_6		6
84953d3b5bSober #define SCOOP1_BACKLIGHT_CONT		7
85953d3b5bSober #define SCOOP1_BACKLIGHT_ON		8
86953d3b5bSober #define SCOOP1_MIC_BIAS			9
87