xref: /netbsd-src/sys/arch/x86/pci/pci_intr_machdep.c (revision f82d7874c259b2a6cc59b714f844919f32bf7b51)
1 /*	$NetBSD: pci_intr_machdep.c,v 1.9 2008/05/03 17:03:45 cegger Exp $	*/
2 
3 /*-
4  * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  */
32 
33 /*
34  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
35  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
36  *
37  * Redistribution and use in source and binary forms, with or without
38  * modification, are permitted provided that the following conditions
39  * are met:
40  * 1. Redistributions of source code must retain the above copyright
41  *    notice, this list of conditions and the following disclaimer.
42  * 2. Redistributions in binary form must reproduce the above copyright
43  *    notice, this list of conditions and the following disclaimer in the
44  *    documentation and/or other materials provided with the distribution.
45  * 3. All advertising materials mentioning features or use of this software
46  *    must display the following acknowledgement:
47  *	This product includes software developed by Charles M. Hannum.
48  * 4. The name of the author may not be used to endorse or promote products
49  *    derived from this software without specific prior written permission.
50  *
51  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
52  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
53  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
54  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
55  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
56  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
60  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  */
62 
63 /*
64  * Machine-specific functions for PCI autoconfiguration.
65  *
66  * On PCs, there are two methods of generating PCI configuration cycles.
67  * We try to detect the appropriate mechanism for this machine and set
68  * up a few function pointers to access the correct method directly.
69  *
70  * The configuration method can be hard-coded in the config file by
71  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
72  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
73  */
74 
75 #include <sys/cdefs.h>
76 __KERNEL_RCSID(0, "$NetBSD: pci_intr_machdep.c,v 1.9 2008/05/03 17:03:45 cegger Exp $");
77 
78 #include <sys/types.h>
79 #include <sys/param.h>
80 #include <sys/time.h>
81 #include <sys/systm.h>
82 #include <sys/errno.h>
83 #include <sys/device.h>
84 #include <sys/intr.h>
85 
86 #include <uvm/uvm_extern.h>
87 
88 #include <dev/pci/pcivar.h>
89 
90 #include "ioapic.h"
91 #include "eisa.h"
92 #include "acpi.h"
93 #include "opt_mpbios.h"
94 #include "opt_acpi.h"
95 
96 #if NIOAPIC > 0 || NACPI > 0
97 #include <machine/i82093var.h>
98 #include <machine/mpconfig.h>
99 #include <machine/mpbiosvar.h>
100 #include <machine/pic.h>
101 #endif
102 
103 #ifdef MPBIOS
104 #include <machine/mpbiosvar.h>
105 #endif
106 
107 #if NACPI > 0
108 #include <machine/mpacpi.h>
109 #endif
110 
111 int
112 pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
113 {
114 	int pin = pa->pa_intrpin;
115 	int line = pa->pa_intrline;
116 #if NIOAPIC > 0 || NACPI > 0
117 	int rawpin = pa->pa_rawintrpin;
118 	pci_chipset_tag_t pc = pa->pa_pc;
119 	int bus, dev, func;
120 #endif
121 
122 	if (pin == 0) {
123 		/* No IRQ used. */
124 		goto bad;
125 	}
126 
127 	*ihp = 0;
128 
129 	if (pin > PCI_INTERRUPT_PIN_MAX) {
130 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
131 		goto bad;
132 	}
133 
134 #if NIOAPIC > 0 || NACPI > 0
135 	pci_decompose_tag(pc, pa->pa_tag, &bus, &dev, &func);
136 	if (mp_busses != NULL) {
137 		if (intr_find_mpmapping(bus, (dev<<2)|(rawpin-1), ihp) == 0) {
138 			if ((*ihp & 0xff) == 0)
139 				*ihp |= line;
140 			return 0;
141 		}
142 		/*
143 		 * No explicit PCI mapping found. This is not fatal,
144 		 * we'll try the ISA (or possibly EISA) mappings next.
145 		 */
146 	}
147 #endif
148 
149 	/*
150 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
151 	 * `unknown' or `no connection' on a PC.  We assume that a device with
152 	 * `no connection' either doesn't have an interrupt (in which case the
153 	 * pin number should be 0, and would have been noticed above), or
154 	 * wasn't configured by the BIOS (in which case we punt, since there's
155 	 * no real way we can know how the interrupt lines are mapped in the
156 	 * hardware).
157 	 *
158 	 * XXX
159 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
160 	 * that the BIOS did its job, we also recognize that as meaning that
161 	 * the BIOS has not configured the device.
162 	 */
163 	if (line == 0 || line == X86_PCI_INTERRUPT_LINE_NO_CONNECTION) {
164 		printf("pci_intr_map: no mapping for pin %c (line=%02x)\n",
165 		       '@' + pin, line);
166 		goto bad;
167 	} else {
168 		if (line >= NUM_LEGACY_IRQS) {
169 			printf("pci_intr_map: bad interrupt line %d\n", line);
170 			goto bad;
171 		}
172 		if (line == 2) {
173 			printf("pci_intr_map: changed line 2 to line 9\n");
174 			line = 9;
175 		}
176 	}
177 #if NIOAPIC > 0 || NACPI > 0
178 	if (mp_busses != NULL) {
179 		if (intr_find_mpmapping(mp_isa_bus, line, ihp) == 0) {
180 			if ((*ihp & 0xff) == 0)
181 				*ihp |= line;
182 			return 0;
183 		}
184 #if NEISA > 0
185 		if (intr_find_mpmapping(mp_eisa_bus, line, ihp) == 0) {
186 			if ((*ihp & 0xff) == 0)
187 				*ihp |= line;
188 			return 0;
189 		}
190 #endif
191 		printf("pci_intr_map: bus %d dev %d func %d pin %d; line %d\n",
192 		    bus, dev, func, pin, line);
193 		printf("pci_intr_map: no MP mapping found\n");
194 	}
195 #endif
196 
197 	*ihp = line;
198 	return 0;
199 
200 bad:
201 	*ihp = -1;
202 	return 1;
203 }
204 
205 const char *
206 pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
207 {
208 	return intr_string(ih);
209 }
210 
211 
212 const struct evcnt *
213 pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
214 {
215 
216 	/* XXX for now, no evcnt parent reported */
217 	return NULL;
218 }
219 
220 void *
221 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih,
222     int level, int (*func)(void *), void *arg)
223 {
224 	int pin, irq;
225 	struct pic *pic;
226 
227 	pic = &i8259_pic;
228 	pin = irq = ih;
229 
230 #if NIOAPIC > 0
231 	if (ih & APIC_INT_VIA_APIC) {
232 		pic = (struct pic *)ioapic_find(APIC_IRQ_APIC(ih));
233 		if (pic == NULL) {
234 			printf("pci_intr_establish: bad ioapic %d\n",
235 			    APIC_IRQ_APIC(ih));
236 			return NULL;
237 		}
238 		pin = APIC_IRQ_PIN(ih);
239 		irq = APIC_IRQ_LEGACY_IRQ(ih);
240 		if (irq < 0 || irq >= NUM_LEGACY_IRQS)
241 			irq = -1;
242 	}
243 #endif
244 
245 	return intr_establish(irq, pic, pin, IST_LEVEL, level, func, arg);
246 }
247 
248 void
249 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
250 {
251 
252 	intr_disestablish(cookie);
253 }
254