1*a355028fSad /* $NetBSD: pmap_private.h,v 1.5 2023/10/04 20:28:06 ad Exp $ */
28f18579dSriastradh
38f18579dSriastradh /*
48f18579dSriastradh * Copyright (c) 1997 Charles D. Cranor and Washington University.
58f18579dSriastradh * All rights reserved.
68f18579dSriastradh *
78f18579dSriastradh * Redistribution and use in source and binary forms, with or without
88f18579dSriastradh * modification, are permitted provided that the following conditions
98f18579dSriastradh * are met:
108f18579dSriastradh * 1. Redistributions of source code must retain the above copyright
118f18579dSriastradh * notice, this list of conditions and the following disclaimer.
128f18579dSriastradh * 2. Redistributions in binary form must reproduce the above copyright
138f18579dSriastradh * notice, this list of conditions and the following disclaimer in the
148f18579dSriastradh * documentation and/or other materials provided with the distribution.
158f18579dSriastradh *
168f18579dSriastradh * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178f18579dSriastradh * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188f18579dSriastradh * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198f18579dSriastradh * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208f18579dSriastradh * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
218f18579dSriastradh * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
228f18579dSriastradh * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
238f18579dSriastradh * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
248f18579dSriastradh * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
258f18579dSriastradh * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
268f18579dSriastradh */
278f18579dSriastradh
288f18579dSriastradh /*
298f18579dSriastradh * Copyright (c) 2001 Wasabi Systems, Inc.
308f18579dSriastradh * All rights reserved.
318f18579dSriastradh *
328f18579dSriastradh * Written by Frank van der Linden for Wasabi Systems, Inc.
338f18579dSriastradh *
348f18579dSriastradh * Redistribution and use in source and binary forms, with or without
358f18579dSriastradh * modification, are permitted provided that the following conditions
368f18579dSriastradh * are met:
378f18579dSriastradh * 1. Redistributions of source code must retain the above copyright
388f18579dSriastradh * notice, this list of conditions and the following disclaimer.
398f18579dSriastradh * 2. Redistributions in binary form must reproduce the above copyright
408f18579dSriastradh * notice, this list of conditions and the following disclaimer in the
418f18579dSriastradh * documentation and/or other materials provided with the distribution.
428f18579dSriastradh * 3. All advertising materials mentioning features or use of this software
438f18579dSriastradh * must display the following acknowledgement:
448f18579dSriastradh * This product includes software developed for the NetBSD Project by
458f18579dSriastradh * Wasabi Systems, Inc.
468f18579dSriastradh * 4. The name of Wasabi Systems, Inc. may not be used to endorse
478f18579dSriastradh * or promote products derived from this software without specific prior
488f18579dSriastradh * written permission.
498f18579dSriastradh *
508f18579dSriastradh * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
518f18579dSriastradh * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
528f18579dSriastradh * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
538f18579dSriastradh * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
548f18579dSriastradh * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
558f18579dSriastradh * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
568f18579dSriastradh * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
578f18579dSriastradh * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
588f18579dSriastradh * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
598f18579dSriastradh * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
608f18579dSriastradh * POSSIBILITY OF SUCH DAMAGE.
618f18579dSriastradh */
628f18579dSriastradh
638f18579dSriastradh #ifndef _X86_PMAP_PRIVATE_H_
648f18579dSriastradh #define _X86_PMAP_PRIVATE_H_
658f18579dSriastradh
668f18579dSriastradh #ifndef _MACHINE_PMAP_PRIVATE_H_X86
678f18579dSriastradh #error Include machine/pmap_private.h, not x86/pmap_private.h.
688f18579dSriastradh #endif
698f18579dSriastradh
708f18579dSriastradh #ifdef _KERNEL_OPT
718f18579dSriastradh #include "opt_svs.h"
728f18579dSriastradh #endif
738f18579dSriastradh
748f18579dSriastradh #include <sys/param.h>
758f18579dSriastradh #include <sys/types.h>
768f18579dSriastradh
7755d48114Sriastradh #include <sys/kcpuset.h>
788f18579dSriastradh #include <sys/mutex.h>
798f18579dSriastradh #include <sys/pool.h>
808f18579dSriastradh #include <sys/queue.h>
8155d48114Sriastradh #include <sys/rwlock.h>
828f18579dSriastradh
83125daff4Sriastradh #include <machine/cpufunc.h>
848f18579dSriastradh #include <machine/pte.h>
858f18579dSriastradh #include <machine/vmparam.h>
868f18579dSriastradh
8755d48114Sriastradh #include <uvm/uvm_object.h>
888f18579dSriastradh #include <uvm/uvm_pmap.h>
898f18579dSriastradh
908f18579dSriastradh struct pmap;
918f18579dSriastradh
928f18579dSriastradh #define SLAREA_USER 0
938f18579dSriastradh #define SLAREA_PTE 1
948f18579dSriastradh #define SLAREA_MAIN 2
958f18579dSriastradh #define SLAREA_PCPU 3
968f18579dSriastradh #define SLAREA_DMAP 4
978f18579dSriastradh #define SLAREA_HYPV 5
988f18579dSriastradh #define SLAREA_ASAN 6
998f18579dSriastradh #define SLAREA_MSAN 7
1008f18579dSriastradh #define SLAREA_KERN 8
1018f18579dSriastradh #define SLSPACE_NAREAS 9
1028f18579dSriastradh
1038f18579dSriastradh struct slotspace {
1048f18579dSriastradh struct {
1058f18579dSriastradh size_t sslot; /* start slot */
1068f18579dSriastradh size_t nslot; /* # of slots */
1078f18579dSriastradh bool active; /* area is active */
1088f18579dSriastradh } area[SLSPACE_NAREAS];
1098f18579dSriastradh };
1108f18579dSriastradh
1118f18579dSriastradh extern struct slotspace slotspace;
1128f18579dSriastradh
1138f18579dSriastradh #include <x86/gdt.h>
1148f18579dSriastradh
1158f18579dSriastradh struct pcpu_entry {
1168f18579dSriastradh uint8_t gdt[MAXGDTSIZ];
1178f18579dSriastradh uint8_t ldt[MAX_USERLDT_SIZE];
1188f18579dSriastradh uint8_t idt[PAGE_SIZE];
1198f18579dSriastradh uint8_t tss[PAGE_SIZE];
1208f18579dSriastradh uint8_t ist0[PAGE_SIZE];
1218f18579dSriastradh uint8_t ist1[PAGE_SIZE];
1228f18579dSriastradh uint8_t ist2[PAGE_SIZE];
1238f18579dSriastradh uint8_t ist3[PAGE_SIZE];
1248f18579dSriastradh uint8_t rsp0[2 * PAGE_SIZE];
1258f18579dSriastradh } __packed;
1268f18579dSriastradh
1278f18579dSriastradh struct pcpu_area {
1288f18579dSriastradh #ifdef SVS
1298f18579dSriastradh uint8_t utls[PAGE_SIZE];
1308f18579dSriastradh #endif
1318f18579dSriastradh uint8_t ldt[PAGE_SIZE];
1328f18579dSriastradh struct pcpu_entry ent[MAXCPUS];
1338f18579dSriastradh } __packed;
1348f18579dSriastradh
1358f18579dSriastradh extern struct pcpu_area *pcpuarea;
1368f18579dSriastradh
1378f18579dSriastradh #define PMAP_PCID_KERN 0
1388f18579dSriastradh #define PMAP_PCID_USER 1
1398f18579dSriastradh
1408f18579dSriastradh /*
1418f18579dSriastradh * pmap data structures: see pmap.c for details of locking.
1428f18579dSriastradh */
1438f18579dSriastradh
1448f18579dSriastradh /*
1458f18579dSriastradh * we maintain a list of all non-kernel pmaps
1468f18579dSriastradh */
1478f18579dSriastradh
1488f18579dSriastradh LIST_HEAD(pmap_head, pmap); /* struct pmap_head: head of a pmap list */
1498f18579dSriastradh
1508f18579dSriastradh /*
1518f18579dSriastradh * linked list of all non-kernel pmaps
1528f18579dSriastradh */
1538f18579dSriastradh extern struct pmap_head pmaps;
1548f18579dSriastradh extern kmutex_t pmaps_lock; /* protects pmaps */
1558f18579dSriastradh
1568f18579dSriastradh /*
1578f18579dSriastradh * pool_cache(9) that pmaps are allocated from
1588f18579dSriastradh */
1598f18579dSriastradh extern struct pool_cache pmap_cache;
1608f18579dSriastradh
16155d48114Sriastradh /*
16255d48114Sriastradh * the pmap structure
16355d48114Sriastradh *
16455d48114Sriastradh * note that the pm_obj contains the lock pointer, the reference count,
16555d48114Sriastradh * page list, and number of PTPs within the pmap.
16655d48114Sriastradh *
16755d48114Sriastradh * pm_lock is the same as the lock for vm object 0. Changes to
16855d48114Sriastradh * the other objects may only be made if that lock has been taken
16955d48114Sriastradh * (the other object locks are only used when uvm_pagealloc is called)
17055d48114Sriastradh */
17155d48114Sriastradh
17255d48114Sriastradh struct pv_page;
17355d48114Sriastradh
17455d48114Sriastradh struct pmap {
17555d48114Sriastradh struct uvm_object pm_obj[PTP_LEVELS-1];/* objects for lvl >= 1) */
17655d48114Sriastradh LIST_ENTRY(pmap) pm_list; /* list of all pmaps */
17755d48114Sriastradh pd_entry_t *pm_pdir; /* VA of PD */
17855d48114Sriastradh paddr_t pm_pdirpa[PDP_SIZE]; /* PA of PDs (read-only after create) */
17955d48114Sriastradh struct vm_page *pm_ptphint[PTP_LEVELS-1];
18055d48114Sriastradh /* pointer to a PTP in our pmap */
18155d48114Sriastradh struct pmap_statistics pm_stats; /* pmap stats */
18255d48114Sriastradh struct pv_entry *pm_pve; /* spare pv_entry */
18355d48114Sriastradh LIST_HEAD(, pv_page) pm_pvp_part;
18455d48114Sriastradh LIST_HEAD(, pv_page) pm_pvp_empty;
18555d48114Sriastradh LIST_HEAD(, pv_page) pm_pvp_full;
18655d48114Sriastradh
18755d48114Sriastradh #if !defined(__x86_64__)
18855d48114Sriastradh vaddr_t pm_hiexec; /* highest executable mapping */
18955d48114Sriastradh #endif /* !defined(__x86_64__) */
19055d48114Sriastradh
19155d48114Sriastradh union descriptor *pm_ldt; /* user-set LDT */
19255d48114Sriastradh size_t pm_ldt_len; /* XXX unused, remove */
19355d48114Sriastradh int pm_ldt_sel; /* LDT selector */
19455d48114Sriastradh
19555d48114Sriastradh kcpuset_t *pm_cpus; /* mask of CPUs using pmap */
19655d48114Sriastradh kcpuset_t *pm_kernel_cpus; /* mask of CPUs using kernel part
19755d48114Sriastradh of pmap */
19855d48114Sriastradh kcpuset_t *pm_xen_ptp_cpus; /* mask of CPUs which have this pmap's
19955d48114Sriastradh ptp mapped */
200*a355028fSad long pm_pctr; /* for assertions */
20155d48114Sriastradh LIST_HEAD(,vm_page) pm_gc_ptp; /* PTPs queued for free */
20255d48114Sriastradh
20355d48114Sriastradh /* Used by NVMM and Xen */
20455d48114Sriastradh int (*pm_enter)(struct pmap *, vaddr_t, paddr_t, vm_prot_t, u_int);
20555d48114Sriastradh bool (*pm_extract)(struct pmap *, vaddr_t, paddr_t *);
20655d48114Sriastradh void (*pm_remove)(struct pmap *, vaddr_t, vaddr_t);
20755d48114Sriastradh int (*pm_sync_pv)(struct vm_page *, vaddr_t, paddr_t, int, uint8_t *,
20855d48114Sriastradh pt_entry_t *);
20955d48114Sriastradh void (*pm_pp_remove_ent)(struct pmap *, struct vm_page *, pt_entry_t,
21055d48114Sriastradh vaddr_t);
21155d48114Sriastradh void (*pm_write_protect)(struct pmap *, vaddr_t, vaddr_t, vm_prot_t);
21255d48114Sriastradh void (*pm_unwire)(struct pmap *, vaddr_t);
21355d48114Sriastradh
21455d48114Sriastradh void (*pm_tlb_flush)(struct pmap *);
21555d48114Sriastradh void *pm_data;
21655d48114Sriastradh
21755d48114Sriastradh kmutex_t pm_lock /* locks for pm_objs */
21855d48114Sriastradh __aligned(64); /* give lock own cache line */
21955d48114Sriastradh krwlock_t pm_dummy_lock; /* ugly hack for abusing uvm_object */
22055d48114Sriastradh };
22155d48114Sriastradh
2228f18579dSriastradh /* macro to access pm_pdirpa slots */
2238f18579dSriastradh #ifdef PAE
2248f18579dSriastradh #define pmap_pdirpa(pmap, index) \
2258f18579dSriastradh ((pmap)->pm_pdirpa[l2tol3(index)] + l2tol2(index) * sizeof(pd_entry_t))
2268f18579dSriastradh #else
2278f18579dSriastradh #define pmap_pdirpa(pmap, index) \
2288f18579dSriastradh ((pmap)->pm_pdirpa[0] + (index) * sizeof(pd_entry_t))
2298f18579dSriastradh #endif
2308f18579dSriastradh
2318f18579dSriastradh /*
2328f18579dSriastradh * global kernel variables
2338f18579dSriastradh */
2348f18579dSriastradh
2358f18579dSriastradh /*
2368f18579dSriastradh * PDPpaddr is the physical address of the kernel's PDP.
2378f18579dSriastradh * - i386 non-PAE and amd64: PDPpaddr corresponds directly to the %cr3
2388f18579dSriastradh * value associated to the kernel process, proc0.
2398f18579dSriastradh * - i386 PAE: it still represents the PA of the kernel's PDP (L2). Due to
2408f18579dSriastradh * the L3 PD, it cannot be considered as the equivalent of a %cr3 any more.
2418f18579dSriastradh * - Xen: it corresponds to the PFN of the kernel's PDP.
2428f18579dSriastradh */
2438f18579dSriastradh extern u_long PDPpaddr;
2448f18579dSriastradh
2458f18579dSriastradh extern pd_entry_t pmap_pg_g; /* do we support PTE_G? */
2468f18579dSriastradh extern pd_entry_t pmap_pg_nx; /* do we support PTE_NX? */
2478f18579dSriastradh extern int pmap_largepages;
2488f18579dSriastradh extern long nkptp[PTP_LEVELS];
2498f18579dSriastradh
2508f18579dSriastradh #define pmap_valid_entry(E) ((E) & PTE_P) /* is PDE or PTE valid? */
2518f18579dSriastradh
2528f18579dSriastradh void pmap_map_ptes(struct pmap *, struct pmap **, pd_entry_t **,
2538f18579dSriastradh pd_entry_t * const **);
2548f18579dSriastradh void pmap_unmap_ptes(struct pmap *, struct pmap *);
2558f18579dSriastradh
2568f18579dSriastradh bool pmap_pdes_valid(vaddr_t, pd_entry_t * const *, pd_entry_t *,
2578f18579dSriastradh int *lastlvl);
2588f18579dSriastradh
2598f18579dSriastradh bool pmap_is_curpmap(struct pmap *);
2608f18579dSriastradh
2618f18579dSriastradh void pmap_ept_transform(struct pmap *);
2628f18579dSriastradh
2638f18579dSriastradh #ifndef __HAVE_DIRECT_MAP
2648f18579dSriastradh void pmap_vpage_cpu_init(struct cpu_info *);
2658f18579dSriastradh #endif
2668f18579dSriastradh vaddr_t slotspace_rand(int, size_t, size_t, size_t, vaddr_t);
2678f18579dSriastradh
2688f18579dSriastradh vaddr_t reserve_dumppages(vaddr_t); /* XXX: not a pmap fn */
2698f18579dSriastradh
2708f18579dSriastradh typedef enum tlbwhy {
2718f18579dSriastradh TLBSHOOT_REMOVE_ALL,
2728f18579dSriastradh TLBSHOOT_KENTER,
2738f18579dSriastradh TLBSHOOT_KREMOVE,
2748f18579dSriastradh TLBSHOOT_FREE_PTP,
2758f18579dSriastradh TLBSHOOT_REMOVE_PTE,
2768f18579dSriastradh TLBSHOOT_SYNC_PV,
2778f18579dSriastradh TLBSHOOT_WRITE_PROTECT,
2788f18579dSriastradh TLBSHOOT_ENTER,
2798f18579dSriastradh TLBSHOOT_NVMM,
2808f18579dSriastradh TLBSHOOT_BUS_DMA,
2818f18579dSriastradh TLBSHOOT_BUS_SPACE,
2828f18579dSriastradh TLBSHOOT__MAX,
2838f18579dSriastradh } tlbwhy_t;
2848f18579dSriastradh
2858f18579dSriastradh void pmap_tlb_init(void);
2868f18579dSriastradh void pmap_tlb_cpu_init(struct cpu_info *);
2878f18579dSriastradh void pmap_tlb_shootdown(pmap_t, vaddr_t, pt_entry_t, tlbwhy_t);
2888f18579dSriastradh void pmap_tlb_shootnow(void);
2898f18579dSriastradh void pmap_tlb_intr(void);
2908f18579dSriastradh
2918f18579dSriastradh /*
2928f18579dSriastradh * inline functions
2938f18579dSriastradh */
2948f18579dSriastradh
2958f18579dSriastradh /*
2968f18579dSriastradh * pmap_update_pg: flush one page from the TLB (or flush the whole thing
2978f18579dSriastradh * if hardware doesn't support one-page flushing)
2988f18579dSriastradh */
2998f18579dSriastradh
3008f18579dSriastradh __inline static void __unused
pmap_update_pg(vaddr_t va)3018f18579dSriastradh pmap_update_pg(vaddr_t va)
3028f18579dSriastradh {
3038f18579dSriastradh invlpg(va);
3048f18579dSriastradh }
3058f18579dSriastradh
3068f18579dSriastradh /*
3078f18579dSriastradh * various address inlines
3088f18579dSriastradh *
3098f18579dSriastradh * vtopte: return a pointer to the PTE mapping a VA, works only for
3108f18579dSriastradh * user and PT addresses
3118f18579dSriastradh *
3128f18579dSriastradh * kvtopte: return a pointer to the PTE mapping a kernel VA
3138f18579dSriastradh */
3148f18579dSriastradh
3158f18579dSriastradh #include <lib/libkern/libkern.h>
3168f18579dSriastradh
3178f18579dSriastradh static __inline pt_entry_t * __unused
vtopte(vaddr_t va)3188f18579dSriastradh vtopte(vaddr_t va)
3198f18579dSriastradh {
3208f18579dSriastradh
3218f18579dSriastradh KASSERT(va < VM_MIN_KERNEL_ADDRESS);
3228f18579dSriastradh
3238f18579dSriastradh return (PTE_BASE + pl1_i(va));
3248f18579dSriastradh }
3258f18579dSriastradh
3268f18579dSriastradh static __inline pt_entry_t * __unused
kvtopte(vaddr_t va)3278f18579dSriastradh kvtopte(vaddr_t va)
3288f18579dSriastradh {
3298f18579dSriastradh pd_entry_t *pde;
3308f18579dSriastradh
3318f18579dSriastradh KASSERT(va >= VM_MIN_KERNEL_ADDRESS);
3328f18579dSriastradh
3338f18579dSriastradh pde = L2_BASE + pl2_i(va);
3348f18579dSriastradh if (*pde & PTE_PS)
3358f18579dSriastradh return ((pt_entry_t *)pde);
3368f18579dSriastradh
3378f18579dSriastradh return (PTE_BASE + pl1_i(va));
3388f18579dSriastradh }
3398f18579dSriastradh
3408f18579dSriastradh #ifdef XENPV
3418f18579dSriastradh #include <sys/bitops.h>
3428f18579dSriastradh
3438f18579dSriastradh #define XPTE_MASK L1_FRAME
3448f18579dSriastradh /* Selects the index of a PTE in (A)PTE_BASE */
3458f18579dSriastradh #define XPTE_SHIFT (L1_SHIFT - ilog2(sizeof(pt_entry_t)))
3468f18579dSriastradh
3478f18579dSriastradh /* PTE access inline functions */
3488f18579dSriastradh
3498f18579dSriastradh /*
3508f18579dSriastradh * Get the machine address of the pointed pte
3518f18579dSriastradh * We use hardware MMU to get value so works only for levels 1-3
3528f18579dSriastradh */
3538f18579dSriastradh
3548f18579dSriastradh static __inline paddr_t
xpmap_ptetomach(pt_entry_t * pte)3558f18579dSriastradh xpmap_ptetomach(pt_entry_t *pte)
3568f18579dSriastradh {
3578f18579dSriastradh pt_entry_t *up_pte;
3588f18579dSriastradh vaddr_t va = (vaddr_t) pte;
3598f18579dSriastradh
3608f18579dSriastradh va = ((va & XPTE_MASK) >> XPTE_SHIFT) | (vaddr_t) PTE_BASE;
3618f18579dSriastradh up_pte = (pt_entry_t *) va;
3628f18579dSriastradh
3638f18579dSriastradh return (paddr_t) (((*up_pte) & PTE_FRAME) + (((vaddr_t) pte) & (~PTE_FRAME & ~VA_SIGN_MASK)));
3648f18579dSriastradh }
3658f18579dSriastradh
3668f18579dSriastradh /* Xen helpers to change bits of a pte */
3678f18579dSriastradh #define XPMAP_UPDATE_DIRECT 1 /* Update direct map entry flags too */
3688f18579dSriastradh
3698f18579dSriastradh paddr_t vtomach(vaddr_t);
3708f18579dSriastradh #define vtomfn(va) (vtomach(va) >> PAGE_SHIFT)
3718f18579dSriastradh #endif /* XENPV */
3728f18579dSriastradh
3738f18579dSriastradh #ifdef __HAVE_PCPU_AREA
3748f18579dSriastradh extern struct pcpu_area *pcpuarea;
3758f18579dSriastradh #define PDIR_SLOT_PCPU 510
3768f18579dSriastradh #define PMAP_PCPU_BASE (VA_SIGN_NEG((PDIR_SLOT_PCPU * NBPD_L4)))
3778f18579dSriastradh #endif
3788f18579dSriastradh
3798f18579dSriastradh void svs_quad_copy(void *, void *, long);
3808f18579dSriastradh
381880fcd92Sriastradh #ifdef _KERNEL_OPT
382880fcd92Sriastradh #include "opt_efi.h"
383880fcd92Sriastradh #endif
384880fcd92Sriastradh
385880fcd92Sriastradh #ifdef EFI_RUNTIME
386880fcd92Sriastradh void * pmap_activate_sync(struct pmap *);
387880fcd92Sriastradh void pmap_deactivate_sync(struct pmap *, void *);
388880fcd92Sriastradh bool pmap_is_user(struct pmap *);
389880fcd92Sriastradh #else
390880fcd92Sriastradh static inline bool
pmap_is_user(struct pmap * pmap)391880fcd92Sriastradh pmap_is_user(struct pmap *pmap)
392880fcd92Sriastradh {
393880fcd92Sriastradh
394880fcd92Sriastradh KASSERT(pmap != pmap_kernel());
395880fcd92Sriastradh return true;
396880fcd92Sriastradh }
397880fcd92Sriastradh #endif
398880fcd92Sriastradh
3998f18579dSriastradh #endif /* _X86_PMAP_PRIVATE_H_ */
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