xref: /netbsd-src/sys/arch/x86/include/i82489var.h (revision 570e015d07e10c77ef013e46fb0cbba9add7824d)
1*570e015dSad /*	$NetBSD: i82489var.h,v 1.21 2020/05/21 21:12:30 ad Exp $	*/
28375b2d9Sfvdl 
38375b2d9Sfvdl /*-
48375b2d9Sfvdl  * Copyright (c) 1998 The NetBSD Foundation, Inc.
58375b2d9Sfvdl  * All rights reserved.
68375b2d9Sfvdl  *
78375b2d9Sfvdl  * This code is derived from software contributed to The NetBSD Foundation
88375b2d9Sfvdl  * by Frank van der Linden.
98375b2d9Sfvdl  *
108375b2d9Sfvdl  * Redistribution and use in source and binary forms, with or without
118375b2d9Sfvdl  * modification, are permitted provided that the following conditions
128375b2d9Sfvdl  * are met:
138375b2d9Sfvdl  * 1. Redistributions of source code must retain the above copyright
148375b2d9Sfvdl  *    notice, this list of conditions and the following disclaimer.
158375b2d9Sfvdl  * 2. Redistributions in binary form must reproduce the above copyright
168375b2d9Sfvdl  *    notice, this list of conditions and the following disclaimer in the
178375b2d9Sfvdl  *    documentation and/or other materials provided with the distribution.
188375b2d9Sfvdl  *
198375b2d9Sfvdl  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
208375b2d9Sfvdl  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
218375b2d9Sfvdl  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
228375b2d9Sfvdl  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
238375b2d9Sfvdl  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
248375b2d9Sfvdl  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
258375b2d9Sfvdl  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
268375b2d9Sfvdl  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
278375b2d9Sfvdl  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
288375b2d9Sfvdl  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
298375b2d9Sfvdl  * POSSIBILITY OF SUCH DAMAGE.
308375b2d9Sfvdl  */
318375b2d9Sfvdl 
3245754679Slukem #ifndef _X86_I82489VAR_H_
3345754679Slukem #define _X86_I82489VAR_H_
348375b2d9Sfvdl 
358375b2d9Sfvdl /*
368375b2d9Sfvdl  * Software definitions belonging to Local APIC driver.
378375b2d9Sfvdl  */
388375b2d9Sfvdl 
398375b2d9Sfvdl #ifdef _KERNEL
40b4878842Smaxv extern volatile vaddr_t local_apic_va;
415c120a76Snonaka extern bool x2apic_mode;
428375b2d9Sfvdl #endif
438375b2d9Sfvdl 
448375b2d9Sfvdl /*
458375b2d9Sfvdl  * "spurious interrupt vector"; vector used by interrupt which was
468375b2d9Sfvdl  * aborted because the CPU masked it after it happened but before it
478375b2d9Sfvdl  * was delivered.. "Oh, sorry, i caught you at a bad time".
488375b2d9Sfvdl  * Low-order 4 bits must be all ones.
498375b2d9Sfvdl  */
508375b2d9Sfvdl extern void Xintrspurious(void);
518375b2d9Sfvdl #define LAPIC_SPURIOUS_VECTOR		0xef
528375b2d9Sfvdl 
538375b2d9Sfvdl /*
54fbb58adaSad  * Vectors used for inter-processor interrupts.
558375b2d9Sfvdl  */
568375b2d9Sfvdl extern void Xintr_lapic_ipi(void);
575c120a76Snonaka extern void Xintr_x2apic_ipi(void);
588375b2d9Sfvdl extern void Xrecurse_lapic_ipi(void);
598375b2d9Sfvdl extern void Xresume_lapic_ipi(void);
608375b2d9Sfvdl #define LAPIC_IPI_VECTOR			0xe0
618375b2d9Sfvdl 
62e225b7bdSrmind extern void Xintr_lapic_tlb(void);
635c120a76Snonaka extern void Xintr_x2apic_tlb(void);
64e225b7bdSrmind #define LAPIC_TLB_VECTOR			0xe1
65fbb58adaSad 
668375b2d9Sfvdl /*
678375b2d9Sfvdl  * Vector used for local apic timer interrupts.
688375b2d9Sfvdl  */
698375b2d9Sfvdl 
708375b2d9Sfvdl extern void Xintr_lapic_ltimer(void);
715c120a76Snonaka extern void Xintr_x2apic_ltimer(void);
728375b2d9Sfvdl extern void Xresume_lapic_ltimer(void);
738375b2d9Sfvdl extern void Xrecurse_lapic_ltimer(void);
748375b2d9Sfvdl #define LAPIC_TIMER_VECTOR		0xc0
758375b2d9Sfvdl 
768375b2d9Sfvdl /*
778375b2d9Sfvdl  * 'pin numbers' for local APIC
788375b2d9Sfvdl  */
798375b2d9Sfvdl #define LAPIC_PIN_TIMER		0
808375b2d9Sfvdl #define LAPIC_PIN_PCINT		2
818375b2d9Sfvdl #define LAPIC_PIN_LVINT0	3
828375b2d9Sfvdl #define LAPIC_PIN_LVINT1	4
838375b2d9Sfvdl #define LAPIC_PIN_LVERR		5
848375b2d9Sfvdl 
858375b2d9Sfvdl 
868375b2d9Sfvdl struct cpu_info;
878375b2d9Sfvdl 
888f1ba949Sjunyoung extern void lapic_boot_init(paddr_t);
898f1ba949Sjunyoung extern void lapic_set_lvt(void);
908f1ba949Sjunyoung extern void lapic_enable(void);
91*570e015dSad extern void lapic_calibrate_timer(bool);
92*570e015dSad extern void lapic_reset(void);
938375b2d9Sfvdl 
945c120a76Snonaka extern uint32_t lapic_readreg(u_int);
955c120a76Snonaka extern void lapic_writereg(u_int, uint32_t);
96d7fe81ccSnonaka extern void lapic_write_tpri(uint32_t);
975c120a76Snonaka extern uint32_t lapic_cpu_number(void);
985c120a76Snonaka extern bool lapic_is_x2apic(void);
99d7fe81ccSnonaka 
1008375b2d9Sfvdl #endif
101