1*b619d660Srmind /* $NetBSD: cpu_msr.h,v 1.7 2009/10/05 23:59:31 rmind Exp $ */
232b71856Sxtraeme
332b71856Sxtraeme /*-
48b2678bdSxtraeme * Copyright (c) 2007 Juan Romero Pardines.
532b71856Sxtraeme * All rights reserved.
632b71856Sxtraeme *
732b71856Sxtraeme * Redistribution and use in source and binary forms, with or without
832b71856Sxtraeme * modification, are permitted provided that the following conditions
932b71856Sxtraeme * are met:
1032b71856Sxtraeme * 1. Redistributions of source code must retain the above copyright
1132b71856Sxtraeme * notice, this list of conditions and the following disclaimer.
1232b71856Sxtraeme * 2. Redistributions in binary form must reproduce the above copyright
1332b71856Sxtraeme * notice, this list of conditions and the following disclaimer in the
1432b71856Sxtraeme * documentation and/or other materials provided with the distribution.
1532b71856Sxtraeme *
168b2678bdSxtraeme * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
178b2678bdSxtraeme * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
188b2678bdSxtraeme * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
198b2678bdSxtraeme * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
208b2678bdSxtraeme * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
218b2678bdSxtraeme * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
228b2678bdSxtraeme * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
238b2678bdSxtraeme * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
248b2678bdSxtraeme * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
258b2678bdSxtraeme * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2632b71856Sxtraeme */
2732b71856Sxtraeme
2832b71856Sxtraeme #ifndef _X86_CPU_MSR_H
2932b71856Sxtraeme #define _X86_CPU_MSR_H
3032b71856Sxtraeme
3132b71856Sxtraeme #include <sys/param.h>
32*b619d660Srmind #include <sys/types.h>
3332b71856Sxtraeme
3432b71856Sxtraeme #ifdef _KERNEL
3532b71856Sxtraeme
36*b619d660Srmind struct msr_rw_info {
378cd29f0eSxtraeme int msr_read;
3832b71856Sxtraeme int msr_type;
3932b71856Sxtraeme uint64_t msr_value;
4032b71856Sxtraeme uint64_t msr_mask;
4132b71856Sxtraeme };
4232b71856Sxtraeme
43*b619d660Srmind static inline void
x86_msr_xcall(void * arg1,void * arg2)44*b619d660Srmind x86_msr_xcall(void *arg1, void *arg2)
45*b619d660Srmind {
46*b619d660Srmind struct msr_rw_info *msrdat = arg1;
47*b619d660Srmind uint64_t msr = 0;
48*b619d660Srmind
49*b619d660Srmind KASSERT(msrdat->msr_type != 0);
50*b619d660Srmind
51*b619d660Srmind /* Read the MSR requested and apply the mask if defined. */
52*b619d660Srmind if (msrdat->msr_read) {
53*b619d660Srmind msr = rdmsr(msrdat->msr_type);
54*b619d660Srmind if (msrdat->msr_mask) {
55*b619d660Srmind msr &= ~msrdat->msr_mask;
56*b619d660Srmind }
57*b619d660Srmind }
58*b619d660Srmind /* Assign (or extract, on read) the value and perform the write. */
59*b619d660Srmind msr |= msrdat->msr_value;
60*b619d660Srmind wrmsr(msrdat->msr_type, msr);
61*b619d660Srmind }
6232b71856Sxtraeme
6332b71856Sxtraeme #endif /* ! _KERNEL */
6432b71856Sxtraeme #endif /* ! _X86_CPU_MSR_H */
65