1*f83db12cSthorpej /* $NetBSD: bus_dma.h,v 1.1 2024/01/02 07:41:00 thorpej Exp $ */ 2*f83db12cSthorpej 3*f83db12cSthorpej /*- 4*f83db12cSthorpej * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. 5*f83db12cSthorpej * All rights reserved. 6*f83db12cSthorpej * 7*f83db12cSthorpej * This code is derived from software contributed to The NetBSD Foundation 8*f83db12cSthorpej * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9*f83db12cSthorpej * NASA Ames Research Center. 10*f83db12cSthorpej * 11*f83db12cSthorpej * Redistribution and use in source and binary forms, with or without 12*f83db12cSthorpej * modification, are permitted provided that the following conditions 13*f83db12cSthorpej * are met: 14*f83db12cSthorpej * 1. Redistributions of source code must retain the above copyright 15*f83db12cSthorpej * notice, this list of conditions and the following disclaimer. 16*f83db12cSthorpej * 2. Redistributions in binary form must reproduce the above copyright 17*f83db12cSthorpej * notice, this list of conditions and the following disclaimer in the 18*f83db12cSthorpej * documentation and/or other materials provided with the distribution. 19*f83db12cSthorpej * 20*f83db12cSthorpej * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21*f83db12cSthorpej * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22*f83db12cSthorpej * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23*f83db12cSthorpej * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24*f83db12cSthorpej * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25*f83db12cSthorpej * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26*f83db12cSthorpej * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27*f83db12cSthorpej * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28*f83db12cSthorpej * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29*f83db12cSthorpej * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30*f83db12cSthorpej * POSSIBILITY OF SUCH DAMAGE. 31*f83db12cSthorpej */ 32*f83db12cSthorpej 33*f83db12cSthorpej /* 34*f83db12cSthorpej * Copyright (c) 1996 Carnegie-Mellon University. 35*f83db12cSthorpej * All rights reserved. 36*f83db12cSthorpej * 37*f83db12cSthorpej * Author: Chris G. Demetriou 38*f83db12cSthorpej * 39*f83db12cSthorpej * Permission to use, copy, modify and distribute this software and 40*f83db12cSthorpej * its documentation is hereby granted, provided that both the copyright 41*f83db12cSthorpej * notice and this permission notice appear in all copies of the 42*f83db12cSthorpej * software, derivative works or modified versions, and any portions 43*f83db12cSthorpej * thereof, and that both notices appear in supporting documentation. 44*f83db12cSthorpej * 45*f83db12cSthorpej * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46*f83db12cSthorpej * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47*f83db12cSthorpej * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48*f83db12cSthorpej * 49*f83db12cSthorpej * Carnegie Mellon requests users of this software to return to 50*f83db12cSthorpej * 51*f83db12cSthorpej * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 52*f83db12cSthorpej * School of Computer Science 53*f83db12cSthorpej * Carnegie Mellon University 54*f83db12cSthorpej * Pittsburgh PA 15213-3890 55*f83db12cSthorpej * 56*f83db12cSthorpej * any improvements or extensions that they make and grant Carnegie the 57*f83db12cSthorpej * rights to redistribute these changes. 58*f83db12cSthorpej */ 59*f83db12cSthorpej 60*f83db12cSthorpej #ifndef _VIRT68K_BUS_DMA_H_ 61*f83db12cSthorpej #define _VIRT68K_BUS_DMA_H_ 62*f83db12cSthorpej 63*f83db12cSthorpej /* 64*f83db12cSthorpej * Bus DMA methods. 65*f83db12cSthorpej */ 66*f83db12cSthorpej 67*f83db12cSthorpej /* 68*f83db12cSthorpej * Flags used in various bus DMA methods. 69*f83db12cSthorpej */ 70*f83db12cSthorpej #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 71*f83db12cSthorpej #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 72*f83db12cSthorpej #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 73*f83db12cSthorpej #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 74*f83db12cSthorpej #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 75*f83db12cSthorpej #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 76*f83db12cSthorpej #define BUS_DMA_BUS2 0x020 77*f83db12cSthorpej #define BUS_DMA_BUS3 0x040 78*f83db12cSthorpej #define BUS_DMA_BUS4 0x080 79*f83db12cSthorpej #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 80*f83db12cSthorpej #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 81*f83db12cSthorpej #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 82*f83db12cSthorpej 83*f83db12cSthorpej /* 84*f83db12cSthorpej * Flags to constrain the physical memory allocated for DMA 85*f83db12cSthorpej */ 86*f83db12cSthorpej #define BUS_DMA_ONBOARD_RAM BUS_DMA_BUS1 87*f83db12cSthorpej #define BUS_DMA_24BIT BUS_DMA_BUS2 88*f83db12cSthorpej 89*f83db12cSthorpej /* Forwards needed by prototypes below. */ 90*f83db12cSthorpej struct mbuf; 91*f83db12cSthorpej struct uio; 92*f83db12cSthorpej 93*f83db12cSthorpej /* 94*f83db12cSthorpej * Operations performed by bus_dmamap_sync(). 95*f83db12cSthorpej */ 96*f83db12cSthorpej #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 97*f83db12cSthorpej #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 98*f83db12cSthorpej #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 99*f83db12cSthorpej #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 100*f83db12cSthorpej 101*f83db12cSthorpej typedef struct virt68k_bus_dma_tag *bus_dma_tag_t; 102*f83db12cSthorpej typedef struct virt68k_bus_dmamap *bus_dmamap_t; 103*f83db12cSthorpej 104*f83db12cSthorpej /* 105*f83db12cSthorpej * bus_dma_segment_t 106*f83db12cSthorpej * 107*f83db12cSthorpej * Describes a single contiguous DMA transaction. Values 108*f83db12cSthorpej * are suitable for programming into DMA registers. 109*f83db12cSthorpej */ 110*f83db12cSthorpej struct virt68k_bus_dma_segment { 111*f83db12cSthorpej bus_addr_t ds_addr; /* DMA address */ 112*f83db12cSthorpej bus_size_t ds_len; /* length of transfer */ 113*f83db12cSthorpej 114*f83db12cSthorpej /* PRIVATE */ 115*f83db12cSthorpej bus_addr_t _ds_cpuaddr; /* CPU-relative phys addr of segment */ 116*f83db12cSthorpej int _ds_flags; 117*f83db12cSthorpej }; 118*f83db12cSthorpej typedef struct virt68k_bus_dma_segment bus_dma_segment_t; 119*f83db12cSthorpej 120*f83db12cSthorpej /* 121*f83db12cSthorpej * bus_dma_tag_t 122*f83db12cSthorpej * 123*f83db12cSthorpej * A machine-dependent opaque type describing the implementation of 124*f83db12cSthorpej * DMA for a given bus. 125*f83db12cSthorpej */ 126*f83db12cSthorpej struct virt68k_bus_dma_tag { 127*f83db12cSthorpej void *_cookie; /* cookie used in the guts */ 128*f83db12cSthorpej 129*f83db12cSthorpej /* 130*f83db12cSthorpej * DMA mapping methods. 131*f83db12cSthorpej */ 132*f83db12cSthorpej int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 133*f83db12cSthorpej bus_size_t, bus_size_t, int, bus_dmamap_t *); 134*f83db12cSthorpej void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 135*f83db12cSthorpej int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 136*f83db12cSthorpej bus_size_t, struct proc *, int); 137*f83db12cSthorpej int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 138*f83db12cSthorpej struct mbuf *, int); 139*f83db12cSthorpej int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 140*f83db12cSthorpej struct uio *, int); 141*f83db12cSthorpej int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 142*f83db12cSthorpej bus_dma_segment_t *, int, bus_size_t, int); 143*f83db12cSthorpej void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 144*f83db12cSthorpej void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 145*f83db12cSthorpej bus_addr_t, bus_size_t, int); 146*f83db12cSthorpej 147*f83db12cSthorpej /* 148*f83db12cSthorpej * DMA memory utility functions. 149*f83db12cSthorpej */ 150*f83db12cSthorpej int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 151*f83db12cSthorpej bus_size_t, bus_dma_segment_t *, int, int *, int); 152*f83db12cSthorpej void (*_dmamem_free)(bus_dma_tag_t, 153*f83db12cSthorpej bus_dma_segment_t *, int); 154*f83db12cSthorpej int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 155*f83db12cSthorpej int, size_t, void **, int); 156*f83db12cSthorpej void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 157*f83db12cSthorpej paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 158*f83db12cSthorpej int, off_t, int, int); 159*f83db12cSthorpej }; 160*f83db12cSthorpej 161*f83db12cSthorpej #define bus_dmamap_create(t, s, n, m, b, f, p) \ 162*f83db12cSthorpej (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 163*f83db12cSthorpej #define bus_dmamap_destroy(t, p) \ 164*f83db12cSthorpej (*(t)->_dmamap_destroy)((t), (p)) 165*f83db12cSthorpej #define bus_dmamap_load(t, m, b, s, p, f) \ 166*f83db12cSthorpej (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 167*f83db12cSthorpej #define bus_dmamap_load_mbuf(t, m, b, f) \ 168*f83db12cSthorpej (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 169*f83db12cSthorpej #define bus_dmamap_load_uio(t, m, u, f) \ 170*f83db12cSthorpej (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 171*f83db12cSthorpej #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 172*f83db12cSthorpej (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 173*f83db12cSthorpej #define bus_dmamap_unload(t, p) \ 174*f83db12cSthorpej (*(t)->_dmamap_unload)((t), (p)) 175*f83db12cSthorpej #define bus_dmamap_sync(t, p, o, l, ops) \ 176*f83db12cSthorpej (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 177*f83db12cSthorpej #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 178*f83db12cSthorpej (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 179*f83db12cSthorpej #define bus_dmamem_free(t, sg, n) \ 180*f83db12cSthorpej (*(t)->_dmamem_free)((t), (sg), (n)) 181*f83db12cSthorpej #define bus_dmamem_map(t, sg, n, s, k, f) \ 182*f83db12cSthorpej (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 183*f83db12cSthorpej #define bus_dmamem_unmap(t, k, s) \ 184*f83db12cSthorpej (*(t)->_dmamem_unmap)((t), (k), (s)) 185*f83db12cSthorpej #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 186*f83db12cSthorpej (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 187*f83db12cSthorpej 188*f83db12cSthorpej /* 189*f83db12cSthorpej * bus_dmamap_t 190*f83db12cSthorpej * 191*f83db12cSthorpej * Describes a DMA mapping. 192*f83db12cSthorpej */ 193*f83db12cSthorpej struct virt68k_bus_dmamap { 194*f83db12cSthorpej /* 195*f83db12cSthorpej * PRIVATE MEMBERS: not for use by machine-independent code. 196*f83db12cSthorpej */ 197*f83db12cSthorpej bus_size_t _dm_size; /* largest DMA transfer mappable */ 198*f83db12cSthorpej int _dm_segcnt; /* number of segs this map can map */ 199*f83db12cSthorpej bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 200*f83db12cSthorpej bus_size_t _dm_boundary; /* don't cross this */ 201*f83db12cSthorpej int _dm_flags; /* misc. flags */ 202*f83db12cSthorpej void *_dm_cookie; /* Bus-specific cookie */ 203*f83db12cSthorpej 204*f83db12cSthorpej /* 205*f83db12cSthorpej * PUBLIC MEMBERS: these are used by machine-independent code. 206*f83db12cSthorpej */ 207*f83db12cSthorpej bus_size_t dm_maxsegsz; /* largest possible segment */ 208*f83db12cSthorpej bus_size_t dm_mapsize; /* size of the mapping */ 209*f83db12cSthorpej int dm_nsegs; /* # valid segments in mapping */ 210*f83db12cSthorpej bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 211*f83db12cSthorpej }; 212*f83db12cSthorpej 213*f83db12cSthorpej #ifdef _VIRT68K_BUS_DMA_PRIVATE 214*f83db12cSthorpej int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 215*f83db12cSthorpej bus_size_t, int, bus_dmamap_t *); 216*f83db12cSthorpej void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 217*f83db12cSthorpej 218*f83db12cSthorpej int _bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t, 219*f83db12cSthorpej void *, bus_size_t, struct proc *, int); 220*f83db12cSthorpej int _bus_dmamap_load_mbuf_direct(bus_dma_tag_t, 221*f83db12cSthorpej bus_dmamap_t, struct mbuf *, int); 222*f83db12cSthorpej int _bus_dmamap_load_uio_direct(bus_dma_tag_t, 223*f83db12cSthorpej bus_dmamap_t, struct uio *, int); 224*f83db12cSthorpej int _bus_dmamap_load_raw_direct(bus_dma_tag_t, 225*f83db12cSthorpej bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 226*f83db12cSthorpej void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 227*f83db12cSthorpej void _bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 228*f83db12cSthorpej bus_size_t, int); 229*f83db12cSthorpej void _bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 230*f83db12cSthorpej bus_size_t, int); 231*f83db12cSthorpej int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 232*f83db12cSthorpej bus_size_t alignment, bus_size_t boundary, 233*f83db12cSthorpej bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 234*f83db12cSthorpej void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 235*f83db12cSthorpej int nsegs); 236*f83db12cSthorpej int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 237*f83db12cSthorpej int nsegs, size_t size, void **kvap, int flags); 238*f83db12cSthorpej void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 239*f83db12cSthorpej paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 240*f83db12cSthorpej int nsegs, off_t off, int prot, int flags); 241*f83db12cSthorpej #endif /* _VIRT68K_BUS_DMA_PRIVATE */ 242*f83db12cSthorpej 243*f83db12cSthorpej /* Needed by mvmebus.c */ 244*f83db12cSthorpej int _bus_dmamem_alloc_common(bus_dma_tag_t, 245*f83db12cSthorpej bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, 246*f83db12cSthorpej bus_dma_segment_t *, int, int *, int); 247*f83db12cSthorpej 248*f83db12cSthorpej #endif /* _VIRT68K_BUS_DMA_H_ */ 249