xref: /netbsd-src/sys/arch/virt68k/dev/gfrtc_mainbus.c (revision 4b71250eb0b8a729278229c676eb1b659e8d2767)
1*4b71250eSisaki /*	$NetBSD: gfrtc_mainbus.c,v 1.3 2024/03/05 11:19:30 isaki Exp $	*/
2f83db12cSthorpej 
3f83db12cSthorpej /*-
4f83db12cSthorpej  * Copyright (c) 2023, 2024 The NetBSD Foundation, Inc.
5f83db12cSthorpej  * All rights reserved.
6f83db12cSthorpej  *
7f83db12cSthorpej  * This code is derived from software contributed to The NetBSD Foundation
8f83db12cSthorpej  * by Nick Hudson and by Jason R. Thorpe.
9f83db12cSthorpej  *
10f83db12cSthorpej  * Redistribution and use in source and binary forms, with or without
11f83db12cSthorpej  * modification, are permitted provided that the following conditions
12f83db12cSthorpej  * are met:
13f83db12cSthorpej  * 1. Redistributions of source code must retain the above copyright
14f83db12cSthorpej  *    notice, this list of conditions and the following disclaimer.
15f83db12cSthorpej  * 2. Redistributions in binary form must reproduce the above copyright
16f83db12cSthorpej  *    notice, this list of conditions and the following disclaimer in the
17f83db12cSthorpej  *    documentation and/or other materials provided with the distribution.
18f83db12cSthorpej  *
19f83db12cSthorpej  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20f83db12cSthorpej  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21f83db12cSthorpej  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22f83db12cSthorpej  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23f83db12cSthorpej  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24f83db12cSthorpej  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25f83db12cSthorpej  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26f83db12cSthorpej  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27f83db12cSthorpej  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28f83db12cSthorpej  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29f83db12cSthorpej  * POSSIBILITY OF SUCH DAMAGE.
30f83db12cSthorpej  */
31f83db12cSthorpej 
32f83db12cSthorpej #include <sys/cdefs.h>
33*4b71250eSisaki __KERNEL_RCSID(0, "$NetBSD: gfrtc_mainbus.c,v 1.3 2024/03/05 11:19:30 isaki Exp $");
34f83db12cSthorpej 
35f83db12cSthorpej #include <sys/param.h>
36f83db12cSthorpej #include <sys/bus.h>
37f83db12cSthorpej #include <sys/device.h>
38f83db12cSthorpej #include <sys/intr.h>
39f83db12cSthorpej #include <sys/systm.h>
40f83db12cSthorpej 
41f83db12cSthorpej #include <machine/clockvar.h>
42f83db12cSthorpej 
43f83db12cSthorpej #include <virt68k/dev/mainbusvar.h>
44f83db12cSthorpej 
45f83db12cSthorpej #include <dev/goldfish/gfrtcvar.h>
46f83db12cSthorpej 
47f83db12cSthorpej static const struct device_compatible_entry compat_data[] = {
48f83db12cSthorpej 	{ .compat = "google,goldfish-rtc",
49f83db12cSthorpej 	  .value = CLOCK_NONE },
50f83db12cSthorpej 
51f83db12cSthorpej 	{ .compat = "netbsd,goldfish-rtc-hardclock",
52f83db12cSthorpej 	  .value = CLOCK_HARDCLOCK },
53f83db12cSthorpej 
54f83db12cSthorpej 	DEVICE_COMPAT_EOL
55f83db12cSthorpej };
56f83db12cSthorpej 
57f83db12cSthorpej struct gfrtc_mainbus_softc {
58f83db12cSthorpej 	struct gfrtc_softc	sc_gfrtc;
59f83db12cSthorpej 	struct clock_attach_args sc_clock_args;
60f83db12cSthorpej 	uint64_t		sc_interval_ns;
61*4b71250eSisaki 	uint64_t		sc_alarm_time;
62f83db12cSthorpej 	void			(*sc_handler)(struct clockframe *);
63f83db12cSthorpej 	struct evcnt *		sc_evcnt;
64f83db12cSthorpej 	void *			sc_ih;
65f83db12cSthorpej };
66f83db12cSthorpej 
67f83db12cSthorpej #define	CLOCK_HANDLER()							\
68f83db12cSthorpej do {									\
69f83db12cSthorpej 	/* Clear the interrupt condition. */				\
70f83db12cSthorpej 	gfrtc_clear_interrupt(&sc->sc_gfrtc);				\
71f83db12cSthorpej 									\
72*4b71250eSisaki 	/* Get the next alarm set. */					\
73*4b71250eSisaki 	sc->sc_alarm_time += sc->sc_interval_ns;			\
74*4b71250eSisaki 	gfrtc_set_alarm(&sc->sc_gfrtc, sc->sc_alarm_time);		\
758f32aa87Smlelstv 									\
76f83db12cSthorpej 	/* Increment the counter and call the handler. */		\
77f83db12cSthorpej 	sc->sc_evcnt->ev_count++;					\
78f83db12cSthorpej 	sc->sc_handler((struct clockframe *)v);				\
79f83db12cSthorpej } while (/*CONSTCOND*/0)
80f83db12cSthorpej 
81f83db12cSthorpej static int
gfrtc_mainbus_hardclock(void * v)82f83db12cSthorpej gfrtc_mainbus_hardclock(void *v)
83f83db12cSthorpej {
84f83db12cSthorpej 	struct gfrtc_mainbus_softc *sc = clock_devices[CLOCK_HARDCLOCK];
85f83db12cSthorpej 
86f83db12cSthorpej 	CLOCK_HANDLER();
87f83db12cSthorpej 	return 1;
88f83db12cSthorpej }
89f83db12cSthorpej 
90f83db12cSthorpej static void *gfrtc_isrs[] = {
91f83db12cSthorpej [CLOCK_HARDCLOCK]	=	gfrtc_mainbus_hardclock,
92f83db12cSthorpej };
93f83db12cSthorpej 
94f83db12cSthorpej static void
gfrtc_mainbus_initclock(void * arg,unsigned int interval_us,struct evcnt * ev,void (* func)(struct clockframe *))95f83db12cSthorpej gfrtc_mainbus_initclock(void *arg, unsigned int interval_us,
96f83db12cSthorpej     struct evcnt *ev, void (*func)(struct clockframe *))
97f83db12cSthorpej {
98f83db12cSthorpej 	struct gfrtc_mainbus_softc *sc = arg;
99f83db12cSthorpej 
100f83db12cSthorpej 	sc->sc_interval_ns = (uint64_t)interval_us * 1000;
101f83db12cSthorpej 	sc->sc_handler = func;
102f83db12cSthorpej 	sc->sc_evcnt = ev;
103f83db12cSthorpej 
104f83db12cSthorpej 	/* Enable the interrupt. */
105f83db12cSthorpej 	gfrtc_enable_interrupt(&sc->sc_gfrtc);
106f83db12cSthorpej 
107f83db12cSthorpej 	/* Start the first alarm! */
108*4b71250eSisaki 	sc->sc_alarm_time = gfrtc_get_time(&sc->sc_gfrtc) + sc->sc_interval_ns;
109*4b71250eSisaki 	gfrtc_set_alarm(&sc->sc_gfrtc, sc->sc_alarm_time);
110f83db12cSthorpej }
111f83db12cSthorpej 
112f83db12cSthorpej static int
gfrtc_mainbus_match(device_t parent,cfdata_t cf,void * aux)113f83db12cSthorpej gfrtc_mainbus_match(device_t parent, cfdata_t cf, void *aux)
114f83db12cSthorpej {
115f83db12cSthorpej 	struct mainbus_attach_args * const ma = aux;
116f83db12cSthorpej 
117f83db12cSthorpej 	return mainbus_compatible_match(ma, compat_data);
118f83db12cSthorpej }
119f83db12cSthorpej 
120f83db12cSthorpej static void
gfrtc_mainbus_attach(device_t parent,device_t self,void * aux)121f83db12cSthorpej gfrtc_mainbus_attach(device_t parent, device_t self, void *aux)
122f83db12cSthorpej {
123f83db12cSthorpej 	struct gfrtc_mainbus_softc * const sc = device_private(self);
124f83db12cSthorpej 	struct mainbus_attach_args * const ma = aux;
125f83db12cSthorpej 	const struct device_compatible_entry *dce;
126f83db12cSthorpej 	char strbuf[INTR_STRING_BUFSIZE];
127f83db12cSthorpej 
128f83db12cSthorpej 	sc->sc_gfrtc.sc_dev = self;
129f83db12cSthorpej 	sc->sc_gfrtc.sc_bst = ma->ma_st;
130f83db12cSthorpej 	if (bus_space_map(sc->sc_gfrtc.sc_bst, ma->ma_addr, ma->ma_size, 0,
131f83db12cSthorpej 			  &sc->sc_gfrtc.sc_bsh) != 0) {
132f83db12cSthorpej 		aprint_error(": couldn't map registers\n");
133f83db12cSthorpej 		return;
134f83db12cSthorpej 	}
135f83db12cSthorpej 
136f83db12cSthorpej 	dce = mainbus_compatible_lookup(ma, compat_data);
137f83db12cSthorpej 	KASSERT(dce != NULL);
138f83db12cSthorpej 
139f83db12cSthorpej 	gfrtc_attach(&sc->sc_gfrtc, (dce->value == CLOCK_NONE));
140f83db12cSthorpej 
141f83db12cSthorpej 	switch (dce->value) {
142f83db12cSthorpej 	case CLOCK_HARDCLOCK:
143f83db12cSthorpej 		/*
144f83db12cSthorpej 		 * We are the one of the clock interrupts.
145f83db12cSthorpej 		 */
146f83db12cSthorpej 		sc->sc_ih = intr_establish(gfrtc_isrs[(int)dce->value],
147f83db12cSthorpej 		    NULL, ma->ma_irq, IPL_SCHED, 0);
148f83db12cSthorpej 		KASSERT(sc->sc_ih != NULL);
149f83db12cSthorpej 		aprint_normal_dev(self, "%s interrupting at %s\n",
150f83db12cSthorpej 		    clock_name((int)dce->value),
151f83db12cSthorpej 		    intr_string(sc->sc_ih, strbuf, sizeof(strbuf)));
152f83db12cSthorpej 		sc->sc_clock_args.ca_initfunc = gfrtc_mainbus_initclock;
153f83db12cSthorpej 		sc->sc_clock_args.ca_arg = sc;
154f83db12cSthorpej 		sc->sc_clock_args.ca_which = (int)dce->value;
155f83db12cSthorpej 		clock_attach(self, &sc->sc_clock_args, gfrtc_delay);
156f83db12cSthorpej 		break;
157f83db12cSthorpej 
158f83db12cSthorpej 	default:
159f83db12cSthorpej 		break;
160f83db12cSthorpej 	}
161f83db12cSthorpej }
162f83db12cSthorpej 
163f83db12cSthorpej CFATTACH_DECL_NEW(gfrtc_mainbus, sizeof(struct gfrtc_mainbus_softc),
164f83db12cSthorpej 	gfrtc_mainbus_match, gfrtc_mainbus_attach, NULL, NULL);
165