xref: /netbsd-src/sys/arch/vax/mba/mbareg.h (revision 6a6027692662ba623e7bf5274322989a7b5d1440)
1*6a602769Sragge /*	$NetBSD: mbareg.h,v 1.6 2017/05/22 17:13:09 ragge Exp $ */
265c1cb99Sragge /*
365c1cb99Sragge  * Copyright (c) 1994 Ludd, University of Lule}, Sweden
465c1cb99Sragge  * All rights reserved.
565c1cb99Sragge  *
665c1cb99Sragge  * Redistribution and use in source and binary forms, with or without
765c1cb99Sragge  * modification, are permitted provided that the following conditions
865c1cb99Sragge  * are met:
965c1cb99Sragge  * 1. Redistributions of source code must retain the above copyright
1065c1cb99Sragge  *    notice, this list of conditions and the following disclaimer.
1165c1cb99Sragge  * 2. Redistributions in binary form must reproduce the above copyright
1265c1cb99Sragge  *    notice, this list of conditions and the following disclaimer in the
1365c1cb99Sragge  *    documentation and/or other materials provided with the distribution.
1465c1cb99Sragge  *
1565c1cb99Sragge  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1665c1cb99Sragge  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1765c1cb99Sragge  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1865c1cb99Sragge  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
1965c1cb99Sragge  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
2065c1cb99Sragge  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2165c1cb99Sragge  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2265c1cb99Sragge  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2365c1cb99Sragge  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
2465c1cb99Sragge  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2565c1cb99Sragge  */
2665c1cb99Sragge 
27db7db145Sragge #ifdef notdef
28435182d4Sragge struct mba_hack {
29ad3443e0Sragge 	u_int	pad1;
30ad3443e0Sragge 	u_int	md_ds;		/* unit status */
31435182d4Sragge 	u_int	pad4[2];
32435182d4Sragge 	u_int	md_as;		/* Attention summary */
33435182d4Sragge 	u_int	pad2;
34ad3443e0Sragge 	u_int	md_dt;		/* unit type */
35ad3443e0Sragge 	u_int	pad3[25];
36ad3443e0Sragge };
3765c1cb99Sragge 
3865c1cb99Sragge struct mba_regs {
3965c1cb99Sragge 	u_int	mba_csr;
4065c1cb99Sragge 	u_int	mba_cr;
4165c1cb99Sragge 	u_int	mba_sr;
4265c1cb99Sragge 	u_int	mba_var;
4365c1cb99Sragge 	u_int	mba_bc;
4465c1cb99Sragge 	u_int	mba_dr;
4565c1cb99Sragge 	u_int	mba_smr;
4665c1cb99Sragge 	u_int	mba_car;
4765c1cb99Sragge 	u_int	utrymme[248];
48435182d4Sragge 	struct	mba_hack mba_md[8];	/* unit specific regs */
49435182d4Sragge 	struct	pte mba_map[256];
5065c1cb99Sragge };
51db7db145Sragge #endif
52db7db145Sragge 
53db7db145Sragge #define	MBA_CSR	0
54db7db145Sragge #define	MBA_CR	4
55db7db145Sragge #define	MBA_SR	8
56db7db145Sragge #define	MBA_VAR	12
57db7db145Sragge #define	MBA_BC	16
58db7db145Sragge #define	MBA_DR	20
59db7db145Sragge #define	MBA_SMR	24
60db7db145Sragge #define	MBA_CAR	28
61db7db145Sragge 
62db7db145Sragge #define	MUREG(dev,reg)	(1024+(dev)*128+(reg))
63db7db145Sragge #define MAPREG(nr)	(2048+(nr)*4)
64db7db145Sragge 
65db7db145Sragge #define	MU_DS	4	/* unit status */
66db7db145Sragge #define	MU_AS	16	/* attention summary */
67db7db145Sragge #define	MU_DT	24	/* drive type */
6865c1cb99Sragge 
6965c1cb99Sragge /*
7065c1cb99Sragge  * Different states which can be on massbus.
7165c1cb99Sragge  */
7265c1cb99Sragge /* Write to mba_cr */
7365c1cb99Sragge #define	MBACR_IBC	0x10
7465c1cb99Sragge #define	MBACR_MMM	0x8
7565c1cb99Sragge #define	MBACR_IE	0x4
7665c1cb99Sragge #define	MBACR_ABORT	0x2
7765c1cb99Sragge #define	MBACR_INIT	0x1
7865c1cb99Sragge 
7965c1cb99Sragge /* Read from mba_sr: */
8065c1cb99Sragge #define	MBASR_DTBUSY	0x80000000
81435182d4Sragge #define	MBASR_NRCONF	0x40000000
8265c1cb99Sragge #define	MBASR_CRD	0x20000000
8365c1cb99Sragge #define	MBASR_CBHUNG	0x800000
8465c1cb99Sragge #define MBASR_PGE	0x80000
8565c1cb99Sragge #define	MBASR_NED	0x40000		/* NonExistent Drive */
8665c1cb99Sragge #define	MBASR_MCPE	0x20000		/* Massbuss Control Parity Error */
8765c1cb99Sragge #define	MBASR_ATTN	0x10000		/* Attention from Massbus */
8865c1cb99Sragge #define	MBASR_SPE	0x4000		/* Silo Parity Error */
8965c1cb99Sragge #define MBASR_DTCMP	0x2000		/* Data Transfer CoMPleted */
9065c1cb99Sragge #define MBASR_DTABT	0x1000		/* Data Transfer ABorTed */
9165c1cb99Sragge #define MBASR_DLT	0x800		/* Data LaTe */
9265c1cb99Sragge #define MBASR_WCKUE	0x400		/* Write check upper error */
9365c1cb99Sragge #define	MBASR_WCKLE	0x200		/* Write check lower error */
94435182d4Sragge #define	MBASR_MXF	0x100		/* Miss transfer fault */
9565c1cb99Sragge #define	MBASR_MBEXC	0x80		/* Massbuss exception */
9665c1cb99Sragge #define	MBASR_MDPE	0x40		/* Massbuss data parity error */
9765c1cb99Sragge #define	MBASR_MAPPE	0x20		/* Page frame map parity error */
9865c1cb99Sragge #define	MBASR_INVMAP	0x10		/* Invalid map */
9965c1cb99Sragge #define MBASR_ERR_STAT	0x8		/* Error status */
100435182d4Sragge #define	MBASR_ERRC	0x4		/* Error confirmation */
101435182d4Sragge #define	MBASR_ISTIMO	0x2		/* Interface sequence timeout */
102435182d4Sragge #define	MBASR_RDTIMO	0x1		/* Read data timeout status */
10365c1cb99Sragge 
104ad3443e0Sragge /* Definitions in mba_device md_ds */
105ad3443e0Sragge #define	MBADS_DPR	0x100		/* Unit present */
106ad3443e0Sragge 
107ad3443e0Sragge /* Definitions in mba_device md_dt */
108991c2cc9Shans #define	MBADT_RP04	0x2010
109991c2cc9Shans #define MBADT_RP05	0x2011
110991c2cc9Shans #define MBADT_RP06	0x2012
111991c2cc9Shans #define MBADT_RP07	0x2022
112991c2cc9Shans #define MBADT_RM02	0x2015
113991c2cc9Shans #define MBADT_RM03	0x2014
114991c2cc9Shans #define MBADT_RM05	0x2017
115991c2cc9Shans #define MBADT_RM80	0x2016
116ad3443e0Sragge #define	MBADT_DRQ	0x800		/* Dual ported */
117ad3443e0Sragge #define	MBADT_MOH	0x2000		/* Moving head device */
118