xref: /netbsd-src/sys/arch/sun3/dev/btreg.h (revision 95e1ffb15694e54f29f8baaa4232152b703c2a5a)
1*95e1ffb1Schristos /*	$NetBSD: btreg.h,v 1.3 2005/12/11 12:19:20 christos Exp $ */
263c3c68dSgwr 
363c3c68dSgwr /*
463c3c68dSgwr  * Copyright (c) 1993
563c3c68dSgwr  *	The Regents of the University of California.  All rights reserved.
663c3c68dSgwr  *
763c3c68dSgwr  * This software was developed by the Computer Systems Engineering group
863c3c68dSgwr  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
963c3c68dSgwr  * contributed to Berkeley.
1063c3c68dSgwr  *
1163c3c68dSgwr  * All advertising materials mentioning features or use of this software
1263c3c68dSgwr  * must display the following acknowledgement:
1363c3c68dSgwr  *	This product includes software developed by the University of
1463c3c68dSgwr  *	California, Lawrence Berkeley Laboratory.
1563c3c68dSgwr  *
1663c3c68dSgwr  * Redistribution and use in source and binary forms, with or without
1763c3c68dSgwr  * modification, are permitted provided that the following conditions
1863c3c68dSgwr  * are met:
1963c3c68dSgwr  * 1. Redistributions of source code must retain the above copyright
2063c3c68dSgwr  *    notice, this list of conditions and the following disclaimer.
2163c3c68dSgwr  * 2. Redistributions in binary form must reproduce the above copyright
2263c3c68dSgwr  *    notice, this list of conditions and the following disclaimer in the
2363c3c68dSgwr  *    documentation and/or other materials provided with the distribution.
24aad01611Sagc  * 3. Neither the name of the University nor the names of its contributors
2563c3c68dSgwr  *    may be used to endorse or promote products derived from this software
2663c3c68dSgwr  *    without specific prior written permission.
2763c3c68dSgwr  *
2863c3c68dSgwr  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
2963c3c68dSgwr  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
3063c3c68dSgwr  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
3163c3c68dSgwr  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
3263c3c68dSgwr  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
3363c3c68dSgwr  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
3463c3c68dSgwr  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
3563c3c68dSgwr  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
3663c3c68dSgwr  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
3763c3c68dSgwr  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
3863c3c68dSgwr  * SUCH DAMAGE.
3963c3c68dSgwr  *
4063c3c68dSgwr  *	@(#)btreg.h	8.2 (Berkeley) 1/21/94
4163c3c68dSgwr  */
4263c3c68dSgwr 
4363c3c68dSgwr /*
4463c3c68dSgwr  * Several Sun color frame buffers use some kind of Brooktree video
4563c3c68dSgwr  * DAC (e.g., the Bt458, -- in any case, Brooktree make the only
4663c3c68dSgwr  * decent color frame buffer chips).
4763c3c68dSgwr  *
4863c3c68dSgwr  * Color map control on these is a bit funky in a SPARCstation.
4963c3c68dSgwr  * To update the color map one would normally do byte writes, but
5063c3c68dSgwr  * the hardware takes longword writes.  Since there are three
5163c3c68dSgwr  * registers for each color map entry (R, then G, then B), we have
5263c3c68dSgwr  * to set color 1 with a write to address 0 (setting 0's R/G/B and
5363c3c68dSgwr  * color 1's R) followed by a second write to address 1 (setting
5463c3c68dSgwr  * color 1's G/B and color 2's R/G).  Software must therefore keep
5563c3c68dSgwr  * a copy of the current map.
5663c3c68dSgwr  *
5763c3c68dSgwr  * The colormap address register increments automatically, so the
5863c3c68dSgwr  * above write is done as:
5963c3c68dSgwr  *
6063c3c68dSgwr  *	bt->bt_addr = 0;
6163c3c68dSgwr  *	bt->bt_cmap = R0G0B0R1;
6263c3c68dSgwr  *	bt->bt_cmap = G1B1R2G2;
6363c3c68dSgwr  *	...
6463c3c68dSgwr  *
6563c3c68dSgwr  * Yow!
6663c3c68dSgwr  *
6763c3c68dSgwr  * Bonus complication: on the cg6, only the top 8 bits of each 32 bit
6863c3c68dSgwr  * register matter, even though the cg3 takes all the bits from all
6963c3c68dSgwr  * bytes written to it.
7063c3c68dSgwr  */
7163c3c68dSgwr struct bt_regs {
7263c3c68dSgwr 	u_int	bt_addr;		/* map address register */
7363c3c68dSgwr 	u_int	bt_cmap;		/* colormap data register */
7463c3c68dSgwr 	u_int	bt_ctrl;		/* control register */
7563c3c68dSgwr 	u_int	bt_omap;		/* overlay (cursor) map register */
7663c3c68dSgwr };
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