xref: /netbsd-src/sys/arch/sparc64/dev/rtc.c (revision 0aa2b64219e8591017bb3d659c51545050a6c3ff)
1*0aa2b642Sandvar /*	$NetBSD: rtc.c,v 1.9 2023/06/27 19:30:27 andvar Exp $	*/
2273c5b01Smrg 
3273c5b01Smrg /*
4273c5b01Smrg  * Copyright (c) 1992, 1993
5273c5b01Smrg  *	The Regents of the University of California.  All rights reserved.
6273c5b01Smrg  * Copyright (c) 1994 Gordon W. Ross
7273c5b01Smrg  * Copyright (c) 1993 Adam Glass
8273c5b01Smrg  * Copyright (c) 1996 Paul Kranenburg
9273c5b01Smrg  * Copyright (c) 1996
10273c5b01Smrg  * 	The President and Fellows of Harvard College. All rights reserved.
11273c5b01Smrg  *
12273c5b01Smrg  * This software was developed by the Computer Systems Engineering group
13273c5b01Smrg  * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
14273c5b01Smrg  * contributed to Berkeley.
15273c5b01Smrg  *
16273c5b01Smrg  * All advertising materials mentioning features or use of this software
17273c5b01Smrg  * must display the following acknowledgement:
18273c5b01Smrg  *	This product includes software developed by Harvard University.
19273c5b01Smrg  *	This product includes software developed by the University of
20273c5b01Smrg  *	California, Lawrence Berkeley Laboratory.
21273c5b01Smrg  *
22273c5b01Smrg  * Redistribution and use in source and binary forms, with or without
23273c5b01Smrg  * modification, are permitted provided that the following conditions
24273c5b01Smrg  * are met:
25273c5b01Smrg  *
26273c5b01Smrg  * 1. Redistributions of source code must retain the above copyright
27273c5b01Smrg  *    notice, this list of conditions and the following disclaimer.
28273c5b01Smrg  * 2. Redistributions in binary form must reproduce the above copyright
29273c5b01Smrg  *    notice, this list of conditions and the following disclaimer in the
30273c5b01Smrg  *    documentation and/or other materials provided with the distribution.
31273c5b01Smrg  * 3. All advertising materials mentioning features or use of this software
32273c5b01Smrg  *    must display the following acknowledgement:
33273c5b01Smrg  *	This product includes software developed by the University of
34273c5b01Smrg  *	California, Berkeley and its contributors.
35273c5b01Smrg  *	This product includes software developed by Paul Kranenburg.
36273c5b01Smrg  *	This product includes software developed by Harvard University.
37273c5b01Smrg  * 4. Neither the name of the University nor the names of its contributors
38273c5b01Smrg  *    may be used to endorse or promote products derived from this software
39273c5b01Smrg  *    without specific prior written permission.
40273c5b01Smrg  *
41273c5b01Smrg  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
42273c5b01Smrg  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
43273c5b01Smrg  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
44273c5b01Smrg  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
45273c5b01Smrg  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
46273c5b01Smrg  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
47273c5b01Smrg  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48273c5b01Smrg  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
49273c5b01Smrg  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
50273c5b01Smrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
51273c5b01Smrg  * SUCH DAMAGE.
52273c5b01Smrg  *
53273c5b01Smrg  *	@(#)clock.c	8.1 (Berkeley) 6/11/93
54273c5b01Smrg  * from: NetBSD: clock.c,v 1.80 2006/09/03 22:27:45 gdamore Exp
55273c5b01Smrg  *
56273c5b01Smrg  */
57273c5b01Smrg 
58273c5b01Smrg #include <sys/cdefs.h>
59*0aa2b642Sandvar __KERNEL_RCSID(0, "$NetBSD: rtc.c,v 1.9 2023/06/27 19:30:27 andvar Exp $");
60273c5b01Smrg 
61273c5b01Smrg /*
62273c5b01Smrg  * Clock driver for 'rtc' - mc146818 driver.
63273c5b01Smrg  */
64273c5b01Smrg 
65273c5b01Smrg #include <sys/param.h>
66273c5b01Smrg #include <sys/kernel.h>
67273c5b01Smrg #include <sys/device.h>
68273c5b01Smrg #include <sys/proc.h>
69273c5b01Smrg 
70b6584574Sdyoung #include <sys/bus.h>
71273c5b01Smrg #include <machine/autoconf.h>
72273c5b01Smrg 
73273c5b01Smrg #include <dev/clock_subr.h>
74273c5b01Smrg #include <dev/ic/mc146818reg.h>
75273c5b01Smrg #include <dev/ic/mc146818var.h>
76273c5b01Smrg 
77273c5b01Smrg #include <dev/ebus/ebusreg.h>
78273c5b01Smrg #include <dev/ebus/ebusvar.h>
79273c5b01Smrg 
80048fb884Stsutsui static int	rtc_ebus_match(device_t, cfdata_t, void *);
81048fb884Stsutsui static void	rtc_ebus_attach(device_t, device_t, void *);
82273c5b01Smrg 
83048fb884Stsutsui CFATTACH_DECL_NEW(rtc_ebus, sizeof(struct mc146818_softc),
842ae6e40cStsutsui     rtc_ebus_match, rtc_ebus_attach, NULL, NULL);
85273c5b01Smrg 
86273c5b01Smrg u_int rtc_read_reg(struct mc146818_softc *, u_int);
87273c5b01Smrg void rtc_write_reg(struct mc146818_softc *, u_int, u_int);
88273c5b01Smrg u_int rtc_getcent(struct mc146818_softc *);
89273c5b01Smrg void rtc_setcent(struct mc146818_softc *, u_int);
90273c5b01Smrg 
91273c5b01Smrg static int
rtc_ebus_match(device_t parent,cfdata_t cf,void * aux)92048fb884Stsutsui rtc_ebus_match(device_t parent, cfdata_t cf, void *aux)
93273c5b01Smrg {
94273c5b01Smrg 	struct ebus_attach_args *ea = aux;
95273c5b01Smrg 
96273c5b01Smrg 	return (strcmp("rtc", ea->ea_name) == 0);
97273c5b01Smrg }
98273c5b01Smrg 
99273c5b01Smrg /*
100273c5b01Smrg  * `rtc' is a ds1287 on an ebus (actually an isa bus, but we use the
101273c5b01Smrg  * ebus driver for isa.)  So we can use ebus_wenable() but need to do
102273c5b01Smrg  * different attach work and use different todr routines.  It does not
103273c5b01Smrg  * incorporate an IDPROM.
104273c5b01Smrg  */
105273c5b01Smrg 
106273c5b01Smrg /*
107273c5b01Smrg  * XXX the stupid ds1287 is not mapped directly but uses an address
108273c5b01Smrg  * and a data reg so we cannot access the stuuupid thing w/o having
109273c5b01Smrg  * write access to the registers.
110273c5b01Smrg  *
111273c5b01Smrg  * XXXX We really need to mutex register access!
112273c5b01Smrg  */
113273c5b01Smrg #define	RTC_ADDR	0
114273c5b01Smrg #define	RTC_DATA	1
115273c5b01Smrg u_int
rtc_read_reg(struct mc146818_softc * sc,u_int reg)116273c5b01Smrg rtc_read_reg(struct mc146818_softc *sc, u_int reg)
117273c5b01Smrg {
118273c5b01Smrg 
119273c5b01Smrg 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, RTC_ADDR, reg);
120273c5b01Smrg 	return (bus_space_read_1(sc->sc_bst, sc->sc_bsh, RTC_DATA));
121273c5b01Smrg }
122273c5b01Smrg void
rtc_write_reg(struct mc146818_softc * sc,u_int reg,u_int val)123273c5b01Smrg rtc_write_reg(struct mc146818_softc *sc, u_int reg, u_int val)
124273c5b01Smrg {
125273c5b01Smrg 
126273c5b01Smrg 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, RTC_ADDR, reg);
127273c5b01Smrg 	bus_space_write_1(sc->sc_bst, sc->sc_bsh, RTC_DATA, val);
128273c5b01Smrg }
129273c5b01Smrg 
130273c5b01Smrg /* ARGSUSED */
131273c5b01Smrg static void
rtc_ebus_attach(device_t parent,device_t self,void * aux)132048fb884Stsutsui rtc_ebus_attach(device_t parent, device_t self, void *aux)
133273c5b01Smrg {
134048fb884Stsutsui 	struct mc146818_softc *sc = device_private(self);
135273c5b01Smrg 	struct ebus_attach_args *ea = aux;
136273c5b01Smrg 	char *model;
137273c5b01Smrg 	int sz;
138273c5b01Smrg 
1394090172bStsutsui 	sc->sc_dev = self;
140273c5b01Smrg 	sc->sc_bst = ea->ea_bustag;
141273c5b01Smrg 
142273c5b01Smrg 	/* hard code to 8K? */
143273c5b01Smrg 	sz = ea->ea_reg[0].size;
144273c5b01Smrg 
145273c5b01Smrg 	if (bus_space_map(sc->sc_bst,
146273c5b01Smrg 			 EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
14715e9690dSmrg 			 sz, 0,
148273c5b01Smrg 			 &sc->sc_bsh) != 0) {
149048fb884Stsutsui 		aprint_error(": can't map register\n");
150273c5b01Smrg 		return;
151273c5b01Smrg 	}
152273c5b01Smrg 
153273c5b01Smrg 	model = prom_getpropstring(ea->ea_node, "model");
154273c5b01Smrg #ifdef DIAGNOSTIC
155273c5b01Smrg 	if (model == NULL)
156273c5b01Smrg 		panic("clockattach_rtc: no model property");
157273c5b01Smrg #endif
158273c5b01Smrg 
159273c5b01Smrg 	/* Our TOD clock year 0 is 0 */
160273c5b01Smrg 	sc->sc_year0 = 0;
161273c5b01Smrg 	sc->sc_flag = MC146818_NO_CENT_ADJUST;
162273c5b01Smrg 	sc->sc_mcread = rtc_read_reg;
163273c5b01Smrg 	sc->sc_mcwrite = rtc_write_reg;
164273c5b01Smrg 	sc->sc_getcent = rtc_getcent;
165273c5b01Smrg 	sc->sc_setcent = rtc_setcent;
166273c5b01Smrg 	mc146818_attach(sc);
167273c5b01Smrg 
168048fb884Stsutsui 	aprint_normal(": %s\n", model);
169ebc9e233Smrg 	aprint_naive(": Clock\n");
170273c5b01Smrg 
171273c5b01Smrg 	/*
172273c5b01Smrg 	 * Turn interrupts off, just in case. (Although they shouldn't
173273c5b01Smrg 	 * be wired to an interrupt controller on sparcs).
174273c5b01Smrg 	 */
175273c5b01Smrg 	rtc_write_reg(sc, MC_REGB, MC_REGB_BINARY | MC_REGB_24HR);
176273c5b01Smrg 
177273c5b01Smrg 	/*
178273c5b01Smrg 	 * Apparently on some machines the TOD registers are on the same
179273c5b01Smrg 	 * physical page as the COM registers.  So we won't protect them.
180273c5b01Smrg 	 */
181273c5b01Smrg 	/*sc->sc_handle.todr_setwen = NULL;*/
182273c5b01Smrg }
183273c5b01Smrg 
184273c5b01Smrg /*
185273c5b01Smrg  * MD mc146818 RTC todr routines.
186273c5b01Smrg  */
187273c5b01Smrg 
188*0aa2b642Sandvar /* Looks like Sun stores the century info somewhere in CMOS RAM */
189273c5b01Smrg #define MC_CENT 0x32
190273c5b01Smrg 
191273c5b01Smrg u_int
rtc_getcent(struct mc146818_softc * sc)192048fb884Stsutsui rtc_getcent(struct mc146818_softc *sc)
193273c5b01Smrg {
194273c5b01Smrg 
195273c5b01Smrg 	return rtc_read_reg(sc, MC_CENT);
196273c5b01Smrg }
197273c5b01Smrg void
rtc_setcent(struct mc146818_softc * sc,u_int cent)198048fb884Stsutsui rtc_setcent(struct mc146818_softc *sc, u_int cent)
199273c5b01Smrg {
200273c5b01Smrg 
201273c5b01Smrg 	rtc_write_reg(sc, MC_CENT, cent);
202273c5b01Smrg }
203