xref: /netbsd-src/sys/arch/sparc/include/fenv.h (revision 840c51e6d0ed9b46cfaf552853c70ef98bb9ccbe)
1*840c51e6Smartin /*	$NetBSD: fenv.h,v 1.2 2017/01/14 12:00:13 martin Exp $	*/
288e42b60Snakayama 
388e42b60Snakayama /*-
488e42b60Snakayama  * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
588e42b60Snakayama  * All rights reserved.
688e42b60Snakayama  *
788e42b60Snakayama  * Redistribution and use in source and binary forms, with or without
888e42b60Snakayama  * modification, are permitted provided that the following conditions
988e42b60Snakayama  * are met:
1088e42b60Snakayama  * 1. Redistributions of source code must retain the above copyright
1188e42b60Snakayama  *    notice, this list of conditions and the following disclaimer.
1288e42b60Snakayama  * 2. Redistributions in binary form must reproduce the above copyright
1388e42b60Snakayama  *    notice, this list of conditions and the following disclaimer in the
1488e42b60Snakayama  *    documentation and/or other materials provided with the distribution.
1588e42b60Snakayama  *
1688e42b60Snakayama  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1788e42b60Snakayama  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1888e42b60Snakayama  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1988e42b60Snakayama  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
2088e42b60Snakayama  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2188e42b60Snakayama  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2288e42b60Snakayama  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2388e42b60Snakayama  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2488e42b60Snakayama  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2588e42b60Snakayama  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2688e42b60Snakayama  * SUCH DAMAGE.
2788e42b60Snakayama  *
2888e42b60Snakayama  * $FreeBSD$
2988e42b60Snakayama  */
3088e42b60Snakayama 
3188e42b60Snakayama #ifndef	_SPARC_FENV_H_
3288e42b60Snakayama #define	_SPARC_FENV_H_
3388e42b60Snakayama 
3488e42b60Snakayama #include <sys/stdint.h>
3588e42b60Snakayama 
3688e42b60Snakayama #ifdef __arch64__
3788e42b60Snakayama typedef	uint64_t	fenv_t;
3888e42b60Snakayama typedef	uint64_t	fexcept_t;
3988e42b60Snakayama #else
4088e42b60Snakayama typedef	uint32_t	fenv_t;
4188e42b60Snakayama typedef	uint32_t	fexcept_t;
4288e42b60Snakayama #endif
4388e42b60Snakayama 
4488e42b60Snakayama /*
4588e42b60Snakayama  * Exception flags
4688e42b60Snakayama  *
4788e42b60Snakayama  * Symbols are defined in such a way, to correspond to the accrued
4888e42b60Snakayama  * exception bits (aexc) fields of FSR.
4988e42b60Snakayama  */
5088e42b60Snakayama #define	FE_INEXACT      0x00000020	/* 0000100000 */
5188e42b60Snakayama #define	FE_DIVBYZERO    0x00000040	/* 0001000000 */
5288e42b60Snakayama #define	FE_UNDERFLOW    0x00000080	/* 0010000000 */
5388e42b60Snakayama #define	FE_OVERFLOW     0x00000100	/* 0100000000 */
5488e42b60Snakayama #define	FE_INVALID	0x00000200	/* 1000000000 */
5588e42b60Snakayama 
5688e42b60Snakayama #define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_INEXACT | \
5788e42b60Snakayama     FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
5888e42b60Snakayama 
5988e42b60Snakayama /*
6088e42b60Snakayama  * Rounding modes
6188e42b60Snakayama  *
6288e42b60Snakayama  * We can't just use the hardware bit values here, because that would
6388e42b60Snakayama  * make FE_UPWARD and FE_DOWNWARD negative, which is not allowed.
6488e42b60Snakayama  */
65*840c51e6Smartin #define	FE_TONEAREST	0	/* round to nearest representable number */
66*840c51e6Smartin #define	FE_TOWARDZERO	1	/* round to zero (truncate) */
67*840c51e6Smartin #define	FE_UPWARD	2	/* round toward positive infinity */
68*840c51e6Smartin #define	FE_DOWNWARD	3	/* round toward negative infinity */
6988e42b60Snakayama #define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
7088e42b60Snakayama     FE_UPWARD | FE_TOWARDZERO)
7188e42b60Snakayama #define	_ROUND_SHIFT	30
7288e42b60Snakayama 
7388e42b60Snakayama __BEGIN_DECLS
7488e42b60Snakayama 
7588e42b60Snakayama /* Default floating-point environment */
7688e42b60Snakayama extern const fenv_t	__fe_dfl_env;
7788e42b60Snakayama #define	FE_DFL_ENV	(&__fe_dfl_env)
7888e42b60Snakayama 
7988e42b60Snakayama /* We need to be able to map status flag positions to mask flag positions */
8088e42b60Snakayama #define	_FPUSW_SHIFT	18
8188e42b60Snakayama #define	_ENABLE_MASK	(FE_ALL_EXCEPT << _FPUSW_SHIFT)
8288e42b60Snakayama 
8388e42b60Snakayama __END_DECLS
8488e42b60Snakayama 
8588e42b60Snakayama #endif	/* !_SPARC_FENV_H_ */
86