1*95e1ffb1Schristos /* $NetBSD: fdreg.h,v 1.10 2005/12/11 12:19:05 christos Exp $ */ 26d511104Spk 36d511104Spk /*- 46d511104Spk * Copyright (c) 1991 The Regents of the University of California. 56d511104Spk * All rights reserved. 66d511104Spk * 76d511104Spk * Redistribution and use in source and binary forms, with or without 86d511104Spk * modification, are permitted provided that the following conditions 96d511104Spk * are met: 106d511104Spk * 1. Redistributions of source code must retain the above copyright 116d511104Spk * notice, this list of conditions and the following disclaimer. 126d511104Spk * 2. Redistributions in binary form must reproduce the above copyright 136d511104Spk * notice, this list of conditions and the following disclaimer in the 146d511104Spk * documentation and/or other materials provided with the distribution. 15aad01611Sagc * 3. Neither the name of the University nor the names of its contributors 166d511104Spk * may be used to endorse or promote products derived from this software 176d511104Spk * without specific prior written permission. 186d511104Spk * 196d511104Spk * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 206d511104Spk * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 216d511104Spk * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 226d511104Spk * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 236d511104Spk * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 246d511104Spk * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 256d511104Spk * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 266d511104Spk * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 276d511104Spk * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 286d511104Spk * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 296d511104Spk * SUCH DAMAGE. 306d511104Spk * 316d511104Spk * @(#)fdreg.h 7.1 (Berkeley) 5/9/91 326d511104Spk */ 336d511104Spk 346d511104Spk /* 356d511104Spk * AT floppy controller registers and bitfields 366d511104Spk */ 376d511104Spk 386d511104Spk /* uses NEC765 controller */ 392b71eae2Scgd #include <dev/ic/nec765reg.h> 406d511104Spk 41725c6438Spk /* 42725c6438Spk * Register offsets for the 82077 controller. 43725c6438Spk */ 44725c6438Spk #define FDREG77_STATUSA 0 45725c6438Spk #define FDREG77_STATUSB 1 46725c6438Spk #define FDREG77_DOR 2 /* Digital Output Register (R/W) */ 47725c6438Spk #define FDREG77_TDR 3 /* Tape Control Register (R/W) */ 48725c6438Spk #define FDREG77_MSR 4 /* Main Status Register (R) */ 49725c6438Spk #define FDREG77_DRS 4 /* Data Rate Select Register (W) */ 50725c6438Spk #define FDREG77_FIFO 5 /* Data (FIFO) register (R/W) */ 51725c6438Spk #define FDREG77_DIR 7 /* Digital Input Register (R) */ 52725c6438Spk #define FDREG77_CCR 7 /* Configuration Control (W) */ 536d511104Spk 54725c6438Spk /* 55c7a9b61eSpk * Register offsets for the 82072 controller. 56725c6438Spk */ 57725c6438Spk #define FDREG72_MSR 0 /* Main Status Register (R) */ 58725c6438Spk #define FDREG72_DRS 0 /* Data Rate Select Register (W) */ 59725c6438Spk #define FDREG72_FIFO 1 /* Data (FIFO) register (R/W) */ 606d511104Spk 616d511104Spk 62e6e777cfSpk /* Data Select Register bits */ 63e6e777cfSpk #define DRS_RESET 0x80 64e6e777cfSpk #define DRS_POWER 0x40 65e6e777cfSpk #define DRS_PLL 0x20 666d511104Spk #define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */ 676d511104Spk #define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */ 686d511104Spk #define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */ 696d511104Spk #define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */ 706d511104Spk 71a05df4e2Spk /* Digital Output Register bits (modified on suns) */ 72a05df4e2Spk #define FDO_DS 0x01 /* floppy device select (neg) */ 73a05df4e2Spk #define FDO_FRST 0x04 /* floppy controller reset (neg) */ 74e6e777cfSpk #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */ 75a05df4e2Spk #define FDO_MOEN(n) ((1 << n) << 4) /* motor enable */ 76a05df4e2Spk #define FDO_DEN 0x40 /* Density select */ 77a05df4e2Spk #define FDO_EJ 0x80 /* Eject disk */ 78e6e777cfSpk 79c7a9b61eSpk /* Digital Input Register bits */ 806d511104Spk #define FDI_DCHG 0x80 /* diskette has been changed */ 816d511104Spk 826d511104Spk /* XXX - find a place for these... */ 836d511104Spk #define NE7CMD_CFG 0x13 846d511104Spk #define CFG_EIS 0x40 856d511104Spk #define CFG_EFIFO 0x20 866d511104Spk #define CFG_POLL 0x10 87e6e777cfSpk #define CFG_THRHLD_MASK 0x0f 886d511104Spk 896d511104Spk #define NE7CMD_LOCK 0x14 906d511104Spk #define CFG_LOCK 0x80 916d511104Spk 926d511104Spk #define NE7CMD_MOTOR 0x0b 936d511104Spk #define MOTOR_ON 0x80 946d511104Spk 956d511104Spk #define NE7CMD_DUMPREG 0x0e 966d511104Spk #define NE7CMD_VERSION 0x10 976d511104Spk 98e6e777cfSpk #define ST1_OVERRUN 0x10 99e6e777cfSpk 100a05df4e2Spk #define NE7_SPECIFY_NODMA 0x01 101