1*d02e022dStsutsui/* $NetBSD: iris_start.S,v 1.1 2019/01/12 16:44:47 tsutsui Exp $ */ 2*d02e022dStsutsui 3*d02e022dStsutsui/* 4*d02e022dStsutsui * Copyright (c) 2018 Naruaki Etomi 5*d02e022dStsutsui * All rights reserved. 6*d02e022dStsutsui * 7*d02e022dStsutsui * Redistribution and use in source and binary forms, with or without 8*d02e022dStsutsui * modification, are permitted provided that the following conditions 9*d02e022dStsutsui * are met: 10*d02e022dStsutsui * 1. Redistributions of source code must retain the above copyright 11*d02e022dStsutsui * notice, this list of conditions and the following disclaimer. 12*d02e022dStsutsui * 2. Redistributions in binary form must reproduce the above copyright 13*d02e022dStsutsui * notice, this list of conditions and the following disclaimer in the 14*d02e022dStsutsui * documentation and/or other materials provided with the distribution. 15*d02e022dStsutsui * 16*d02e022dStsutsui * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17*d02e022dStsutsui * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18*d02e022dStsutsui * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19*d02e022dStsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20*d02e022dStsutsui * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21*d02e022dStsutsui * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22*d02e022dStsutsui * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23*d02e022dStsutsui * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24*d02e022dStsutsui * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25*d02e022dStsutsui * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26*d02e022dStsutsui */ 27*d02e022dStsutsui 28*d02e022dStsutsui/* 29*d02e022dStsutsui * Silicon Graphics "IRIS" series MIPS processors machine bootloader. 30*d02e022dStsutsui */ 31*d02e022dStsutsui 32*d02e022dStsutsui#include <mips/asm.h> 33*d02e022dStsutsui#include <mips/cpuregs.h> 34*d02e022dStsutsui 35*d02e022dStsutsui .globl start 36*d02e022dStsutsuistart: 37*d02e022dStsutsui .set noreorder 38*d02e022dStsutsui#ifdef __GP_SUPPORT__ 39*d02e022dStsutsui la gp, _C_LABEL(_gp) 40*d02e022dStsutsui#endif 41*d02e022dStsutsui /* 42*d02e022dStsutsui * We assume the bootprom isn't expecting us to preserve the saved 43*d02e022dStsutsui * registers. 44*d02e022dStsutsui */ 45*d02e022dStsutsui move s0, a0 # save argc 46*d02e022dStsutsui move s1, a1 # save argv 47*d02e022dStsutsui move s2, a2 # save envp 48*d02e022dStsutsui move s3, ra # save RA 49*d02e022dStsutsui 50*d02e022dStsutsui la a0, _C_LABEL(edata) # clear BSS 51*d02e022dStsutsui move a1, zero 52*d02e022dStsutsui la a2, _C_LABEL(end) 53*d02e022dStsutsui jal _C_LABEL(memset) # memset(edata, 0, end - edata) 54*d02e022dStsutsui subu a2, a2, a0 55*d02e022dStsutsui 56*d02e022dStsutsui move a0, s0 # restore argc 57*d02e022dStsutsui move a1, s1 # restore argv 58*d02e022dStsutsui move a2, s2 # restore envp 59*d02e022dStsutsui j _C_LABEL(main) # main(argc, argv) 60*d02e022dStsutsui move ra, s3 # restore RA 61*d02e022dStsutsui 62*d02e022dStsutsuiLEAF(romrestart) 63*d02e022dStsutsuiXLEAF(_rtt) 64*d02e022dStsutsui PTR_LA v0, 0xBFC00000 # indigo RESET 65*d02e022dStsutsui j v0 66*d02e022dStsutsui nop 67*d02e022dStsutsuiEND(romrestart) 68