xref: /netbsd-src/sys/arch/sgimips/stand/common/iris_cons.h (revision d02e022db788ed4933c5904d9d6ce3af08f11fee)
1*d02e022dStsutsui /*	$NetBSD: iris_cons.h,v 1.1 2019/01/12 16:44:47 tsutsui Exp $	*/
2*d02e022dStsutsui 
3*d02e022dStsutsui /*
4*d02e022dStsutsui  * Copyright (c) 2018 Naruaki Etomi
5*d02e022dStsutsui  * All rights reserved.
6*d02e022dStsutsui  *
7*d02e022dStsutsui  * Redistribution and use in source and binary forms, with or without
8*d02e022dStsutsui  * modification, are permitted provided that the following conditions
9*d02e022dStsutsui  * are met:
10*d02e022dStsutsui  * 1. Redistributions of source code must retain the above copyright
11*d02e022dStsutsui  *    notice, this list of conditions and the following disclaimer.
12*d02e022dStsutsui  * 2. Redistributions in binary form must reproduce the above copyright
13*d02e022dStsutsui  *    notice, this list of conditions and the following disclaimer in the
14*d02e022dStsutsui  *    documentation and/or other materials provided with the distribution.
15*d02e022dStsutsui  *
16*d02e022dStsutsui  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17*d02e022dStsutsui  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18*d02e022dStsutsui  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19*d02e022dStsutsui  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20*d02e022dStsutsui  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21*d02e022dStsutsui  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22*d02e022dStsutsui  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23*d02e022dStsutsui  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24*d02e022dStsutsui  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25*d02e022dStsutsui  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26*d02e022dStsutsui  */
27*d02e022dStsutsui 
28*d02e022dStsutsui /*
29*d02e022dStsutsui  * Silicon Graphics "IRIS" series MIPS processors machine bootloader.
30*d02e022dStsutsui  */
31*d02e022dStsutsui 
32*d02e022dStsutsui struct consdev {
33*d02e022dStsutsui 	char	*cn_name;	/* console device name */
34*d02e022dStsutsui 	int	address;	/* address */
35*d02e022dStsutsui 	int	speed;		/* speed(serial only) */
36*d02e022dStsutsui 	void	(*cn_probe)	/* probe hardware and fill in consdev info */
37*d02e022dStsutsui 		    (struct consdev *);
38*d02e022dStsutsui 	void	(*cn_init)	/* turn on as console */
39*d02e022dStsutsui 		    (struct consdev *);
40*d02e022dStsutsui 	int	(*cn_getc)	/* getchar interface */
41*d02e022dStsutsui 		    (void *);
42*d02e022dStsutsui 	void	(*cn_putc)	/* putchar interface */
43*d02e022dStsutsui 		    (void *, int);
44*d02e022dStsutsui 	int	(*cn_scan)	/* scan interface */
45*d02e022dStsutsui 		    (void *);
46*d02e022dStsutsui 	int	cn_pri;		/* pecking order; the higher the better */
47*d02e022dStsutsui 	void	*cn_dev;	/* device data tag */
48*d02e022dStsutsui };
49*d02e022dStsutsui 
50*d02e022dStsutsui /* values for cn_pri - reflect our policy for console selection */
51*d02e022dStsutsui #define CN_DEAD		0	/* device doesn't exist */
52*d02e022dStsutsui #define CN_NORMAL	1	/* device exists but is nothing special */
53*d02e022dStsutsui #define CN_INTERNAL	2	/* "internal" bit-mapped display */
54*d02e022dStsutsui #define CN_REMOTE	3	/* serial interface with remote bit set */
55