1*96c9d84cSsimonb /* $NetBSD: swarm.h,v 1.2 2002/11/12 01:22:26 simonb Exp $ */ 2c08749f1Ssimonb 3c08749f1Ssimonb /* 4c08749f1Ssimonb * I/O Address assignments for the CSWARM board 5c08749f1Ssimonb * 6c08749f1Ssimonb * Summary of address map: 7c08749f1Ssimonb * 8c08749f1Ssimonb * Address Size CSel Description 9c08749f1Ssimonb * --------------- ---- ------ -------------------------------- 10c08749f1Ssimonb * 0x1FC00000 2MB CS0 Boot ROM 11c08749f1Ssimonb * 0x1F800000 2MB CS1 Alternate boot ROM 12c08749f1Ssimonb * CS2 Unused 13c08749f1Ssimonb * 0x100A0000 64KB CS3 LED display 14c08749f1Ssimonb * 0x100B0000 64KB CS4 IDE Disk 15c08749f1Ssimonb * CS5 Unused 16c08749f1Ssimonb * 0x11000000 64MB CS6 PCMCIA 17c08749f1Ssimonb * CS7 Unused 18c08749f1Ssimonb * 19c08749f1Ssimonb * GPIO assignments 20c08749f1Ssimonb * 21c08749f1Ssimonb * GPIO# Direction Description 22c08749f1Ssimonb * ------- --------- ------------------------------------------ 23c08749f1Ssimonb * GPIO0 Output Debug LED 24c08749f1Ssimonb * GPIO1 Output Sturgeon NMI 25c08749f1Ssimonb * GPIO2 Input PHY Interrupt (interrupt) 26c08749f1Ssimonb * GPIO3 Input Nonmaskable Interrupt (interrupt) 27c08749f1Ssimonb * GPIO4 Input IDE Disk Interrupt (interrupt) 28c08749f1Ssimonb * GPIO5 Input Temperature Sensor Alert (interrupt) 29c08749f1Ssimonb * GPIO6 N/A PCMCIA interface 30c08749f1Ssimonb * GPIO7 N/A PCMCIA interface 31c08749f1Ssimonb * GPIO8 N/A PCMCIA interface 32c08749f1Ssimonb * GPIO9 N/A PCMCIA interface 33c08749f1Ssimonb * GPIO10 N/A PCMCIA interface 34c08749f1Ssimonb * GPIO11 N/A PCMCIA interface 35c08749f1Ssimonb * GPIO12 N/A PCMCIA interface 36c08749f1Ssimonb * GPIO13 N/A PCMCIA interface 37c08749f1Ssimonb * GPIO14 N/A PCMCIA interface 38c08749f1Ssimonb * GPIO15 N/A PCMCIA interface 39c08749f1Ssimonb */ 40c08749f1Ssimonb 41c08749f1Ssimonb 42c08749f1Ssimonb /* GPIO pins */ 43c08749f1Ssimonb #define GPIO_DEBUG_LED 0 44c08749f1Ssimonb #define GPIO_STURGEON_NMI 1 45c08749f1Ssimonb #define GPIO_PHY_INTERRUPT 2 46c08749f1Ssimonb #define GPIO_NONMASKABLE_INT 3 47c08749f1Ssimonb #define GPIO_IDE_INTERRUPT 4 48c08749f1Ssimonb #define GPIO_TEMP_SENSOR_INT 5 49c08749f1Ssimonb 50c08749f1Ssimonb /* device addresses */ 51c08749f1Ssimonb #define SWARM_LEDS_PHYS 0x100a0000 52c08749f1Ssimonb #define SWARM_IDE_PHYS 0x100b0000 53c08749f1Ssimonb #define SWARM_PCMCIA_PHYS 0x11000000 54c08749f1Ssimonb 55c08749f1Ssimonb /* SMBus devices */ 56c08749f1Ssimonb #define TEMPSENSOR_SMBUS_CHAN 0 57c08749f1Ssimonb #define TEMPSENSOR_SMBUS_DEV 0x2A 58c08749f1Ssimonb 59c08749f1Ssimonb #define DRAM_SMBUS_CHAN 0 60c08749f1Ssimonb #define DRAM_SMBUS_DEV 0x54 61c08749f1Ssimonb 62c08749f1Ssimonb #define BIGEEPROM_SMBUS_CHAN 0 63c08749f1Ssimonb #define BIGEEPROM_SMBUS_DEV 0x50 64c08749f1Ssimonb 65*96c9d84cSsimonb #define BIGEEPROM_SMBUS_CHAN_1 1 /* rev 2.0 swarm only */ 66*96c9d84cSsimonb #define BIGEEPROM_SMBUS_DEV_1 0x51 67*96c9d84cSsimonb 68c08749f1Ssimonb #define CFG_DRAM_SMBUS_CHAN 0 69c08749f1Ssimonb #define CFG_DRAM_SMBUS_BASE 0x54 /* starting SMBus device base */ 70c08749f1Ssimonb 71*96c9d84cSsimonb #define X1241_SMBUS_CHAN 1 /* rev 1.0 swarm only, fixed slave address */ 72c08749f1Ssimonb 73*96c9d84cSsimonb #define M41T81_SMBUS_CHAN 1 /* rev 2.0 swarm only (or PCF8563), fixed slave address */ 74*96c9d84cSsimonb 75*96c9d84cSsimonb #define PCF8563_SMBUS_CHAN 1 /* rev 2.0 swarm only (or M41T81) */ 76*96c9d84cSsimonb #define PCF8563_SMBUS_DEV 0x50 77*96c9d84cSsimonb 78*96c9d84cSsimonb #define MAX1617A_SMBUS_CHAN 0 /* or MAX6654 on newer board, reg compatible */ 79*96c9d84cSsimonb #define MAX1617A_SMBUS_DEV 0x2a 80