xref: /netbsd-src/sys/arch/sandpoint/include/pci_machdep.h (revision e4a54b419380e8bfc795d2267f19740e07784a2f)
1*e4a54b41Snonaka /*	$NetBSD: pci_machdep.h,v 1.10 2016/10/19 00:08:42 nonaka Exp $	*/
2c8ef73b7Sbriggs 
3c8ef73b7Sbriggs /*
4c8ef73b7Sbriggs  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
5c8ef73b7Sbriggs  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
6c8ef73b7Sbriggs  *
7c8ef73b7Sbriggs  * Redistribution and use in source and binary forms, with or without
8c8ef73b7Sbriggs  * modification, are permitted provided that the following conditions
9c8ef73b7Sbriggs  * are met:
10c8ef73b7Sbriggs  * 1. Redistributions of source code must retain the above copyright
11c8ef73b7Sbriggs  *    notice, this list of conditions and the following disclaimer.
12c8ef73b7Sbriggs  * 2. Redistributions in binary form must reproduce the above copyright
13c8ef73b7Sbriggs  *    notice, this list of conditions and the following disclaimer in the
14c8ef73b7Sbriggs  *    documentation and/or other materials provided with the distribution.
15c8ef73b7Sbriggs  * 3. All advertising materials mentioning features or use of this software
16c8ef73b7Sbriggs  *    must display the following acknowledgement:
17c8ef73b7Sbriggs  *	This product includes software developed by Charles M. Hannum.
18c8ef73b7Sbriggs  * 4. The name of the author may not be used to endorse or promote products
19c8ef73b7Sbriggs  *    derived from this software without specific prior written permission.
20c8ef73b7Sbriggs  *
21c8ef73b7Sbriggs  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22c8ef73b7Sbriggs  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23c8ef73b7Sbriggs  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24c8ef73b7Sbriggs  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25c8ef73b7Sbriggs  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26c8ef73b7Sbriggs  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27c8ef73b7Sbriggs  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28c8ef73b7Sbriggs  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29c8ef73b7Sbriggs  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30c8ef73b7Sbriggs  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31c8ef73b7Sbriggs  */
32c8ef73b7Sbriggs 
33c8ef73b7Sbriggs /*
34c8ef73b7Sbriggs  * Machine-specific definitions for PCI autoconfiguration.
35c8ef73b7Sbriggs  */
36c8ef73b7Sbriggs 
37d974db0aSgarbled #define	__HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
38*e4a54b41Snonaka #define	__HAVE_PCI_MSI_MSIX
39d974db0aSgarbled 
40c8ef73b7Sbriggs /*
41c8ef73b7Sbriggs  * be-specific PCI structure and type definitions.
42c8ef73b7Sbriggs  * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE.
43c8ef73b7Sbriggs  *
44c8ef73b7Sbriggs  * Configuration tag; created from a {bus,device,function} triplet by
45c8ef73b7Sbriggs  * pci_make_tag(), and passed to pci_conf_read() and pci_conf_write().
46c8ef73b7Sbriggs  * We could instead always pass the {bus,device,function} triplet to
47c8ef73b7Sbriggs  * the read and write routines, but this would cause extra overhead.
48c8ef73b7Sbriggs  */
49c8ef73b7Sbriggs 
50c8ef73b7Sbriggs struct pci_attach_args;	/* Forward declaration */
51c8ef73b7Sbriggs 
52c8ef73b7Sbriggs /*
53c8ef73b7Sbriggs  * Types provided to machine-independent PCI code
54c8ef73b7Sbriggs  */
55c8ef73b7Sbriggs typedef void *pci_chipset_tag_t;
56c8ef73b7Sbriggs typedef int pcitag_t;
57c8ef73b7Sbriggs typedef int pci_intr_handle_t;
58b1db1fbaSbriggs extern struct powerpc_bus_dma_tag pci_bus_dma_tag;
59c8ef73b7Sbriggs 
60*e4a54b41Snonaka typedef enum {
61*e4a54b41Snonaka 	PCI_INTR_TYPE_INTX = 0,
62*e4a54b41Snonaka 	PCI_INTR_TYPE_MSI,
63*e4a54b41Snonaka 	PCI_INTR_TYPE_MSIX,
64*e4a54b41Snonaka 	PCI_INTR_TYPE_SIZE,
65*e4a54b41Snonaka } pci_intr_type_t;
66*e4a54b41Snonaka 
67c8ef73b7Sbriggs /*
68c8ef73b7Sbriggs  * Functions provided to machine-independent PCI code.
69c8ef73b7Sbriggs  */
7005b09539Smatt void		pci_attach_hook(device_t, device_t,
71c8ef73b7Sbriggs 		    struct pcibus_attach_args *);
72c8ef73b7Sbriggs int		pci_bus_maxdevs(pci_chipset_tag_t, int);
73c8ef73b7Sbriggs pcitag_t	pci_make_tag(pci_chipset_tag_t, int, int, int);
74c8ef73b7Sbriggs void		pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
75c8ef73b7Sbriggs 		    int *, int *, int *);
76c8ef73b7Sbriggs pcireg_t	pci_conf_read(pci_chipset_tag_t, pcitag_t, int);
77c8ef73b7Sbriggs void		pci_conf_write(pci_chipset_tag_t, pcitag_t, int,
78c8ef73b7Sbriggs 		    pcireg_t);
79d3e53912Sdyoung int		pci_intr_map(const struct pci_attach_args *,
80d3e53912Sdyoung 		    pci_intr_handle_t *);
81e58a356cSchristos const char	*pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t,
82e58a356cSchristos 		    char *, size_t);
83c8ef73b7Sbriggs const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t);
84c8ef73b7Sbriggs void		*pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t,
85c8ef73b7Sbriggs 		    int, int (*)(void *), void *);
86*e4a54b41Snonaka void		*pci_intr_establish_xname(pci_chipset_tag_t, pci_intr_handle_t,
87*e4a54b41Snonaka 		    int, int (*)(void *), void *, const char *);
88c8ef73b7Sbriggs void		pci_intr_disestablish(pci_chipset_tag_t, void *);
89*e4a54b41Snonaka 
90*e4a54b41Snonaka pci_intr_type_t	pci_intr_type(pci_chipset_tag_t, pci_intr_handle_t);
91*e4a54b41Snonaka int		pci_intr_alloc(const struct pci_attach_args *,
92*e4a54b41Snonaka 		    pci_intr_handle_t **, int *, pci_intr_type_t);
93*e4a54b41Snonaka void		pci_intr_release(pci_chipset_tag_t, pci_intr_handle_t *, int);
94*e4a54b41Snonaka int		pci_intx_alloc(const struct pci_attach_args *,
95*e4a54b41Snonaka 		    pci_intr_handle_t **);
96*e4a54b41Snonaka 
97*e4a54b41Snonaka /* experimental MSI support */
98*e4a54b41Snonaka int		pci_msi_alloc(const struct pci_attach_args *,
99*e4a54b41Snonaka 		    pci_intr_handle_t **, int *);
100*e4a54b41Snonaka int		pci_msi_alloc_exact(const struct pci_attach_args *,
101*e4a54b41Snonaka 		    pci_intr_handle_t **, int);
102*e4a54b41Snonaka 
103*e4a54b41Snonaka /* experimental MSI-X support */
104*e4a54b41Snonaka int		pci_msix_alloc(const struct pci_attach_args *,
105*e4a54b41Snonaka 		    pci_intr_handle_t **, int *);
106*e4a54b41Snonaka int		pci_msix_alloc_exact(const struct pci_attach_args *,
107*e4a54b41Snonaka 		    pci_intr_handle_t **, int);
108*e4a54b41Snonaka int		pci_msix_alloc_map(const struct pci_attach_args *,
109*e4a54b41Snonaka 		    pci_intr_handle_t **, u_int *, int);
110*e4a54b41Snonaka 
111*e4a54b41Snonaka void		pci_conf_interrupt(pci_chipset_tag_t, int, int, int,
112*e4a54b41Snonaka 		    int, int *);
113*e4a54b41Snonaka int		pci_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t);
114