1*73ce3dc0Sskrll# $NetBSD: files.sifive,v 1.3 2024/01/13 17:01:58 skrll Exp $ 2644d8f85Sjmcneill# 3644d8f85Sjmcneill# Configuration info for SiFive SoCs 4644d8f85Sjmcneill# 5644d8f85Sjmcneill# 6644d8f85Sjmcneill 7644d8f85Sjmcneill# FU540 Power Reset Clocking Interrupt (PRCI) subsystem 8644d8f85Sjmcneilldevice prci 9644d8f85Sjmcneillattach prci at fdt with fu540_prci 10644d8f85Sjmcneillfile arch/riscv/sifive/fu540_prci.c fu540_prci 11*73ce3dc0Sskrll 12*73ce3dc0Sskrll# FU540 Level 2 Cache controller 13*73ce3dc0Sskrlldevice ccache: fdt 14*73ce3dc0Sskrllattach ccache at fdt with fu540_ccache 15*73ce3dc0Sskrllfile arch/riscv/sifive/fu540_ccache.c fu540_ccache 16