1*08c3a075Sskrll /* $NetBSD: riscv_platform.c,v 1.2 2023/06/12 19:04:13 skrll Exp $ */
275b842b8Sskrll
375b842b8Sskrll /*-
475b842b8Sskrll * Copyright (c) 2023 The NetBSD Foundation, Inc.
575b842b8Sskrll * All rights reserved.
675b842b8Sskrll *
775b842b8Sskrll * This code is derived from software contributed to The NetBSD Foundation
875b842b8Sskrll * by Nick Hudson
975b842b8Sskrll *
1075b842b8Sskrll * Redistribution and use in source and binary forms, with or without
1175b842b8Sskrll * modification, are permitted provided that the following conditions
1275b842b8Sskrll * are met:
1375b842b8Sskrll * 1. Redistributions of source code must retain the above copyright
1475b842b8Sskrll * notice, this list of conditions and the following disclaimer.
1575b842b8Sskrll * 2. Redistributions in binary form must reproduce the above copyright
1675b842b8Sskrll * notice, this list of conditions and the following disclaimer in the
1775b842b8Sskrll * documentation and/or other materials provided with the distribution.
1875b842b8Sskrll *
1975b842b8Sskrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2075b842b8Sskrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2175b842b8Sskrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2275b842b8Sskrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2375b842b8Sskrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2475b842b8Sskrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2575b842b8Sskrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2675b842b8Sskrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2775b842b8Sskrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2875b842b8Sskrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2975b842b8Sskrll * POSSIBILITY OF SUCH DAMAGE.
3075b842b8Sskrll */
3175b842b8Sskrll
3275b842b8Sskrll /*
3375b842b8Sskrll * This is the default RISC-V FDT platform implementation. It assumes the
3475b842b8Sskrll * following:
3575b842b8Sskrll *
3675b842b8Sskrll * - Console UART is pre-configured by firmware
3775b842b8Sskrll */
3875b842b8Sskrll
3975b842b8Sskrll #include <sys/cdefs.h>
40*08c3a075Sskrll __KERNEL_RCSID(0, "$NetBSD: riscv_platform.c,v 1.2 2023/06/12 19:04:13 skrll Exp $");
4175b842b8Sskrll
4275b842b8Sskrll #include <sys/param.h>
4375b842b8Sskrll #include <sys/bus.h>
4475b842b8Sskrll
4575b842b8Sskrll #include <dev/fdt/fdtvar.h>
4675b842b8Sskrll
4775b842b8Sskrll #include <uvm/uvm_extern.h>
4875b842b8Sskrll #include <uvm/pmap/pmap_devmap.h>
4975b842b8Sskrll
50*08c3a075Sskrll #include <riscv/fdt/riscv_fdtvar.h>
5175b842b8Sskrll
5275b842b8Sskrll static const struct pmap_devmap *
riscv_platform_devmap(void)5375b842b8Sskrll riscv_platform_devmap(void)
5475b842b8Sskrll {
5575b842b8Sskrll static const struct pmap_devmap devmap_empty[] = {
5675b842b8Sskrll DEVMAP_ENTRY_END
5775b842b8Sskrll };
5875b842b8Sskrll
5975b842b8Sskrll static struct pmap_devmap devmap_uart[] = {
6075b842b8Sskrll DEVMAP_ENTRY(VM_KERNEL_IO_BASE, 0, PAGE_SIZE),
6175b842b8Sskrll DEVMAP_ENTRY_END
6275b842b8Sskrll };
6375b842b8Sskrll bus_addr_t uart_base;
6475b842b8Sskrll
6575b842b8Sskrll const int phandle = fdtbus_get_stdout_phandle();
6675b842b8Sskrll if (phandle <= 0)
6775b842b8Sskrll return devmap_empty;
6875b842b8Sskrll
6975b842b8Sskrll if (fdtbus_get_reg(phandle, 0, &uart_base, NULL) != 0)
7075b842b8Sskrll return devmap_empty;
7175b842b8Sskrll
7275b842b8Sskrll devmap_uart[0].pd_pa = DEVMAP_ALIGN(uart_base);
7375b842b8Sskrll
7475b842b8Sskrll return devmap_uart;
7575b842b8Sskrll }
7675b842b8Sskrll
7775b842b8Sskrll
7875b842b8Sskrll static u_int
riscv_platform_uart_freq(void)7975b842b8Sskrll riscv_platform_uart_freq(void)
8075b842b8Sskrll {
8175b842b8Sskrll return 0;
8275b842b8Sskrll }
8375b842b8Sskrll
8475b842b8Sskrll static const struct fdt_platform riscv_platform = {
8575b842b8Sskrll .fp_devmap = riscv_platform_devmap,
86*08c3a075Sskrll .fp_bootstrap = riscv_fdt_cpu_bootstrap,
8775b842b8Sskrll .fp_uart_freq = riscv_platform_uart_freq,
88*08c3a075Sskrll .fp_mpstart = riscv_fdt_cpu_mpstart,
8975b842b8Sskrll };
9075b842b8Sskrll
9175b842b8Sskrll FDT_PLATFORM(rv, FDT_PLATFORM_DEFAULT, &riscv_platform);
92