xref: /netbsd-src/sys/arch/riscv/fdt/riscv_fdtvar.h (revision f801e0a3ea5e07f9ffe215c2f37620b6448d0ca0)
1*f801e0a3Sskrll /* $NetBSD: riscv_fdtvar.h,v 1.2 2024/01/01 13:51:56 skrll Exp $ */
208c3a075Sskrll 
308c3a075Sskrll /*-
408c3a075Sskrll  * Copyright (c) 2023 The NetBSD Foundation, Inc.
508c3a075Sskrll  * All rights reserved.
608c3a075Sskrll  *
708c3a075Sskrll  * This code is derived from software contributed to The NetBSD Foundation
808c3a075Sskrll  * by Nick Hudson
908c3a075Sskrll  *
1008c3a075Sskrll  * Redistribution and use in source and binary forms, with or without
1108c3a075Sskrll  * modification, are permitted provided that the following conditions
1208c3a075Sskrll  * are met:
1308c3a075Sskrll  * 1. Redistributions of source code must retain the above copyright
1408c3a075Sskrll  *    notice, this list of conditions and the following disclaimer.
1508c3a075Sskrll  * 2. Redistributions in binary form must reproduce the above copyright
1608c3a075Sskrll  *    notice, this list of conditions and the following disclaimer in the
1708c3a075Sskrll  *    documentation and/or other materials provided with the distribution.
1808c3a075Sskrll  *
1908c3a075Sskrll  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2008c3a075Sskrll  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2108c3a075Sskrll  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2208c3a075Sskrll  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2308c3a075Sskrll  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2408c3a075Sskrll  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2508c3a075Sskrll  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2608c3a075Sskrll  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2708c3a075Sskrll  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2808c3a075Sskrll  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2908c3a075Sskrll  * POSSIBILITY OF SUCH DAMAGE.
3008c3a075Sskrll  */
3108c3a075Sskrll 
3208c3a075Sskrll 
3308c3a075Sskrll #ifndef _RISCV_RISCV_FDTVAR_H
3408c3a075Sskrll #define _RISCV_RISCV_FDTVAR_H
3508c3a075Sskrll 
36*f801e0a3Sskrll bool	riscv_fdt_cpu_okay(const int);
3708c3a075Sskrll void	riscv_fdt_cpu_bootstrap(void);
3808c3a075Sskrll int	riscv_fdt_cpu_mpstart(void);
3908c3a075Sskrll void	riscv_fdt_cpu_hatch_register(void *, void (*)(void *, struct cpu_info *));
4008c3a075Sskrll void	riscv_fdt_cpu_hatch(struct cpu_info *);
4108c3a075Sskrll 
4208c3a075Sskrll #endif /* !_RISCV_RISCV_FDTVAR_H */
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