xref: /netbsd-src/sys/arch/prep/include/chpidpnp.h (revision ce099b40997c43048fb78bd578195f81d2456523)
1*ce099b40Smartin /* $NetBSD: chpidpnp.h,v 1.4 2008/04/28 20:23:33 martin Exp $ */
26a298274Sgarbled /*-
36a298274Sgarbled  * Copyright (c) 2006 The NetBSD Foundation, Inc.
46a298274Sgarbled  * All rights reserved.
56a298274Sgarbled  *
66a298274Sgarbled  * This code is derived from software contributed to The NetBSD Foundation
76a298274Sgarbled  * by Tim Rightnour
86a298274Sgarbled  *
96a298274Sgarbled  * Redistribution and use in source and binary forms, with or without
106a298274Sgarbled  * modification, are permitted provided that the following conditions
116a298274Sgarbled  * are met:
126a298274Sgarbled  * 1. Redistributions of source code must retain the above copyright
136a298274Sgarbled  *    notice, this list of conditions and the following disclaimer.
146a298274Sgarbled  * 2. Redistributions in binary form must reproduce the above copyright
156a298274Sgarbled  *    notice, this list of conditions and the following disclaimer in the
166a298274Sgarbled  *    documentation and/or other materials provided with the distribution.
176a298274Sgarbled  *
186a298274Sgarbled  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
196a298274Sgarbled  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
206a298274Sgarbled  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
216a298274Sgarbled  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
226a298274Sgarbled  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
236a298274Sgarbled  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
246a298274Sgarbled  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
256a298274Sgarbled  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
266a298274Sgarbled  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
276a298274Sgarbled  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
286a298274Sgarbled  * POSSIBILITY OF SUCH DAMAGE.
296a298274Sgarbled  */
306a298274Sgarbled 
316a298274Sgarbled /*
326a298274Sgarbled  * Based on:
336a298274Sgarbled  * IBM Power Personal Systems Architecture: Residual Data
346a298274Sgarbled  * Document Number: PPS-AR-FW0001 Rev 0.5  April 3, 1996
356a298274Sgarbled  */
366a298274Sgarbled 
376a298274Sgarbled #ifndef _CHPIDPNP_H_
386a298274Sgarbled #define _CHPIDPNP_H_
396a298274Sgarbled 
406a298274Sgarbled #define ChipID_Packet	0x70	/* tag for ChipIdPack without size */
416a298274Sgarbled 
4217ca05a7Sgarbled /* the words MOT and IBM are made from these two bytes */
4317ca05a7Sgarbled #define CHIP_VENDOR_IBM0	0x24
4417ca05a7Sgarbled #define CHIP_VENDOR_IBM1	0x4d
4517ca05a7Sgarbled #define CHIP_VENDOR_MOT0	0x35
4617ca05a7Sgarbled #define CHIP_VENDOR_MOT1	0xf4
4717ca05a7Sgarbled 
486a298274Sgarbled /*
496a298274Sgarbled  * The chipid is the vendor id followed by 4 hex digits, e.g. for IBM
506a298274Sgarbled  * platforms: Chip_ID=IBMxxxx.  To avoid confusion with PnP Device IDs, IBM
516a298274Sgarbled  * Chip IDs will begin at 0x8000.
526a298274Sgarbled  */
536a298274Sgarbled typedef enum _Chip_Type {
546a298274Sgarbled 	Chip_MemCont = 0,
556a298274Sgarbled 	Chip_ISABridge = 1,
566a298274Sgarbled 	Chip_PCIBridge = 2,
576a298274Sgarbled 	Chip_PCMCIABridge = 3,
586a298274Sgarbled 	Chip_EISABridge = 4,
596a298274Sgarbled 	Chip_MCABridge = 5,
606a298274Sgarbled 	Chip_L2Cache = 6,
616a298274Sgarbled 	Chip_PM = 7,
626a298274Sgarbled 	Chip_IntrCont = 8,
636a298274Sgarbled 	Chip_MiscPlanar = 9,
646a298274Sgarbled } Chip_Type;
656a298274Sgarbled 
666a298274Sgarbled typedef enum _Chip_ID {
676a298274Sgarbled 
686a298274Sgarbled /* Memory Controllers		Memory Controller range: IBM80xx */
696a298274Sgarbled Dakota = 0x8001,		/* IBM8001: IBM North/South Dakota */
706a298274Sgarbled Idaho = 0x8002,			/* IBM8002: IBM Idaho */
716a298274Sgarbled Eagle = 0x8003,			/* IBM8003: Motorola Eagle */
726a298274Sgarbled Kauai_Lanai = 0x8004,		/* IBM8004: IBM Kauai/Lanai */
736a298274Sgarbled Montana_Nevada = 0x8005,	/* IBM8005: IBM Montana/Nevada */
746a298274Sgarbled Union = 0x8006,			/* IBM8006: IBM Union */
756a298274Sgarbled Cobra_Viper = 0x8007,		/* IBM8007: IBM Cobra/Viper */
766a298274Sgarbled Grackle = 0x8008,		/* IBM8008: Motorola Grackle */
776a298274Sgarbled 
786a298274Sgarbled /* ISA Bridge chips		Bus Bridge Range: IBM81xx */
796a298274Sgarbled SIO_ZB = 0x8100,		/* IBM8100: Intel 82378ZB */
806a298274Sgarbled FireCoral = 0x8101,		/* IBM8101: IBM FireCoral */
816a298274Sgarbled 
826a298274Sgarbled /* PCI Bridge chips */
836a298274Sgarbled Python = 0x8102,		/* IBM8102: IBM Python */
84d974db0aSgarbled DEC21050 = 0x8103,		/* IBM8103: PCI-PCI (dec 21050) */
856a298274Sgarbled IBM2782351 = 0x8106,		/* IBM8106: PCI-PCI */
866a298274Sgarbled IBM2782352 = 0x8109,		/* IBM8109: PCI-PCI352 */
876a298274Sgarbled 
886a298274Sgarbled /* PCMCIA Bridge Chips */
896a298274Sgarbled INTEL_8236SL = 0x8104,		/* IBM8104: Intel 8236SL */
906a298274Sgarbled RICOH_RF5C366C = 0x8105,	/* IBM8105: RICOH RF5C366C */
916a298274Sgarbled 
926a298274Sgarbled /* EISA Bridge Chips */
936a298274Sgarbled INTEL_82374 = 0x8108,		/* IBM8108: Intel 82374/82375 */
946a298274Sgarbled 
956a298274Sgarbled /* MCA Bridge Chips */
966a298274Sgarbled MCACoral = 0x8107,		/* IBM8107: 6xxxMx - T=1 MCA (servers) */
976a298274Sgarbled 
986a298274Sgarbled /* L2 Cache controller		L2 Controller Range: IBM82xx */
996a298274Sgarbled Cheyenne = 0x8200,		/* IBM8200: IBM Cheyenne */
1006a298274Sgarbled IDT = 0x8201,			/* IBM8201: IDT */
1016a298274Sgarbled Sony1PB = 0x8202,		/* IBM8202: Sony1PB */
1026a298274Sgarbled Mamba = 0x8203,			/* IBM8203: IBM Mamba */
1036a298274Sgarbled Alaska = 0x8204,		/* IBM8204: IBM Alaska */
1046a298274Sgarbled Glance = 0x8205,		/* IBM8205: IBM Glance */
1056a298274Sgarbled Ocelot = 0x8206,		/* IBM8206: IBM Ocelot */
1066a298274Sgarbled 
1076a298274Sgarbled /* Power management chips	PM Range: IBM83xx */
1086a298274Sgarbled Carrera = 0x8300,		/* IBM8300: IBM Carrera */
1096a298274Sgarbled Sig750 = 0x8301,		/* IBM8301: Signetics 87C750 */
1106a298274Sgarbled 
1116a298274Sgarbled /* Interrupt controller chips	PIC Chip range: IBM84xx */
1126a298274Sgarbled MPIC_2 = 0x8400,		/* IBM8400: IBM MPIC-2 */
1136a298274Sgarbled 
1146a298274Sgarbled /* Miscellaneous Planar chips	MISC Chip Range: IBM8Fxx */
1156a298274Sgarbled DallasRTC = 0x8F00,		/* IBM8F00: Dallas 1385 compatible */
1166a298274Sgarbled Dallas1585 = 0x8F01,		/* IBM8F01: Dallas 1585 compatible */
1176a298274Sgarbled Timer8254 = 0x8F10,		/* IBM8F10: 8254-compatible timer */
1186a298274Sgarbled HarddiskLt = 0x8FF0,		/* IBM8FF0: Op Panel HD light */
11917ca05a7Sgarbled MOTmk48 = 0x3040,		/* MOT3040: mk48txx compatible */
1206a298274Sgarbled } Chip_ID;
1216a298274Sgarbled 
1226a298274Sgarbled /* small tag = 0x7n with n bytes.  Type == 1 for ChipID
1236a298274Sgarbled  * VendorID0:
1246a298274Sgarbled  *  bit(7) = 0
1256a298274Sgarbled  *  bits(6:2) 1st character in compressed ASCII
1266a298274Sgarbled  *  bits(1:0) 2nd character in compressed ASCII bits(4:3)
1276a298274Sgarbled  * VendorID1:
1286a298274Sgarbled  *  bits(7:5) 2nd character in compressed ASCII bits(2:0)
1296a298274Sgarbled  *  bits(4:0) 3rd character in compressed ASCII
1306a298274Sgarbled  * Name:
1316a298274Sgarbled  * Example: IBM8001
1326a298274Sgarbled  *  I,B,M = 01001, 00010, 01101
1336a298274Sgarbled  *  bytes 0,1 = 00100100,01001101
1346a298274Sgarbled  *            =   2   4    4   D
1356a298274Sgarbled  * byte0 = 24  byte1 = 4D byte2 = 01 byte3 = 80
1366a298274Sgarbled  */
1376a298274Sgarbled typedef struct _ChipIDPack {
1386a298274Sgarbled 	unsigned char Tag;
1396a298274Sgarbled 	unsigned char Type;
1406a298274Sgarbled 	unsigned char VendorID0;
1416a298274Sgarbled 	unsigned char VendorID1;
1426a298274Sgarbled 	unsigned char Name[2];
1436a298274Sgarbled } ChipIDPack;
1446a298274Sgarbled 
1456a298274Sgarbled #endif /* _CHPIDPNP_H_ */
146