xref: /netbsd-src/sys/arch/powerpc/pci/pci_machdep_common.c (revision 6012d766dc07090f616a14e6ea0d73e545800e78)
1*6012d766Sandvar /* $NetBSD: pci_machdep_common.c,v 1.25 2021/12/08 20:50:02 andvar Exp $ */
2d974db0aSgarbled 
3d974db0aSgarbled /*-
4d974db0aSgarbled  * Copyright (c) 2007 The NetBSD Foundation, Inc.
5d974db0aSgarbled  * All rights reserved.
6d974db0aSgarbled  *
7d974db0aSgarbled  * This code is derived from software contributed to The NetBSD Foundation
8d974db0aSgarbled  * by Tim Rightnour
9d974db0aSgarbled  *
10d974db0aSgarbled  * Redistribution and use in source and binary forms, with or without
11d974db0aSgarbled  * modification, are permitted provided that the following conditions
12d974db0aSgarbled  * are met:
13d974db0aSgarbled  * 1. Redistributions of source code must retain the above copyright
14d974db0aSgarbled  *    notice, this list of conditions and the following disclaimer.
15d974db0aSgarbled  * 2. Redistributions in binary form must reproduce the above copyright
16d974db0aSgarbled  *    notice, this list of conditions and the following disclaimer in the
17d974db0aSgarbled  *    documentation and/or other materials provided with the distribution.
18d974db0aSgarbled  *
19d974db0aSgarbled  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20d974db0aSgarbled  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21d974db0aSgarbled  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22d974db0aSgarbled  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23d974db0aSgarbled  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24d974db0aSgarbled  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25d974db0aSgarbled  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26d974db0aSgarbled  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27d974db0aSgarbled  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28d974db0aSgarbled  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29d974db0aSgarbled  * POSSIBILITY OF SUCH DAMAGE.
30d974db0aSgarbled  */
31d974db0aSgarbled 
32d974db0aSgarbled /*
33d974db0aSgarbled  * Generic PowerPC functions for dealing with a PCI bridge.  For most cases,
34d974db0aSgarbled  * these functions will work just fine, however, some machines may need
35*6012d766Sandvar  * specialized code, so those ports are free to write their own functions
36d974db0aSgarbled  * and call those instead where appropriate.
37d974db0aSgarbled  */
38d974db0aSgarbled 
391fd2c684Smatt #define _POWERPC_BUS_DMA_PRIVATE
40d974db0aSgarbled 
4116031f7dSrin #include <sys/cdefs.h>
42*6012d766Sandvar __KERNEL_RCSID(0, "$NetBSD: pci_machdep_common.c,v 1.25 2021/12/08 20:50:02 andvar Exp $");
4316031f7dSrin 
44d974db0aSgarbled #include <sys/param.h>
45dd2488a8Smatt #include <sys/bus.h>
46dd2488a8Smatt #include <sys/device.h>
47d974db0aSgarbled #include <sys/errno.h>
48d974db0aSgarbled #include <sys/extent.h>
491fd2c684Smatt #include <sys/intr.h>
50e4a54b41Snonaka #include <sys/kmem.h>
51dd2488a8Smatt #include <sys/systm.h>
52dd2488a8Smatt #include <sys/time.h>
53d974db0aSgarbled 
54d974db0aSgarbled #include <uvm/uvm_extern.h>
55d974db0aSgarbled 
56d974db0aSgarbled #include <dev/pci/pcivar.h>
57d974db0aSgarbled #include <dev/pci/pcireg.h>
58d974db0aSgarbled #include <dev/pci/pcidevs.h>
59d974db0aSgarbled #include <dev/pci/pciconf.h>
60d2a9b2ffSphx #include <dev/pci/pciidereg.h>
61d974db0aSgarbled 
62d974db0aSgarbled /*
63d974db0aSgarbled  * PCI doesn't have any special needs; just use the generic versions
64d974db0aSgarbled  * of these functions.
65d974db0aSgarbled  */
66d974db0aSgarbled struct powerpc_bus_dma_tag pci_bus_dma_tag = {
677f6d9a71Smatt 	._dmamap_create = _bus_dmamap_create,
687f6d9a71Smatt 	._dmamap_destroy = _bus_dmamap_destroy,
697f6d9a71Smatt 	._dmamap_load = _bus_dmamap_load,
707f6d9a71Smatt 	._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
717f6d9a71Smatt 	._dmamap_load_uio = _bus_dmamap_load_uio,
727f6d9a71Smatt 	._dmamap_load_raw = _bus_dmamap_load_raw,
737f6d9a71Smatt 	._dmamap_unload = _bus_dmamap_unload,
747f6d9a71Smatt 
757f6d9a71Smatt 	._dmamem_alloc = _bus_dmamem_alloc,
767f6d9a71Smatt 	._dmamem_free = _bus_dmamem_free,
777f6d9a71Smatt 	._dmamem_map = _bus_dmamem_map,
787f6d9a71Smatt 	._dmamem_unmap = _bus_dmamem_unmap,
797f6d9a71Smatt 	._dmamem_mmap = _bus_dmamem_mmap,
80d974db0aSgarbled };
817500033fSmacallan 
82d974db0aSgarbled int
genppc_pci_bus_maxdevs(void * v,int busno)834f2934afSmatt genppc_pci_bus_maxdevs(void *v, int busno)
84d974db0aSgarbled {
85d974db0aSgarbled 	return 32;
86d974db0aSgarbled }
87d974db0aSgarbled 
88d974db0aSgarbled const char *
genppc_pci_intr_string(void * v,pci_intr_handle_t ih,char * buf,size_t len)89e58a356cSchristos genppc_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len)
90d974db0aSgarbled {
91dd2488a8Smatt #ifdef ICU_LEN
927580a083Smacallan 	if (ih >= ICU_LEN
93d974db0aSgarbled /* XXX on macppc it's completely legal to have PCI interrupts on a slave PIC */
94d974db0aSgarbled #ifdef IRQ_SLAVE
95d974db0aSgarbled 	    || ih == IRQ_SLAVE
96d974db0aSgarbled #endif
97d974db0aSgarbled 	    )
98d974db0aSgarbled 		panic("pci_intr_string: bogus handle 0x%x", ih);
99dd2488a8Smatt #endif
100d974db0aSgarbled 
101e58a356cSchristos 	snprintf(buf, len, "irq %d", ih);
102e58a356cSchristos 	return buf;
103d974db0aSgarbled 
104d974db0aSgarbled }
105d974db0aSgarbled 
106d974db0aSgarbled const struct evcnt *
genppc_pci_intr_evcnt(void * v,pci_intr_handle_t ih)107d974db0aSgarbled genppc_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
108d974db0aSgarbled {
109d974db0aSgarbled 
110d974db0aSgarbled 	/* XXX for now, no evcnt parent reported */
111d974db0aSgarbled 	return NULL;
112d974db0aSgarbled }
113d974db0aSgarbled 
114d974db0aSgarbled void *
genppc_pci_intr_establish(void * v,pci_intr_handle_t ih,int level,int (* func)(void *),void * arg,const char * xname)115d974db0aSgarbled genppc_pci_intr_establish(void *v, pci_intr_handle_t ih, int level,
116e4a54b41Snonaka     int (*func)(void *), void *arg, const char *xname)
117d974db0aSgarbled {
118d974db0aSgarbled 
119dd2488a8Smatt #ifdef ICU_LEN
1207580a083Smacallan 	if (ih >= ICU_LEN
121d974db0aSgarbled #ifdef IRQ_SLAVE
122d974db0aSgarbled 	    || ih == IRQ_SLAVE
123d974db0aSgarbled #endif
124d974db0aSgarbled 	    )
125d974db0aSgarbled 		panic("pci_intr_establish: bogus handle 0x%x", ih);
126dd2488a8Smatt #endif
127d974db0aSgarbled 
128e4a54b41Snonaka 	return intr_establish_xname(ih, IST_LEVEL, level, func, arg, xname);
129d974db0aSgarbled }
130d974db0aSgarbled 
131d974db0aSgarbled void
genppc_pci_intr_disestablish(void * v,void * cookie)132d974db0aSgarbled genppc_pci_intr_disestablish(void *v, void *cookie)
133d974db0aSgarbled {
134d974db0aSgarbled 
135d974db0aSgarbled 	intr_disestablish(cookie);
136d974db0aSgarbled }
137d974db0aSgarbled 
138dd2488a8Smatt int
genppc_pci_intr_setattr(void * v,pci_intr_handle_t * ihp,int attr,uint64_t data)139dd2488a8Smatt genppc_pci_intr_setattr(void *v, pci_intr_handle_t *ihp, int attr,
140dd2488a8Smatt     uint64_t data)
141dd2488a8Smatt {
142dd2488a8Smatt 
143dd2488a8Smatt 	return ENODEV;
144dd2488a8Smatt }
145dd2488a8Smatt 
146e4a54b41Snonaka pci_intr_type_t
genppc_pci_intr_type(void * v,pci_intr_handle_t ih)147e4a54b41Snonaka genppc_pci_intr_type(void *v, pci_intr_handle_t ih)
148e4a54b41Snonaka {
149e4a54b41Snonaka 
150e4a54b41Snonaka 	return PCI_INTR_TYPE_INTX;
151e4a54b41Snonaka }
152e4a54b41Snonaka 
153e4a54b41Snonaka int
genppc_pci_intr_alloc(const struct pci_attach_args * pa,pci_intr_handle_t ** ihps,int * counts,pci_intr_type_t max_type)154e4a54b41Snonaka genppc_pci_intr_alloc(const struct pci_attach_args *pa,
155e4a54b41Snonaka     pci_intr_handle_t **ihps, int *counts, pci_intr_type_t max_type)
156e4a54b41Snonaka {
157e4a54b41Snonaka 	pci_intr_handle_t *ihp;
158e4a54b41Snonaka 
159e4a54b41Snonaka 	if (counts != NULL && counts[PCI_INTR_TYPE_INTX] == 0)
160e4a54b41Snonaka 		return EINVAL;
161e4a54b41Snonaka 
162e4a54b41Snonaka 	ihp = kmem_alloc(sizeof(*ihp), KM_SLEEP);
163e4a54b41Snonaka 	if (pci_intr_map(pa, ihp)) {
164e4a54b41Snonaka 		kmem_free(ihp, sizeof(*ihp));
165e4a54b41Snonaka 		return EINVAL;
166e4a54b41Snonaka 	}
167e4a54b41Snonaka 
168e4a54b41Snonaka 	*ihps = ihp;
169e4a54b41Snonaka 	return 0;
170e4a54b41Snonaka }
171e4a54b41Snonaka 
172e4a54b41Snonaka void
genppc_pci_intr_release(void * v,pci_intr_handle_t * pih,int count)173e4a54b41Snonaka genppc_pci_intr_release(void *v, pci_intr_handle_t *pih, int count)
174e4a54b41Snonaka {
175e4a54b41Snonaka 
176e4a54b41Snonaka 	if (pih == NULL)
177e4a54b41Snonaka 		return;
178e4a54b41Snonaka 
179e4a54b41Snonaka 	KASSERT(count == 1);
180e4a54b41Snonaka 	kmem_free(pih, sizeof(*pih));
181e4a54b41Snonaka }
182e4a54b41Snonaka 
183e4a54b41Snonaka int
genppc_pci_intx_alloc(const struct pci_attach_args * pa,pci_intr_handle_t ** ihps)184e4a54b41Snonaka genppc_pci_intx_alloc(const struct pci_attach_args *pa,
185e4a54b41Snonaka     pci_intr_handle_t **ihps)
186e4a54b41Snonaka {
187e4a54b41Snonaka 	pci_intr_handle_t *handle;
188e4a54b41Snonaka 	int error;
189e4a54b41Snonaka 
190e4a54b41Snonaka 	handle = kmem_zalloc(sizeof(*handle), KM_SLEEP);
191e4a54b41Snonaka 	error = pci_intr_map(pa, handle);
192e4a54b41Snonaka 	if (error != 0) {
193e4a54b41Snonaka 		kmem_free(handle, sizeof(*handle));
194e4a54b41Snonaka 		return error;
195e4a54b41Snonaka 	}
196e4a54b41Snonaka 
197e4a54b41Snonaka 	*ihps = handle;
198e4a54b41Snonaka 	return 0;
199e4a54b41Snonaka }
200e4a54b41Snonaka 
201d974db0aSgarbled void
genppc_pci_conf_interrupt(void * v,int bus,int dev,int pin,int swiz,int * iline)202dd2488a8Smatt genppc_pci_conf_interrupt(void *v, int bus, int dev, int pin,
203d974db0aSgarbled     int swiz, int *iline)
204d974db0aSgarbled {
205d974db0aSgarbled 	/* do nothing */
206d974db0aSgarbled }
207d974db0aSgarbled 
208d974db0aSgarbled int
genppc_pci_conf_hook(void * v,int bus,int dev,int func,pcireg_t id)209dd2488a8Smatt genppc_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
210d974db0aSgarbled {
211d974db0aSgarbled 	return (PCI_CONF_DEFAULT);
212d974db0aSgarbled }
213d974db0aSgarbled 
214d974db0aSgarbled int
genppc_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)215d3e53912Sdyoung genppc_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
216d974db0aSgarbled {
217d974db0aSgarbled 	int pin = pa->pa_intrpin;
218d974db0aSgarbled 	int line = pa->pa_intrline;
219d974db0aSgarbled 
22080a83a2bSgarbled #ifdef DEBUG
2219b2b412cSperry 	printf("%s: pin: %d, line: %d\n", __func__, pin, line);
222d974db0aSgarbled #endif
223d974db0aSgarbled 
224d974db0aSgarbled 	if (pin == 0) {
225d974db0aSgarbled 		/* No IRQ used. */
226d974db0aSgarbled 		aprint_error("pci_intr_map: interrupt pin %d\n", pin);
227d974db0aSgarbled 		goto bad;
228d974db0aSgarbled 	}
229f6a41c7cSmacallan 
230d974db0aSgarbled 	if (pin > 4) {
231d974db0aSgarbled 		aprint_error("pci_intr_map: bad interrupt pin %d\n", pin);
232d974db0aSgarbled 		goto bad;
233d974db0aSgarbled 	}
234d974db0aSgarbled 
235d974db0aSgarbled 	/*
236d974db0aSgarbled 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
237d974db0aSgarbled 	 * `unknown' or `no connection' on a PC.  We assume that a device with
238d974db0aSgarbled 	 * `no connection' either doesn't have an interrupt (in which case the
239d974db0aSgarbled 	 * pin number should be 0, and would have been noticed above), or
240d974db0aSgarbled 	 * wasn't configured by the BIOS (in which case we punt, since there's
241d974db0aSgarbled 	 * no real way we can know how the interrupt lines are mapped in the
242d974db0aSgarbled 	 * hardware).
243d974db0aSgarbled 	 *
244d974db0aSgarbled 	 * XXX
245d974db0aSgarbled 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
246d974db0aSgarbled 	 * that the BIOS did its job, we also recognize that as meaning that
247d974db0aSgarbled 	 * the BIOS has not configured the device.
2487580a083Smacallan 	 * XXX
2497580a083Smacallan 	 * it's perfectly legal to use IRQ 0 on macppc
250d974db0aSgarbled 	 */
2517580a083Smacallan 	if (line == 255) {
252d974db0aSgarbled 		aprint_error("pci_intr_map: no mapping for pin %c\n", '@' + pin);
253d974db0aSgarbled 		goto bad;
254dd2488a8Smatt #ifdef ICU_LEN
255d974db0aSgarbled 	} else {
256d974db0aSgarbled 		if (line >= ICU_LEN) {
257d974db0aSgarbled 			aprint_error("pci_intr_map: bad interrupt line %d\n", line);
258d974db0aSgarbled 			goto bad;
259d974db0aSgarbled 		}
260dd2488a8Smatt #endif
261d974db0aSgarbled 	}
262d974db0aSgarbled 
263d974db0aSgarbled 	*ihp = line;
264d974db0aSgarbled 	return 0;
265d974db0aSgarbled 
266d974db0aSgarbled bad:
267d974db0aSgarbled 	*ihp = -1;
268d974db0aSgarbled 	return 1;
269d974db0aSgarbled }
270d974db0aSgarbled 
271e4a54b41Snonaka /* experimental MSI support */
2721f2907adSmatt int
genppc_pci_msi_alloc(const struct pci_attach_args * pa,pci_intr_handle_t ** ihps,int * count,bool exact)273e4a54b41Snonaka genppc_pci_msi_alloc(const struct pci_attach_args *pa, pci_intr_handle_t **ihps,
274e4a54b41Snonaka     int *count, bool exact)
2751f2907adSmatt {
276e4a54b41Snonaka 
2771f2907adSmatt 	return EOPNOTSUPP;
2781f2907adSmatt }
2791f2907adSmatt 
280e4a54b41Snonaka /* experimental MSI-X support */
2811f2907adSmatt int
genppc_pci_msix_alloc(const struct pci_attach_args * pa,pci_intr_handle_t ** ihps,u_int * table_indexes,int * count,bool exact)282e4a54b41Snonaka genppc_pci_msix_alloc(const struct pci_attach_args *pa,
283e4a54b41Snonaka     pci_intr_handle_t **ihps, u_int *table_indexes, int *count, bool exact)
2841f2907adSmatt {
2851f2907adSmatt 
286e4a54b41Snonaka 	return EOPNOTSUPP;
2871f2907adSmatt }
2881f2907adSmatt 
2891f2907adSmatt void
genppc_pci_chipset_msi_init(pci_chipset_tag_t pc)2901f2907adSmatt genppc_pci_chipset_msi_init(pci_chipset_tag_t pc)
2911f2907adSmatt {
292e4a54b41Snonaka 	pc->pc_msi_alloc = genppc_pci_msi_alloc;
293e4a54b41Snonaka }
294e4a54b41Snonaka 
295e4a54b41Snonaka void
genppc_pci_chipset_msix_init(pci_chipset_tag_t pc)296e4a54b41Snonaka genppc_pci_chipset_msix_init(pci_chipset_tag_t pc)
297e4a54b41Snonaka {
298e4a54b41Snonaka 	pc->pc_msix_alloc = genppc_pci_msix_alloc;
2991f2907adSmatt }
3001f2907adSmatt 
301d2a9b2ffSphx #ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
3027500033fSmacallan #include <machine/isa_machdep.h>
303d2a9b2ffSphx #include "isa.h"
304d2a9b2ffSphx 
305036ca983Smatt void *genppc_pciide_machdep_compat_intr_establish(device_t,
306d2a9b2ffSphx     struct pci_attach_args *, int, int (*)(void *), void *);
307d2a9b2ffSphx 
308d2a9b2ffSphx void *
genppc_pciide_machdep_compat_intr_establish(device_t dev,struct pci_attach_args * pa,int chan,int (* func)(void *),void * arg)309036ca983Smatt genppc_pciide_machdep_compat_intr_establish(device_t dev,
310d2a9b2ffSphx     struct pci_attach_args *pa, int chan, int (*func)(void *), void *arg)
311d2a9b2ffSphx {
312d2a9b2ffSphx #if NISA > 0
313d2a9b2ffSphx 	int irq;
314d2a9b2ffSphx 	void *cookie;
315d2a9b2ffSphx 
316d2a9b2ffSphx 	irq = PCIIDE_COMPAT_IRQ(chan);
317d2a9b2ffSphx 	cookie = isa_intr_establish(NULL, irq, IST_LEVEL, IPL_BIO, func, arg);
318d2a9b2ffSphx 	if (cookie == NULL)
319d2a9b2ffSphx 		return (NULL);
320036ca983Smatt 	aprint_normal_dev(dev, "%s channel interrupting at irq %d\n",
321d2a9b2ffSphx 	    PCIIDE_CHANNEL_NAME(chan), irq);
322d2a9b2ffSphx 	return (cookie);
323d2a9b2ffSphx #else
324d2a9b2ffSphx 	panic("pciide_machdep_compat_intr_establish() called");
325d2a9b2ffSphx #endif
326d2a9b2ffSphx }
327d2a9b2ffSphx #endif /* __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH */
328