1*16031f7dSrin /* $NetBSD: e500var.h,v 1.9 2020/07/06 09:34:17 rin Exp $ */ 2b8ea2c8cSmatt /*- 3b8ea2c8cSmatt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4b8ea2c8cSmatt * All rights reserved. 5b8ea2c8cSmatt * 6b8ea2c8cSmatt * This code is derived from software contributed to The NetBSD Foundation 7b8ea2c8cSmatt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8b8ea2c8cSmatt * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9b8ea2c8cSmatt * 10b8ea2c8cSmatt * This material is based upon work supported by the Defense Advanced Research 11b8ea2c8cSmatt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12b8ea2c8cSmatt * Contract No. N66001-09-C-2073. 13b8ea2c8cSmatt * Approved for Public Release, Distribution Unlimited 14b8ea2c8cSmatt * 15b8ea2c8cSmatt * Redistribution and use in source and binary forms, with or without 16b8ea2c8cSmatt * modification, are permitted provided that the following conditions 17b8ea2c8cSmatt * are met: 18b8ea2c8cSmatt * 1. Redistributions of source code must retain the above copyright 19b8ea2c8cSmatt * notice, this list of conditions and the following disclaimer. 20b8ea2c8cSmatt * 2. Redistributions in binary form must reproduce the above copyright 21b8ea2c8cSmatt * notice, this list of conditions and the following disclaimer in the 22b8ea2c8cSmatt * documentation and/or other materials provided with the distribution. 23b8ea2c8cSmatt * 24b8ea2c8cSmatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25b8ea2c8cSmatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26b8ea2c8cSmatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27b8ea2c8cSmatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28b8ea2c8cSmatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29b8ea2c8cSmatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30b8ea2c8cSmatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31b8ea2c8cSmatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32b8ea2c8cSmatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33b8ea2c8cSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34b8ea2c8cSmatt * POSSIBILITY OF SUCH DAMAGE. 35b8ea2c8cSmatt */ 36b8ea2c8cSmatt 37b8ea2c8cSmatt #ifndef _POWERPC_BOOKE_E500VAR_H_ 38b8ea2c8cSmatt #define _POWERPC_BOOKE_E500VAR_H_ 39b8ea2c8cSmatt 40b8ea2c8cSmatt #ifdef _KERNEL 41b8ea2c8cSmatt 42*16031f7dSrin #include "locators.h" 43*16031f7dSrin 44b8ea2c8cSmatt #include <sys/device.h> 45b8ea2c8cSmatt #include <sys/extent.h> 46b8ea2c8cSmatt 47b8ea2c8cSmatt #define E500_CLOCK_TIMER 0 /* could be 0..3 */ 48b8ea2c8cSmatt 49b8ea2c8cSmatt extern const struct intrsw e500_intrsw; 5075d1db67Smatt extern struct extent *pcimem_ex; 5175d1db67Smatt extern struct extent *pciio_ex; 52b8ea2c8cSmatt void e500_device_register(device_t, void *); 53b8ea2c8cSmatt int e500_clock_intr(void *); 54b8ea2c8cSmatt void e500_cpu_start(void); 55b8ea2c8cSmatt void e500_tlb_init(vaddr_t, psize_t); 56271a3093Smatt void e500_tlb_minimize(vaddr_t); 57b8ea2c8cSmatt bool e500_device_disabled_p(uint32_t); 58b8ea2c8cSmatt 59b8ea2c8cSmatt struct e500_truthtab { 60b8ea2c8cSmatt uint16_t tt_svrhi; 61b8ea2c8cSmatt uint16_t tt_instance; 62b8ea2c8cSmatt uint32_t tt_mask; 63b8ea2c8cSmatt uint32_t tt_value; 64b8ea2c8cSmatt u_int tt_result; 65b8ea2c8cSmatt }; 66b8ea2c8cSmatt 67b8ea2c8cSmatt #define TRUTH_ENCODE(svr, inst, mask, value, result) \ 68b8ea2c8cSmatt { \ 69b8ea2c8cSmatt .tt_svrhi = (svr) >> 16, \ 70b8ea2c8cSmatt .tt_instance = (inst), \ 71b8ea2c8cSmatt .tt_mask = (mask), \ 72b8ea2c8cSmatt .tt_value = (value), \ 73b8ea2c8cSmatt .tt_result = (result), \ 74b8ea2c8cSmatt } 75b8ea2c8cSmatt 76b8ea2c8cSmatt u_int e500_truth_decode(u_int, uint32_t, const struct e500_truthtab *, 77b8ea2c8cSmatt size_t, u_int); 78b8ea2c8cSmatt uint16_t e500_get_svr(void); 79b8ea2c8cSmatt int e500_cpunode_submatch(device_t, cfdata_t, const char *, void *); 80b8ea2c8cSmatt 8101fd9255Smatt /* 8201fd9255Smatt * Used by MP hatch code to fetch the TLB1 entries so they be setup on the 8301fd9255Smatt * just hatched CPU. 8401fd9255Smatt */ 8501fd9255Smatt void * e500_tlb1_fetch(size_t); 8601fd9255Smatt void e500_tlb1_sync(void); 8701fd9255Smatt void e500_ipi_halt(void); 88599d43deSmatt void e500_spinup_trampoline(void); 89599d43deSmatt void e500_cpu_hatch(struct cpu_info *); 90f82647e6Smatt struct e500_xtlb * 91f82647e6Smatt e500_tlb_lookup_xtlb(vaddr_t, u_int *); 92f82647e6Smatt 9301fd9255Smatt 94b8ea2c8cSmatt void pq3gpio_attach(device_t, device_t, void *); 95b8ea2c8cSmatt 9601fd9255Smatt /* 9701fd9255Smatt * For a lack of a better place, define this u-boot structure here. 9801fd9255Smatt */ 9901fd9255Smatt 10001fd9255Smatt struct uboot_spinup_entry { 101599d43deSmatt uint32_t entry_addr_upper; 102599d43deSmatt uint32_t entry_addr_lower; 103599d43deSmatt uint32_t entry_r3_upper; 104599d43deSmatt uint32_t entry_r3_lower; 10501fd9255Smatt uint32_t entry__rsvd; 10601fd9255Smatt uint32_t entry_pir; 107599d43deSmatt uint32_t entry_r6_upper; 108599d43deSmatt uint32_t entry_r6_lower; 10901fd9255Smatt }; 11001fd9255Smatt 111b8ea2c8cSmatt #endif /* _KERNEL */ 112b8ea2c8cSmatt 113b8ea2c8cSmatt #endif /* !_POWERPC_BOOKE_E500VAR_H_ */ 114