xref: /netbsd-src/sys/arch/powerpc/ibm4xx/clock.c (revision deb6f0161a9109e7de9b519dc8dfb9478668dcdd)
1 /*	$NetBSD: clock.c,v 1.27 2012/01/09 06:25:55 kiyohara Exp $	*/
2 /*      $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $  */
3 
4 /*
5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
6  * Copyright (C) 1995, 1996 TooLs GmbH.
7  * All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by TooLs GmbH.
20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.27 2012/01/09 06:25:55 kiyohara Exp $");
37 
38 #include <sys/param.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/timetc.h>
42 #include <sys/cpu.h>
43 
44 #include <uvm/uvm_extern.h>
45 
46 #include <prop/proplib.h>
47 
48 #include <powerpc/spr.h>
49 #include <powerpc/ibm4xx/spr.h>
50 #include <powerpc/ibm4xx/cpu.h>
51 
52 /*
53  * Initially we assume a processor with a bus frequency of 12.5 MHz.
54  */
55 static u_long ticks_per_sec;
56 static u_long ns_per_tick;
57 static long ticks_per_intr;
58 static volatile u_long lasttb, lasttb2;
59 static u_long ticksmissed;
60 static volatile int tickspending;
61 
62 static void init_ppc4xx_tc(void);
63 static u_int get_ppc4xx_timecount(struct timecounter *);
64 
65 static struct timecounter ppc4xx_timecounter = {
66 	get_ppc4xx_timecount,	/* get_timecount */
67 	0,			/* no poll_pps */
68 	~0u,			/* counter_mask */
69 	0,			/* frequency */
70 	"ppc_timebase",		/* name */
71 	100,			/* quality */
72 	NULL,			/* tc_priv */
73 	NULL			/* tc_next */
74 };
75 
76 void decr_intr(struct clockframe *);	/* called from trap_subr.S */
77 void stat_intr(struct clockframe *);	/* called from trap_subr.S */
78 
79 #ifdef FAST_STAT_CLOCK
80 /* Stat clock runs at ~ 1.5 kHz */
81 #define PERIOD_POWER	17
82 #define TCR_PERIOD	TCR_FP_2_17
83 #else
84 /* Stat clock runs at ~ 95Hz */
85 #define PERIOD_POWER	21
86 #define TCR_PERIOD	TCR_FP_2_21
87 #endif
88 
89 
90 void
91 stat_intr(struct clockframe *frame)
92 {
93 	struct cpu_info * const ci = curcpu();
94 
95 	mtspr(SPR_TSR, TSR_FIS);	/* Clear TSR[FIS] */
96 	ci->ci_data.cpu_nintr++;
97 	ci->ci_ev_statclock.ev_count++;
98 
99 	/* Nobody can interrupt us, but see if we're allowed to run. */
100 	int s = splclock();
101 
102 	/*
103 	 * Reenable interrupts
104 	 */
105 	__asm volatile ("wrteei 1");
106 
107 	if (IPL_CLOCK > s)
108   		statclock(frame);
109 	splx(s);
110 }
111 
112 void
113 decr_intr(struct clockframe *frame)
114 {
115 	struct cpu_info * const ci = curcpu();
116 	int pcpl;
117 	long tbtick, xticks;
118 	int nticks;
119 
120 	/*
121 	 * Check whether we are initialized.
122 	 */
123 	if (!ticks_per_intr)
124 		return;
125 
126 	tbtick = mftbl();
127 	mtspr(SPR_TSR, TSR_PIS);	/* Clear TSR[PIS] */
128 
129 	xticks = tbtick - lasttb2;	/* Number of TLB cycles since last exception */
130 	for (nticks = 0; xticks > ticks_per_intr; nticks++)
131 		xticks -= ticks_per_intr;
132 	lasttb2 = tbtick - xticks;
133 
134 	ci->ci_data.cpu_nintr++;
135 	ci->ci_ev_clock.ev_count++;
136 	pcpl = splclock();
137 
138 	/*
139 	 * Reenable interrupts
140 	 */
141 	__asm volatile ("wrteei 1");
142 
143 	if (pcpl >= IPL_CLOCK) {
144 		tickspending += nticks;
145 		ticksmissed += nticks;
146 	} else {
147 		nticks += tickspending;
148 		tickspending = 0;
149 
150 		/*
151 		 * lasttb is used during microtime. Set it to the virtual
152 		 * start of this tick interval.
153 		 */
154 		lasttb = lasttb2;
155 
156 		/*
157 		 * Do standard timer interrupt stuff.
158 		 * Do softclock stuff only on the last iteration.
159 		 */
160 		while (--nticks > 0)
161 			hardclock(frame);
162 		hardclock(frame);
163 	}
164 	splx(pcpl);
165 }
166 
167 void
168 cpu_initclocks(void)
169 {
170 	struct cpu_info * const ci = curcpu();
171 
172 	/* Initialized in powerpc/ibm4xx/cpu.c */
173 	evcnt_attach_static(&ci->ci_ev_clock);
174 	evcnt_attach_static(&ci->ci_ev_statclock);
175 
176 	ticks_per_intr = ticks_per_sec / hz;
177 	stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER);
178 
179 	printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz,
180 	    ticks_per_intr);
181 
182 	lasttb2 = lasttb = mftbl();
183 	mtspr(SPR_PIT, ticks_per_intr);
184 
185 	/* Enable PIT & FIT(2^17c = 0.655ms) interrupts and auto-reload */
186 	mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD);
187 
188 	init_ppc4xx_tc();
189 }
190 
191 void
192 calc_delayconst(void)
193 {
194 	prop_number_t freq;
195 
196 	freq = prop_dictionary_get(board_properties, "processor-frequency");
197 	KASSERT(freq != NULL);
198 
199 	ticks_per_sec = (u_long) prop_number_integer_value(freq);
200 	ns_per_tick = 1000000000 / ticks_per_sec;
201 }
202 
203 static u_int
204 get_ppc4xx_timecount(struct timecounter *tc)
205 {
206 	u_long tb;
207 	int msr;
208 
209 	__asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr) :);
210 	tb = mftbl();
211 	__asm volatile ("mtmsr %0" :: "r"(msr));
212 
213 	return tb;
214 }
215 
216 /*
217  * Wait for about n microseconds (at least!).
218  */
219 void
220 delay(unsigned int n)
221 {
222 	u_quad_t tb;
223 	u_long tbh, tbl, scratch;
224 
225 	tb = mftb();
226 	/* use 1000ULL to force 64 bit math to avoid 32 bit overflows */
227 	tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick;
228 	tbh = tb >> 32;
229 	tbl = tb;
230 	__asm volatile (
231 #ifdef PPC_IBM403
232 	    "1:	mftbhi %0	\n"
233 #else
234 	    "1:	mftbu %0	\n"
235 #endif
236 	    "	cmplw %0,%1	\n"
237 	    "	blt 1b		\n"
238 	    "	bgt 2f		\n"
239 #ifdef PPC_IBM403
240 	    "	mftblo %0	\n"
241 #else
242 	    "	mftb %0		\n"
243 #endif
244 	    "	cmplw %0,%2	\n"
245 	    "	blt 1b		\n"
246 	    "2: 		\n"
247 	    : "=&r"(scratch) : "r"(tbh), "r"(tbl) : "cr0");
248 }
249 
250 /*
251  * Nothing to do.
252  */
253 void
254 setstatclockrate(int arg)
255 {
256 
257 	/* Do nothing */
258 }
259 
260 static void
261 init_ppc4xx_tc(void)
262 {
263 	/* from machdep initialization */
264 	ppc4xx_timecounter.tc_frequency = ticks_per_sec;
265 	tc_init(&ppc4xx_timecounter);
266 }
267