1*66fba52eSthorpej /* $NetBSD: pq3diic.c,v 1.7 2022/07/22 23:43:24 thorpej Exp $ */
2b8ea2c8cSmatt /*-
3b8ea2c8cSmatt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4b8ea2c8cSmatt * All rights reserved.
5b8ea2c8cSmatt *
6b8ea2c8cSmatt * This code is derived from software contributed to The NetBSD Foundation
7b8ea2c8cSmatt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8b8ea2c8cSmatt * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9b8ea2c8cSmatt *
10b8ea2c8cSmatt * This material is based upon work supported by the Defense Advanced Research
11b8ea2c8cSmatt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12b8ea2c8cSmatt * Contract No. N66001-09-C-2073.
13b8ea2c8cSmatt * Approved for Public Release, Distribution Unlimited
14b8ea2c8cSmatt *
15b8ea2c8cSmatt * Redistribution and use in source and binary forms, with or without
16b8ea2c8cSmatt * modification, are permitted provided that the following conditions
17b8ea2c8cSmatt * are met:
18b8ea2c8cSmatt * 1. Redistributions of source code must retain the above copyright
19b8ea2c8cSmatt * notice, this list of conditions and the following disclaimer.
20b8ea2c8cSmatt * 2. Redistributions in binary form must reproduce the above copyright
21b8ea2c8cSmatt * notice, this list of conditions and the following disclaimer in the
22b8ea2c8cSmatt * documentation and/or other materials provided with the distribution.
23b8ea2c8cSmatt *
24b8ea2c8cSmatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25b8ea2c8cSmatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26b8ea2c8cSmatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27b8ea2c8cSmatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28b8ea2c8cSmatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29b8ea2c8cSmatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30b8ea2c8cSmatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31b8ea2c8cSmatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32b8ea2c8cSmatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33b8ea2c8cSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34b8ea2c8cSmatt * POSSIBILITY OF SUCH DAMAGE.
35b8ea2c8cSmatt */
36b8ea2c8cSmatt
37b8ea2c8cSmatt #include <sys/cdefs.h>
38*66fba52eSthorpej __KERNEL_RCSID(0, "$NetBSD: pq3diic.c,v 1.7 2022/07/22 23:43:24 thorpej Exp $");
39b8ea2c8cSmatt
4016031f7dSrin #include "ioconf.h"
4103c42f4dSmatt
42b8ea2c8cSmatt #include <sys/param.h>
43b8ea2c8cSmatt #include <sys/cpu.h>
44b8ea2c8cSmatt #include <sys/device.h>
45b8ea2c8cSmatt #include <sys/tty.h>
46b8ea2c8cSmatt
47b8ea2c8cSmatt #include <sys/intr.h>
48b8ea2c8cSmatt #include <sys/bus.h>
49b8ea2c8cSmatt
50b8ea2c8cSmatt #include <dev/i2c/i2cvar.h>
51b8ea2c8cSmatt
52b8ea2c8cSmatt #include <dev/i2c/motoi2creg.h>
53b8ea2c8cSmatt #include <dev/i2c/motoi2cvar.h>
54b8ea2c8cSmatt
55b8ea2c8cSmatt #include <powerpc/booke/cpuvar.h>
56b8ea2c8cSmatt #include <powerpc/booke/e500var.h>
57b8ea2c8cSmatt #include <powerpc/booke/e500reg.h>
58b8ea2c8cSmatt
59b8ea2c8cSmatt static int pq3diic_match(device_t, cfdata_t, void *);
60b8ea2c8cSmatt static void pq3diic_attach(device_t, device_t, void *);
61b8ea2c8cSmatt
62*66fba52eSthorpej CFATTACH_DECL_NEW(pq3diic, sizeof(struct motoi2c_softc),
63b8ea2c8cSmatt pq3diic_match, pq3diic_attach, NULL, NULL);
64b8ea2c8cSmatt
65b8ea2c8cSmatt static int
pq3diic_match(device_t parent,cfdata_t cf,void * aux)66b8ea2c8cSmatt pq3diic_match(device_t parent, cfdata_t cf, void *aux)
67b8ea2c8cSmatt {
68b8ea2c8cSmatt
69b8ea2c8cSmatt if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
70b8ea2c8cSmatt return 0;
71b8ea2c8cSmatt
72b8ea2c8cSmatt return 1;
73b8ea2c8cSmatt }
74b8ea2c8cSmatt
75f3bcee9cSthorpej #if 0
76b8ea2c8cSmatt static int
77b8ea2c8cSmatt pq3diic_intr(void *arg)
78b8ea2c8cSmatt {
79b8ea2c8cSmatt struct pq3diic_softc * const sc = arg;
80b8ea2c8cSmatt
81f3bcee9cSthorpej return motoi2c_intr(&sc->sc_motoi2c);
82b8ea2c8cSmatt }
83f3bcee9cSthorpej #endif
84b8ea2c8cSmatt
85b8ea2c8cSmatt static void
pq3diic_attach(device_t parent,device_t self,void * aux)86b8ea2c8cSmatt pq3diic_attach(device_t parent, device_t self, void *aux)
87b8ea2c8cSmatt {
88b8ea2c8cSmatt struct cpunode_softc * const psc = device_private(parent);
89*66fba52eSthorpej struct motoi2c_softc * const sc = device_private(self);
90b8ea2c8cSmatt struct cpunode_attach_args * const cna = aux;
91b8ea2c8cSmatt struct cpunode_locators * const cnl = &cna->cna_locs;
92b8ea2c8cSmatt int error;
93b8ea2c8cSmatt
94b8ea2c8cSmatt psc->sc_children |= cna->cna_childmask;
95b8ea2c8cSmatt sc->sc_dev = self;
96b8ea2c8cSmatt
97f3bcee9cSthorpej aprint_normal("\n");
98b8ea2c8cSmatt
99*66fba52eSthorpej sc->sc_iot = cna->cna_memt;
100*66fba52eSthorpej error = bus_space_map(sc->sc_iot, cnl->cnl_addr, I2C_SIZE,
101*66fba52eSthorpej 0, &sc->sc_ioh);
102b8ea2c8cSmatt if (error) {
103b8ea2c8cSmatt aprint_error_dev(self,
104f3bcee9cSthorpej "can't map registers (error = %d)\n", error);
105f3bcee9cSthorpej return;
106b8ea2c8cSmatt }
107b8ea2c8cSmatt
108*66fba52eSthorpej motoi2c_attach(sc, NULL);
109f3bcee9cSthorpej
110f3bcee9cSthorpej #if 0
111f3bcee9cSthorpej /*
112f3bcee9cSthorpej * XXX e500_intr.c can't handle shared interrupts, but that's
113f3bcee9cSthorpej * XXX ok, because motoi2c doesn't support using interrupts
114f3bcee9cSthorpej * XXX at the moment anyway.
115f3bcee9cSthorpej */
116b8ea2c8cSmatt sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_VM, IST_ONCHIP,
117b8ea2c8cSmatt pq3diic_intr, sc);
118b8ea2c8cSmatt if (sc->sc_ih == NULL)
119b8ea2c8cSmatt aprint_error_dev(self, "failed to establish interrupt %d\n",
120b8ea2c8cSmatt cnl->cnl_intrs[0]);
121b8ea2c8cSmatt else
122b8ea2c8cSmatt aprint_normal_dev(self, "interrupting on irq %d\n",
123b8ea2c8cSmatt cnl->cnl_intrs[0]);
124f3bcee9cSthorpej #endif
125b8ea2c8cSmatt }
126