1 /* $NetBSD: spr.h,v 1.1 2014/09/03 19:34:26 matt Exp $ */ 2 3 /*- 4 * Copyright (c) 2014 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _OR1K_SPR_H_ 33 #define _OR1K_SPR_H_ 34 35 #define SPR_GROUP __BITS(15,11) 36 #define SPR_REG __BITS(10,0) 37 38 #define SPR_MAKE(g,r) (__SHIFTIN((g), SPR_GROUP)|__SHIFTIN((r), SPR_REG)) 39 40 #define SPR_VR SPR_MAKE(0, 0) 41 #define SPR_UPR SPR_MAKE(0, 1) 42 #define SPR_CPUCFGR SPR_MAKE(0, 2) 43 #define SPR_DMMUCFGR SPR_MAKE(0, 3) 44 #define SPR_IMMUCFGR SPR_MAKE(0, 4) 45 #define SPR_DCCFGR SPR_MAKE(0, 5) 46 #define SPR_ICCFGR SPR_MAKE(0, 6) 47 #define SPR_DCFGR SPR_MAKE(0, 7) 48 #define SPR_PCCFGR SPR_MAKE(0, 8) 49 #define SPR_VR2 SPR_MAKE(0, 9) 50 #define SPR_AVR SPR_MAKE(0, 10) 51 #define SPR_EVBAR SPR_MAKE(0, 11) 52 #define SPR_AECR SPR_MAKE(0, 12) 53 #define SPR_AESR SPR_MAKE(0, 13) 54 #define SPR_NPC SPR_MAKE(0, 16) 55 #define SPR_SR SPR_MAKE(0, 17) 56 #define SR_CID __BITS(31,28) 57 #define SR_SUMRA __BIT(16) 58 #define SR_FO __BIT(15) 59 #define SR_EPH __BIT(14) 60 #define SR_DSX __BIT(13) 61 #define SR_OVE __BIT(12) 62 #define SR_OV __BIT(11) 63 #define SR_CY __BIT(10) 64 #define SR_F __BIT(9) 65 #define SR_CE __BIT(8) 66 #define SR_LEE __BIT(7) 67 #define SR_IME __BIT(6) 68 #define SR_DME __BIT(5) 69 #define SR_ICE __BIT(4) 70 #define SR_DCE __BIT(3) 71 #define SR_IEE __BIT(2) 72 #define SR_TEE __BIT(1) 73 #define SR_SM __BIT(0) 74 #define SPR_PPC SPR_MAKE(0, 18) 75 #define SPR_FPCSR SPR_MAKE(0, 20) 76 #define FPCSR_DZF __BIT(11) 77 #define FPCSR_INF __BIT(10) 78 #define FPCSR_IVF __BIT(9) 79 #define FPCSR_IXF __BIT(8) 80 #define FPCSR_ZF __BIT(7) 81 #define FPCSR_QNF __BIT(6) 82 #define FPCSR_SNF __BIT(5) 83 #define FPCSR_UNF __BIT(4) 84 #define FPCSR_OVF __BIT(3) 85 #define FPCSR_RM __BITS(2,1) 86 #define FPCSR_RM_RN 0 87 #define FPCSR_RM_RZ 1 88 #define FPCSR_RM_RP 2 89 #define FPCSR_RM_RM 3 90 #define FPCSR_FPEE __BIT(0) 91 #define SPR_ISRn(n) SPR_MAKE(0, 21+(n)) 92 #define SPR_EPCRn(n) SPR_MAKE(0, 32+(n)) 93 #define SPR_EEARn(n) SPR_MAKE(0, 48+(n)) 94 #define SPR_ESRn(n) SPR_MAKE(0, 64+(n)) 95 #define SPR_GRPN(cid,n) SPR_MASK(0, 1024+(cid)*32+(n)) 96 97 #endif /* _OR1K_SPR_H_ */ 98