xref: /netbsd-src/sys/arch/mvme68k/include/bus_dma.h (revision 8a3fe07864e3511bfd888f2908bbf85e8b1448e8)
1*8a3fe078Smsaitoh /* $NetBSD: bus_dma.h,v 1.17 2021/12/05 04:54:20 msaitoh Exp $	*/
29c745dbdSscw 
39c745dbdSscw /*
4*8a3fe078Smsaitoh  * This file was extracted from next68k/include/bus.h
59c745dbdSscw  * and should probably be resynced when needed.
69c745dbdSscw  * original cvs id: NetBSD: bus_dma.h,v 1.3 1999/08/05 01:50:59 dbj Exp
79c745dbdSscw  */
89c745dbdSscw 
99c745dbdSscw /*-
102c4c690fSthorpej  * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
119c745dbdSscw  * All rights reserved.
129c745dbdSscw  *
139c745dbdSscw  * This code is derived from software contributed to The NetBSD Foundation
149c745dbdSscw  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
159c745dbdSscw  * NASA Ames Research Center.
169c745dbdSscw  *
179c745dbdSscw  * Redistribution and use in source and binary forms, with or without
189c745dbdSscw  * modification, are permitted provided that the following conditions
199c745dbdSscw  * are met:
209c745dbdSscw  * 1. Redistributions of source code must retain the above copyright
219c745dbdSscw  *    notice, this list of conditions and the following disclaimer.
229c745dbdSscw  * 2. Redistributions in binary form must reproduce the above copyright
239c745dbdSscw  *    notice, this list of conditions and the following disclaimer in the
249c745dbdSscw  *    documentation and/or other materials provided with the distribution.
259c745dbdSscw  *
269c745dbdSscw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
279c745dbdSscw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
289c745dbdSscw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
299c745dbdSscw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
309c745dbdSscw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
319c745dbdSscw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
329c745dbdSscw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
339c745dbdSscw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
349c745dbdSscw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
359c745dbdSscw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
369c745dbdSscw  * POSSIBILITY OF SUCH DAMAGE.
379c745dbdSscw  */
389c745dbdSscw 
399c745dbdSscw /*
409c745dbdSscw  * Copyright (c) 1996 Carnegie-Mellon University.
419c745dbdSscw  * All rights reserved.
429c745dbdSscw  *
439c745dbdSscw  * Author: Chris G. Demetriou
449c745dbdSscw  *
459c745dbdSscw  * Permission to use, copy, modify and distribute this software and
469c745dbdSscw  * its documentation is hereby granted, provided that both the copyright
479c745dbdSscw  * notice and this permission notice appear in all copies of the
489c745dbdSscw  * software, derivative works or modified versions, and any portions
499c745dbdSscw  * thereof, and that both notices appear in supporting documentation.
509c745dbdSscw  *
519c745dbdSscw  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
529c745dbdSscw  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
539c745dbdSscw  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
549c745dbdSscw  *
559c745dbdSscw  * Carnegie Mellon requests users of this software to return to
569c745dbdSscw  *
579c745dbdSscw  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
589c745dbdSscw  *  School of Computer Science
599c745dbdSscw  *  Carnegie Mellon University
609c745dbdSscw  *  Pittsburgh PA 15213-3890
619c745dbdSscw  *
629c745dbdSscw  * any improvements or extensions that they make and grant Carnegie the
639c745dbdSscw  * rights to redistribute these changes.
649c745dbdSscw  */
659c745dbdSscw 
669c745dbdSscw #ifndef _MVME68K_BUS_DMA_H_
679c745dbdSscw #define	_MVME68K_BUS_DMA_H_
689c745dbdSscw 
699c745dbdSscw /*
709c745dbdSscw  * Bus DMA methods.
719c745dbdSscw  */
729c745dbdSscw 
739c745dbdSscw /*
749c745dbdSscw  * Flags used in various bus DMA methods.
759c745dbdSscw  */
76babefc53Sthorpej #define	BUS_DMA_WAITOK		0x000	/* safe to sleep (pseudo-flag) */
77babefc53Sthorpej #define	BUS_DMA_NOWAIT		0x001	/* not safe to sleep */
78babefc53Sthorpej #define	BUS_DMA_ALLOCNOW	0x002	/* perform resource allocation now */
79babefc53Sthorpej #define	BUS_DMA_COHERENT	0x004	/* hint: map memory DMA coherent */
80babefc53Sthorpej #define	BUS_DMA_STREAMING	0x008	/* hint: sequential, unidirectional */
81babefc53Sthorpej #define	BUS_DMA_BUS1		0x010	/* placeholders for bus functions... */
82babefc53Sthorpej #define	BUS_DMA_BUS2		0x020
83babefc53Sthorpej #define	BUS_DMA_BUS3		0x040
84babefc53Sthorpej #define	BUS_DMA_BUS4		0x080
85babefc53Sthorpej #define	BUS_DMA_READ		0x100	/* mapping is device -> memory only */
86babefc53Sthorpej #define	BUS_DMA_WRITE		0x200	/* mapping is memory -> device only */
87cd7d9faeSkent #define	BUS_DMA_NOCACHE		0x400	/* hint: map non-cached memory */
889c745dbdSscw 
899c745dbdSscw /*
909c745dbdSscw  * Flags to constrain the physical memory allocated for DMA
919c745dbdSscw  */
929c745dbdSscw #define BUS_DMA_ONBOARD_RAM	BUS_DMA_BUS1
939c745dbdSscw #define BUS_DMA_24BIT		BUS_DMA_BUS2
949c745dbdSscw 
959c745dbdSscw /* Forwards needed by prototypes below. */
969c745dbdSscw struct mbuf;
979c745dbdSscw struct uio;
989c745dbdSscw 
999c745dbdSscw /*
1009c745dbdSscw  * Operations performed by bus_dmamap_sync().
1019c745dbdSscw  */
1029c745dbdSscw #define	BUS_DMASYNC_PREREAD	0x01	/* pre-read synchronization */
1039c745dbdSscw #define	BUS_DMASYNC_POSTREAD	0x02	/* post-read synchronization */
1049c745dbdSscw #define	BUS_DMASYNC_PREWRITE	0x04	/* pre-write synchronization */
1059c745dbdSscw #define	BUS_DMASYNC_POSTWRITE	0x08	/* post-write synchronization */
1069c745dbdSscw 
1079c745dbdSscw typedef struct mvme68k_bus_dma_tag *bus_dma_tag_t;
1089c745dbdSscw typedef struct mvme68k_bus_dmamap *bus_dmamap_t;
1099c745dbdSscw 
1109c745dbdSscw /*
1119c745dbdSscw  *	bus_dma_segment_t
1129c745dbdSscw  *
1139c745dbdSscw  *	Describes a single contiguous DMA transaction.  Values
1149c745dbdSscw  *	are suitable for programming into DMA registers.
1159c745dbdSscw  */
1169c745dbdSscw struct mvme68k_bus_dma_segment {
1179c745dbdSscw 	bus_addr_t	ds_addr;	/* DMA address */
1189c745dbdSscw 	bus_size_t	ds_len;		/* length of transfer */
1193f2adcb2Sscw 
1203f2adcb2Sscw 	/* PRIVATE */
1213f2adcb2Sscw 	bus_addr_t	_ds_cpuaddr;	/* CPU-relative phys addr of segment */
122c22fb1dbSscw 	int		_ds_flags;
1239c745dbdSscw };
1249c745dbdSscw typedef struct mvme68k_bus_dma_segment	bus_dma_segment_t;
1259c745dbdSscw 
1269c745dbdSscw /*
1279c745dbdSscw  *	bus_dma_tag_t
1289c745dbdSscw  *
1299c745dbdSscw  *	A machine-dependent opaque type describing the implementation of
1309c745dbdSscw  *	DMA for a given bus.
1319c745dbdSscw  */
1329c745dbdSscw struct mvme68k_bus_dma_tag {
1339c745dbdSscw 	void	*_cookie;		/* cookie used in the guts */
1349c745dbdSscw 
1359c745dbdSscw 	/*
1369c745dbdSscw 	 * DMA mapping methods.
1379c745dbdSscw 	 */
138a07f7c80Stsutsui 	int	(*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
139a07f7c80Stsutsui 		    bus_size_t, bus_size_t, int, bus_dmamap_t *);
140a07f7c80Stsutsui 	void	(*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
141a07f7c80Stsutsui 	int	(*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
142a07f7c80Stsutsui 		    bus_size_t, struct proc *, int);
143a07f7c80Stsutsui 	int	(*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
144a07f7c80Stsutsui 		    struct mbuf *, int);
145a07f7c80Stsutsui 	int	(*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
146a07f7c80Stsutsui 		    struct uio *, int);
147a07f7c80Stsutsui 	int	(*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
148a07f7c80Stsutsui 		    bus_dma_segment_t *, int, bus_size_t, int);
149a07f7c80Stsutsui 	void	(*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
150a07f7c80Stsutsui 	void	(*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
151a07f7c80Stsutsui 		    bus_addr_t, bus_size_t, int);
1529c745dbdSscw 
1539c745dbdSscw 	/*
1549c745dbdSscw 	 * DMA memory utility functions.
1559c745dbdSscw 	 */
156a07f7c80Stsutsui 	int	(*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
157a07f7c80Stsutsui 		    bus_size_t, bus_dma_segment_t *, int, int *, int);
158a07f7c80Stsutsui 	void	(*_dmamem_free)(bus_dma_tag_t,
159a07f7c80Stsutsui 		    bus_dma_segment_t *, int);
160a07f7c80Stsutsui 	int	(*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
161a07f7c80Stsutsui 		    int, size_t, void **, int);
162a07f7c80Stsutsui 	void	(*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
163a07f7c80Stsutsui 	paddr_t	(*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
164a07f7c80Stsutsui 		    int, off_t, int, int);
1659c745dbdSscw };
1669c745dbdSscw 
1679c745dbdSscw #define	bus_dmamap_create(t, s, n, m, b, f, p)			\
1689c745dbdSscw 	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
1699c745dbdSscw #define	bus_dmamap_destroy(t, p)				\
1709c745dbdSscw 	(*(t)->_dmamap_destroy)((t), (p))
1719c745dbdSscw #define	bus_dmamap_load(t, m, b, s, p, f)			\
1729c745dbdSscw 	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
1739c745dbdSscw #define	bus_dmamap_load_mbuf(t, m, b, f)			\
1749c745dbdSscw 	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
1759c745dbdSscw #define	bus_dmamap_load_uio(t, m, u, f)				\
1769c745dbdSscw 	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
1779c745dbdSscw #define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
1789c745dbdSscw 	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
1799c745dbdSscw #define	bus_dmamap_unload(t, p)					\
1809c745dbdSscw 	(*(t)->_dmamap_unload)((t), (p))
1819c745dbdSscw #define	bus_dmamap_sync(t, p, o, l, ops)			\
1829c745dbdSscw 	(*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
1839c745dbdSscw #define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
1849c745dbdSscw 	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
1859c745dbdSscw #define	bus_dmamem_free(t, sg, n)				\
1869c745dbdSscw 	(*(t)->_dmamem_free)((t), (sg), (n))
1879c745dbdSscw #define	bus_dmamem_map(t, sg, n, s, k, f)			\
1889c745dbdSscw 	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
1899c745dbdSscw #define	bus_dmamem_unmap(t, k, s)				\
1909c745dbdSscw 	(*(t)->_dmamem_unmap)((t), (k), (s))
1919c745dbdSscw #define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
1929c745dbdSscw 	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
1939c745dbdSscw 
1949c745dbdSscw /*
1959c745dbdSscw  *	bus_dmamap_t
1969c745dbdSscw  *
1979c745dbdSscw  *	Describes a DMA mapping.
1989c745dbdSscw  */
1999c745dbdSscw struct mvme68k_bus_dmamap {
2009c745dbdSscw 	/*
2019c745dbdSscw 	 * PRIVATE MEMBERS: not for use by machine-independent code.
2029c745dbdSscw 	 */
2039c745dbdSscw 	bus_size_t	_dm_size;	/* largest DMA transfer mappable */
2049c745dbdSscw 	int		_dm_segcnt;	/* number of segs this map can map */
205a6db24a4Smatt 	bus_size_t	_dm_maxmaxsegsz; /* fixed largest possible segment */
2069c745dbdSscw 	bus_size_t	_dm_boundary;	/* don't cross this */
2079c745dbdSscw 	int		_dm_flags;	/* misc. flags */
208b77bc217Sscw 	void		*_dm_cookie;	/* Bus-specific cookie */
2099c745dbdSscw 
2109c745dbdSscw 	/*
2119c745dbdSscw 	 * PUBLIC MEMBERS: these are used by machine-independent code.
2129c745dbdSscw 	 */
213a6db24a4Smatt 	bus_size_t	dm_maxsegsz;	/* largest possible segment */
2149c745dbdSscw 	bus_size_t	dm_mapsize;	/* size of the mapping */
2159c745dbdSscw 	int		dm_nsegs;	/* # valid segments in mapping */
2169c745dbdSscw 	bus_dma_segment_t dm_segs[1];	/* segments; variable length */
2179c745dbdSscw };
2189c745dbdSscw 
2199c745dbdSscw #ifdef _MVME68K_BUS_DMA_PRIVATE
220a07f7c80Stsutsui int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
221a07f7c80Stsutsui 	    bus_size_t, int, bus_dmamap_t *);
222a07f7c80Stsutsui void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
2239c745dbdSscw 
224a07f7c80Stsutsui int	_bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t,
225a07f7c80Stsutsui 	    void *, bus_size_t, struct proc *, int);
226a07f7c80Stsutsui int	_bus_dmamap_load_mbuf_direct(bus_dma_tag_t,
227a07f7c80Stsutsui 	    bus_dmamap_t, struct mbuf *, int);
228a07f7c80Stsutsui int	_bus_dmamap_load_uio_direct(bus_dma_tag_t,
229a07f7c80Stsutsui 	    bus_dmamap_t, struct uio *, int);
230a07f7c80Stsutsui int	_bus_dmamap_load_raw_direct(bus_dma_tag_t,
231a07f7c80Stsutsui 	    bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int);
232a07f7c80Stsutsui void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
233a07f7c80Stsutsui void	_bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
234a07f7c80Stsutsui 	    bus_size_t, int);
235a07f7c80Stsutsui void	_bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
236a07f7c80Stsutsui 	    bus_size_t, int);
237a07f7c80Stsutsui int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
2389c745dbdSscw 	    bus_size_t alignment, bus_size_t boundary,
239a07f7c80Stsutsui 	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
240a07f7c80Stsutsui void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
241a07f7c80Stsutsui 	    int nsegs);
242a07f7c80Stsutsui int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
243a07f7c80Stsutsui 	    int nsegs, size_t size, void **kvap, int flags);
244a07f7c80Stsutsui void	_bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size);
245a07f7c80Stsutsui paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
246a07f7c80Stsutsui 	    int nsegs, off_t off, int prot, int flags);
2479c745dbdSscw #endif /* _MVME68K_BUS_DMA_PRIVATE */
2489c745dbdSscw 
2495bd17a12Sscw /* Needed by mvmebus.c */
250a07f7c80Stsutsui int	_bus_dmamem_alloc_common(bus_dma_tag_t,
2515bd17a12Sscw 	    bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t,
252a07f7c80Stsutsui 	    bus_dma_segment_t *, int, int *, int);
2535bd17a12Sscw 
2549c745dbdSscw #endif /* _MVME68K_BUS_DMA_H_ */
255