1 /* $NetBSD: pcc.c,v 1.35 2021/08/07 16:19:00 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe and Steve C. Woodford.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 /*
33 * Copyright (c) 1995 Charles D. Cranor
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 * 1. Redistributions of source code must retain the above copyright
40 * notice, this list of conditions and the following disclaimer.
41 * 2. Redistributions in binary form must reproduce the above copyright
42 * notice, this list of conditions and the following disclaimer in the
43 * documentation and/or other materials provided with the distribution.
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 */
56
57 /*
58 * peripheral channel controller
59 */
60
61 #include <sys/cdefs.h>
62 __KERNEL_RCSID(0, "$NetBSD: pcc.c,v 1.35 2021/08/07 16:19:00 thorpej Exp $");
63
64 #include <sys/param.h>
65 #include <sys/kernel.h>
66 #include <sys/systm.h>
67 #include <sys/device.h>
68 #include <sys/kcore.h>
69
70 #include <machine/cpu.h>
71 #include <machine/bus.h>
72
73 #include <mvme68k/dev/mainbus.h>
74 #include <mvme68k/dev/pccreg.h>
75 #include <mvme68k/dev/pccvar.h>
76
77 #include "ioconf.h"
78
79 /*
80 * Autoconfiguration stuff for the PCC chip on mvme147
81 */
82
83 void pccattach(device_t, device_t, void *);
84 int pccmatch(device_t, cfdata_t, void *);
85 int pccprint(void *, const char *);
86
87 CFATTACH_DECL_NEW(pcc, sizeof(struct pcc_softc),
88 pccmatch, pccattach, NULL, NULL);
89
90 static int pccintr(void *);
91 static int pccsoftintr(void *);
92 #ifdef notyet
93 static void pccsoftintrassert(void);
94 #endif
95
96 /*
97 * Structure used to describe a device for autoconfiguration purposes.
98 */
99 struct pcc_device {
100 const char *pcc_name; /* name of device (e.g. "clock") */
101 bus_addr_t pcc_offset; /* offset from PCC base */
102 };
103
104 /*
105 * Devices that live on the PCC, attached in this order.
106 */
107 static const struct pcc_device pcc_devices[] = {
108 {"clock", 0},
109 {"zsc", PCC_ZS0_OFF},
110 {"zsc", PCC_ZS1_OFF},
111 {"le", PCC_LE_OFF},
112 {"wdsc", PCC_WDSC_OFF},
113 {"lpt", PCC_LPT_OFF},
114 {"vmepcc", PCC_VME_OFF},
115 {NULL, 0},
116 };
117
118 static int pcc_vec2intctrl[] = {
119 PCCREG_ACFAIL_INTR_CTRL,/* PCCV_ACFAIL */
120 PCCREG_BUSERR_INTR_CTRL,/* PCCV_BERR */
121 PCCREG_ABORT_INTR_CTRL, /* PCCV_ABORT */
122 PCCREG_SERIAL_INTR_CTRL,/* PCCV_ZS */
123 PCCREG_LANCE_INTR_CTRL, /* PCCV_LE */
124 PCCREG_SCSI_INTR_CTRL, /* PCCV_SCSI */
125 PCCREG_DMA_INTR_CTRL, /* PCCV_DMA */
126 PCCREG_PRNT_INTR_CTRL, /* PCCV_PRINTER */
127 PCCREG_TMR1_INTR_CTRL, /* PCCV_TIMER1 */
128 PCCREG_TMR2_INTR_CTRL, /* PCCV_TIMER2 */
129 PCCREG_SOFT1_INTR_CTRL, /* PCCV_SOFT1 */
130 PCCREG_SOFT2_INTR_CTRL /* PCCV_SOFT2 */
131 };
132
133 extern phys_ram_seg_t mem_clusters[];
134 struct pcc_softc *sys_pcc;
135
136 /* The base address of the MVME147 from the VMEbus */
137 bus_addr_t pcc_slave_base_addr;
138
139
140 /* ARGSUSED */
141 int
pccmatch(device_t parent,cfdata_t cf,void * aux)142 pccmatch(device_t parent, cfdata_t cf, void *aux)
143 {
144 struct mainbus_attach_args *ma;
145
146 ma = aux;
147
148 /* Only attach one PCC. */
149 if (sys_pcc)
150 return 0;
151
152 return strcmp(ma->ma_name, pcc_cd.cd_name) == 0;
153 }
154
155 /* ARGSUSED */
156 void
pccattach(device_t parent,device_t self,void * aux)157 pccattach(device_t parent, device_t self, void *aux)
158 {
159 struct mainbus_attach_args *ma;
160 struct pcc_attach_args npa;
161 struct pcc_softc *sc;
162 uint8_t reg;
163 int i;
164
165 ma = aux;
166 sc = sys_pcc = device_private(self);
167
168 /* Get a handle to the PCC's registers. */
169 sc->sc_bust = ma->ma_bust;
170 bus_space_map(sc->sc_bust, ma->ma_offset, PCCREG_SIZE, 0, &sc->sc_bush);
171
172 /* Tell the chip the base interrupt vector */
173 pcc_reg_write(sc, PCCREG_VECTOR_BASE, PCC_VECBASE);
174
175 printf(": Peripheral Channel Controller, "
176 "rev %d, vecbase 0x%x\n", pcc_reg_read(sc, PCCREG_REVISION),
177 pcc_reg_read(sc, PCCREG_VECTOR_BASE));
178
179 evcnt_attach_dynamic(&sc->sc_evcnt, EVCNT_TYPE_INTR,
180 isrlink_evcnt(7), "nmi", "abort sw");
181
182 /* Hook up interrupt handler for abort button, and enable it */
183 pccintr_establish(PCCV_ABORT, pccintr, 7, NULL, &sc->sc_evcnt);
184 pcc_reg_write(sc, PCCREG_ABORT_INTR_CTRL,
185 PCC_ABORT_IEN | PCC_ABORT_ACK);
186
187 /*
188 * Install a handler for Software Interrupt 1
189 * and arrange to schedule soft interrupts on demand.
190 */
191 pccintr_establish(PCCV_SOFT1, pccsoftintr, 1, sc, &sc->sc_evcnt);
192 #ifdef notyet
193 _softintr_chipset_assert = pccsoftintrassert;
194 #endif
195
196 /* Make sure the global interrupt line is hot. */
197 reg = pcc_reg_read(sc, PCCREG_GENERAL_CONTROL) | PCC_GENCR_IEN;
198 pcc_reg_write(sc, PCCREG_GENERAL_CONTROL, reg);
199
200 /*
201 * Calculate the board's VMEbus slave base address, for the
202 * benefit of the VMEchip driver.
203 * (Weird that this register is in the PCC ...)
204 */
205 reg = pcc_reg_read(sc, PCCREG_SLAVE_BASE_ADDR) & PCC_SLAVE_BASE_MASK;
206 pcc_slave_base_addr = (bus_addr_t)reg * mem_clusters[0].size;
207
208 /*
209 * Attach configured children.
210 */
211 npa._pa_base = ma->ma_offset;
212 for (i = 0; pcc_devices[i].pcc_name != NULL; ++i) {
213 /*
214 * Note that IPL is filled in by match function.
215 */
216 npa.pa_name = pcc_devices[i].pcc_name;
217 npa.pa_ipl = -1;
218 npa.pa_dmat = ma->ma_dmat;
219 npa.pa_bust = ma->ma_bust;
220 npa.pa_offset = pcc_devices[i].pcc_offset + ma->ma_offset;
221
222 /* Attach the device if configured. */
223 (void)config_found(self, &npa, pccprint, CFARGS_NONE);
224 }
225 }
226
227 int
pccprint(void * aux,const char * cp)228 pccprint(void *aux, const char *cp)
229 {
230 struct pcc_attach_args *pa;
231
232 pa = aux;
233
234 if (cp)
235 aprint_normal("%s at %s", pa->pa_name, cp);
236
237 aprint_normal(" offset 0x%lx", pa->pa_offset - pa->_pa_base);
238 if (pa->pa_ipl != -1)
239 aprint_normal(" ipl %d", pa->pa_ipl);
240
241 return UNCONF;
242 }
243
244 /*
245 * pccintr_establish: establish pcc interrupt
246 */
247 void
pccintr_establish(int pccvec,int (* hand)(void *),int lvl,void * arg,struct evcnt * evcnt)248 pccintr_establish(int pccvec, int (*hand)(void *), int lvl, void *arg,
249 struct evcnt *evcnt)
250 {
251
252 #ifdef DEBUG
253 if (pccvec < 0 || pccvec >= PCC_NVEC) {
254 printf("pcc: illegal vector offset: 0x%x\n", pccvec);
255 panic("pccintr_establish");
256 }
257 if (lvl < 1 || lvl > 7) {
258 printf("pcc: illegal interrupt level: %d\n", lvl);
259 panic("pccintr_establish");
260 }
261 #endif
262
263 isrlink_vectored(hand, arg, lvl, pccvec + PCC_VECBASE, evcnt);
264 }
265
266 void
pccintr_disestablish(int pccvec)267 pccintr_disestablish(int pccvec)
268 {
269
270 #ifdef DEBUG
271 if (pccvec < 0 || pccvec >= PCC_NVEC) {
272 printf("pcc: illegal vector offset: 0x%x\n", pccvec);
273 panic("pccintr_disestablish");
274 }
275 #endif
276
277 /* Disable the interrupt */
278 pcc_reg_write(sys_pcc, pcc_vec2intctrl[pccvec], PCC_ICLEAR);
279 isrunlink_vectored(pccvec + PCC_VECBASE);
280 }
281
282 /*
283 * Handle NMI from abort switch.
284 */
285 static int
pccintr(void * frame)286 pccintr(void *frame)
287 {
288
289 /* XXX wait until button pops out */
290 pcc_reg_write(sys_pcc, PCCREG_ABORT_INTR_CTRL,
291 PCC_ABORT_IEN | PCC_ABORT_ACK);
292
293 return nmihand(frame);
294 }
295
296 #ifdef notyet
297 static void
pccsoftintrassert(void)298 pccsoftintrassert(void)
299 {
300
301 /* Request a software interrupt at ipl 1 */
302 pcc_reg_write(sys_pcc, PCCREG_SOFT1_INTR_CTRL, 1 | PCC_IENABLE);
303 }
304 #endif
305
306 /*
307 * Handle PCC soft interrupt #1
308 */
309 static int
pccsoftintr(void * arg)310 pccsoftintr(void *arg)
311 {
312 struct pcc_softc *sc = arg;
313
314 /* Clear the interrupt */
315 pcc_reg_write(sc, PCCREG_SOFT1_INTR_CTRL, 0);
316
317 #ifdef notyet
318 /* Call the soft interrupt dispatcher */
319 softintr_dispatch();
320 #endif
321
322 return 1;
323 }
324