1*f693c922Shikaru /* $NetBSD: octeon_pcmreg.h,v 1.1 2015/04/29 08:32:01 hikaru Exp $ */ 2*f693c922Shikaru 3*f693c922Shikaru /* 4*f693c922Shikaru * Copyright (c) 2007 Internet Initiative Japan, Inc. 5*f693c922Shikaru * All rights reserved. 6*f693c922Shikaru * 7*f693c922Shikaru * Redistribution and use in source and binary forms, with or without 8*f693c922Shikaru * modification, are permitted provided that the following conditions 9*f693c922Shikaru * are met: 10*f693c922Shikaru * 1. Redistributions of source code must retain the above copyright 11*f693c922Shikaru * notice, this list of conditions and the following disclaimer. 12*f693c922Shikaru * 2. Redistributions in binary form must reproduce the above copyright 13*f693c922Shikaru * notice, this list of conditions and the following disclaimer in the 14*f693c922Shikaru * documentation and/or other materials provided with the distribution. 15*f693c922Shikaru * 16*f693c922Shikaru * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17*f693c922Shikaru * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18*f693c922Shikaru * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19*f693c922Shikaru * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20*f693c922Shikaru * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21*f693c922Shikaru * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22*f693c922Shikaru * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23*f693c922Shikaru * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24*f693c922Shikaru * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25*f693c922Shikaru * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26*f693c922Shikaru * SUCH DAMAGE. 27*f693c922Shikaru */ 28*f693c922Shikaru 29*f693c922Shikaru /* 30*f693c922Shikaru * PCM/TDM Registers 31*f693c922Shikaru */ 32*f693c922Shikaru 33*f693c922Shikaru #ifndef _OCTEON_PCMREG_H_ 34*f693c922Shikaru #define _OCTEON_PCMREG_H_ 35*f693c922Shikaru 36*f693c922Shikaru /* ---- register addresses */ 37*f693c922Shikaru 38*f693c922Shikaru #define PCM_CLK0_CFG 0x0001070000010000ULL 39*f693c922Shikaru #define PCM_CLK0_GEN 0x0001070000010008ULL 40*f693c922Shikaru #define PCM0_TDM_CFG 0x0001070000010010ULL 41*f693c922Shikaru #define PCM0_DMA_CFG 0x0001070000010018ULL 42*f693c922Shikaru #define PCM0_INT_ENA 0x0001070000010020ULL 43*f693c922Shikaru #define PCM0_INT_SUM 0x0001070000010028ULL 44*f693c922Shikaru #define PCM0_TDM_DBG 0x0001070000010030ULL 45*f693c922Shikaru #define PCM_CLK0_DBG 0x0001070000010038ULL 46*f693c922Shikaru #define PCM0_TXSTART 0x0001070000010040ULL 47*f693c922Shikaru #define PCM0_TXCNT 0x0001070000010048ULL 48*f693c922Shikaru #define PCM0_TXADDR 0x0001070000010050ULL 49*f693c922Shikaru #define PCM0_RXSTART 0x0001070000010058ULL 50*f693c922Shikaru #define PCM0_RXCNT 0x0001070000010060ULL 51*f693c922Shikaru #define PCM0_RXADDR 0x0001070000010068ULL 52*f693c922Shikaru #define PCM0_TXMSK0 0x0001070000010080ULL 53*f693c922Shikaru #define PCM0_TXMSK1 0x0001070000010088ULL 54*f693c922Shikaru #define PCM0_TXMSK2 0x0001070000010090ULL 55*f693c922Shikaru #define PCM0_TXMSK3 0x0001070000010098ULL 56*f693c922Shikaru #define PCM0_TXMSK4 0x00010700000100a0ULL 57*f693c922Shikaru #define PCM0_TXMSK5 0x00010700000100a8ULL 58*f693c922Shikaru #define PCM0_TXMSK6 0x00010700000100b0ULL 59*f693c922Shikaru #define PCM0_TXMSK7 0x00010700000100b8ULL 60*f693c922Shikaru #define PCM0_RXMSK0 0x00010700000100c0ULL 61*f693c922Shikaru #define PCM0_RXMSK1 0x00010700000100c8ULL 62*f693c922Shikaru #define PCM0_RXMSK2 0x00010700000100d0ULL 63*f693c922Shikaru #define PCM0_RXMSK3 0x00010700000100d8ULL 64*f693c922Shikaru #define PCM0_RXMSK4 0x00010700000100e0ULL 65*f693c922Shikaru #define PCM0_RXMSK5 0x00010700000100e8ULL 66*f693c922Shikaru #define PCM0_RXMSK6 0x00010700000100f0ULL 67*f693c922Shikaru #define PCM0_RXMSK7 0x00010700000100f8ULL 68*f693c922Shikaru 69*f693c922Shikaru /* ---- register bits */ 70*f693c922Shikaru 71*f693c922Shikaru /* XXX */ 72*f693c922Shikaru 73*f693c922Shikaru /* ---- bus_space */ 74*f693c922Shikaru 75*f693c922Shikaru #define PCM_BASE_0 0x0001070000010000ULL 76*f693c922Shikaru #define PCM_BASE_1 0x0001070000014000ULL 77*f693c922Shikaru #define PCM_BASE_2 0x0001070000018000ULL 78*f693c922Shikaru #define PCM_BASE_3 0x000107000001c000ULL 79*f693c922Shikaru #define PCM_SIZE 0x0100 80*f693c922Shikaru 81*f693c922Shikaru #define PCM_CLKN_CFG_OFFSET 0x0000 82*f693c922Shikaru #define PCM_CLKN_GEN_OFFSET 0x0008 83*f693c922Shikaru #define PCMN_TDM_CFG_OFFSET 0x0010 84*f693c922Shikaru #define PCMN_DMA_CFG_OFFSET 0x0018 85*f693c922Shikaru #define PCMN_INT_ENA_OFFSET 0x0020 86*f693c922Shikaru #define PCMN_INT_SUM_OFFSET 0x0028 87*f693c922Shikaru #define PCMN_TDM_DBG_OFFSET 0x0030 88*f693c922Shikaru #define PCM_CLKN_DBG_OFFSET 0x0038 89*f693c922Shikaru #define PCMN_TXSTART_OFFSET 0x0040 90*f693c922Shikaru #define PCMN_TXCNT_OFFSET 0x0048 91*f693c922Shikaru #define PCMN_TXADDR_OFFSET 0x0050 92*f693c922Shikaru #define PCMN_RXSTART_OFFSET 0x0058 93*f693c922Shikaru #define PCMN_RXCNT_OFFSET 0x0060 94*f693c922Shikaru #define PCMN_RXADDR_OFFSET 0x0068 95*f693c922Shikaru #define PCMN_TXMSK0_OFFSET 0x0080 96*f693c922Shikaru #define PCMN_TXMSK1_OFFSET 0x0088 97*f693c922Shikaru #define PCMN_TXMSK2_OFFSET 0x0090 98*f693c922Shikaru #define PCMN_TXMSK3_OFFSET 0x0098 99*f693c922Shikaru #define PCMN_TXMSK4_OFFSET 0x00a0 100*f693c922Shikaru #define PCMN_TXMSK5_OFFSET 0x00a8 101*f693c922Shikaru #define PCMN_TXMSK6_OFFSET 0x00b0 102*f693c922Shikaru #define PCMN_TXMSK7_OFFSET 0x00b8 103*f693c922Shikaru #define PCMN_RXMSK0_OFFSET 0x00c0 104*f693c922Shikaru #define PCMN_RXMSK1_OFFSET 0x00c8 105*f693c922Shikaru #define PCMN_RXMSK2_OFFSET 0x00d0 106*f693c922Shikaru #define PCMN_RXMSK3_OFFSET 0x00d8 107*f693c922Shikaru #define PCMN_RXMSK4_OFFSET 0x00e0 108*f693c922Shikaru #define PCMN_RXMSK5_OFFSET 0x00e8 109*f693c922Shikaru #define PCMN_RXMSK6_OFFSET 0x00f0 110*f693c922Shikaru #define PCMN_RXMSK7_OFFSET 0x00f8 111*f693c922Shikaru 112*f693c922Shikaru #endif /* _OCTEON_PCMREG_H_ */ 113