xref: /netbsd-src/sys/arch/mips/cavium/dev/octeon_fpareg.h (revision eb61b5028b4cd9abcb3bea02a6da842e3134e278)
1*eb61b502Ssimonb /*	$NetBSD: octeon_fpareg.h,v 1.5 2020/06/23 05:14:18 simonb Exp $	*/
2f693c922Shikaru 
3f693c922Shikaru /*
4f693c922Shikaru  * Copyright (c) 2007 Internet Initiative Japan, Inc.
5f693c922Shikaru  * All rights reserved.
6f693c922Shikaru  *
7f693c922Shikaru  * Redistribution and use in source and binary forms, with or without
8f693c922Shikaru  * modification, are permitted provided that the following conditions
9f693c922Shikaru  * are met:
10f693c922Shikaru  * 1. Redistributions of source code must retain the above copyright
11f693c922Shikaru  *    notice, this list of conditions and the following disclaimer.
12f693c922Shikaru  * 2. Redistributions in binary form must reproduce the above copyright
13f693c922Shikaru  *    notice, this list of conditions and the following disclaimer in the
14f693c922Shikaru  *    documentation and/or other materials provided with the distribution.
15f693c922Shikaru  *
16f693c922Shikaru  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
17f693c922Shikaru  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18f693c922Shikaru  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19f693c922Shikaru  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
20f693c922Shikaru  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21f693c922Shikaru  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22f693c922Shikaru  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23f693c922Shikaru  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24f693c922Shikaru  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25f693c922Shikaru  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26f693c922Shikaru  * SUCH DAMAGE.
27f693c922Shikaru  */
28f693c922Shikaru 
29f693c922Shikaru /*
30f693c922Shikaru  * FPA Registers
31f693c922Shikaru  */
32f693c922Shikaru 
33f693c922Shikaru #ifndef _OCTEON_FPAREG_H_
34f693c922Shikaru #define _OCTEON_FPAREG_H_
35f693c922Shikaru 
36f693c922Shikaru /* ---- register offsets */
37f693c922Shikaru 
38f693c922Shikaru #define	FPA_INT_SUM				0x0001180028000040ULL
39f693c922Shikaru #define	FPA_INT_ENB				0x0001180028000048ULL
40f693c922Shikaru #define	FPA_CTL_STATUS				0x0001180028000050ULL
41f693c922Shikaru #define	FPA_QUE0_AVAILABLE			0x0001180028000098ULL
42f693c922Shikaru #define	FPA_QUE1_AVAILABLE			0x00011800280000a0ULL
43f693c922Shikaru #define	FPA_QUE2_AVAILABLE			0x00011800280000a8ULL
44f693c922Shikaru #define	FPA_QUE3_AVAILABLE			0x00011800280000b0ULL
45f693c922Shikaru #define	FPA_QUE4_AVAILABLE			0x00011800280000b8ULL
46f693c922Shikaru #define	FPA_QUE5_AVAILABLE			0x00011800280000c0ULL
47f693c922Shikaru #define	FPA_QUE6_AVAILABLE			0x00011800280000c8ULL
48f693c922Shikaru #define	FPA_QUE7_AVAILABLE			0x00011800280000d0ULL
49f693c922Shikaru #define	FPA_WART_CTL				0x00011800280000d8ULL
50f693c922Shikaru #define	FPA_WART_STATUS				0x00011800280000e0ULL
51f693c922Shikaru #define	FPA_BIST_STATUS				0x00011800280000e8ULL
52f693c922Shikaru #define	FPA_QUE0_PAGE_INDEX			0x00011800280000f0ULL
53f693c922Shikaru #define	FPA_QUE1_PAGE_INDEX			0x00011800280000f8ULL
54f693c922Shikaru #define	FPA_QUE2_PAGE_INDEX			0x0001180028000100ULL
55f693c922Shikaru #define	FPA_QUE3_PAGE_INDEX			0x0001180028000108ULL
56f693c922Shikaru #define	FPA_QUE4_PAGE_INDEX			0x0001180028000110ULL
57f693c922Shikaru #define	FPA_QUE5_PAGE_INDEX			0x0001180028000118ULL
58f693c922Shikaru #define	FPA_QUE6_PAGE_INDEX			0x0001180028000120ULL
59f693c922Shikaru #define	FPA_QUE7_PAGE_INDEX			0x0001180028000128ULL
60f693c922Shikaru #define	FPA_QUE_EXP				0x0001180028000130ULL
61f693c922Shikaru #define	FPA_QUE_ACT				0x0001180028000138ULL
62f693c922Shikaru 
63f693c922Shikaru /* ---- register bit definitions */
64f693c922Shikaru 
65f693c922Shikaru #define	FPA_INT_SUM_XXX_63_28			UINT64_C(0xfffffffff0000000)
66f693c922Shikaru #define	FPA_INT_SUM_Q7_PERR			UINT64_C(0x0000000008000000)
67f693c922Shikaru #define	FPA_INT_SUM_Q7_COFF			UINT64_C(0x0000000004000000)
68f693c922Shikaru #define	FPA_INT_SUM_Q7_UND			UINT64_C(0x0000000002000000)
69f693c922Shikaru #define	FPA_INT_SUM_Q6_PERR			UINT64_C(0x0000000001000000)
70f693c922Shikaru #define	FPA_INT_SUM_Q6_COFF			UINT64_C(0x0000000000800000)
71f693c922Shikaru #define	FPA_INT_SUM_Q6_UND			UINT64_C(0x0000000000400000)
72f693c922Shikaru #define	FPA_INT_SUM_Q5_PERR			UINT64_C(0x0000000000200000)
73f693c922Shikaru #define	FPA_INT_SUM_Q5_COFF			UINT64_C(0x0000000000100000)
74f693c922Shikaru #define	FPA_INT_SUM_Q5_UND			UINT64_C(0x0000000000080000)
75f693c922Shikaru #define	FPA_INT_SUM_Q4_PERR			UINT64_C(0x0000000000040000)
76f693c922Shikaru #define	FPA_INT_SUM_Q4_COFF			UINT64_C(0x0000000000020000)
77f693c922Shikaru #define	FPA_INT_SUM_Q4_UND			UINT64_C(0x0000000000010000)
78f693c922Shikaru #define	FPA_INT_SUM_Q3_PERR			UINT64_C(0x0000000000008000)
79f693c922Shikaru #define	FPA_INT_SUM_Q3_COFF			UINT64_C(0x0000000000004000)
80f693c922Shikaru #define	FPA_INT_SUM_Q3_UND			UINT64_C(0x0000000000002000)
81f693c922Shikaru #define	FPA_INT_SUM_Q2_PERR			UINT64_C(0x0000000000001000)
82f693c922Shikaru #define	FPA_INT_SUM_Q2_COFF			UINT64_C(0x0000000000000800)
83f693c922Shikaru #define	FPA_INT_SUM_Q2_UND			UINT64_C(0x0000000000000400)
84f693c922Shikaru #define	FPA_INT_SUM_Q1_PERR			UINT64_C(0x0000000000000200)
85f693c922Shikaru #define	FPA_INT_SUM_Q1_COFF			UINT64_C(0x0000000000000100)
86f693c922Shikaru #define	FPA_INT_SUM_Q1_UND			UINT64_C(0x0000000000000080)
87f693c922Shikaru #define	FPA_INT_SUM_Q0_PERR			UINT64_C(0x0000000000000040)
88f693c922Shikaru #define	FPA_INT_SUM_Q0_COFF			UINT64_C(0x0000000000000020)
89f693c922Shikaru #define	FPA_INT_SUM_Q0_UND			UINT64_C(0x0000000000000010)
90f693c922Shikaru #define	FPA_INT_SUM_FED1_DBE			UINT64_C(0x0000000000000008)
91f693c922Shikaru #define	FPA_INT_SUM_FED1_SBE			UINT64_C(0x0000000000000004)
92f693c922Shikaru #define	FPA_INT_SUM_FED0_DBE			UINT64_C(0x0000000000000002)
93f693c922Shikaru #define	FPA_INT_SUM_FED0_SBE			UINT64_C(0x0000000000000001)
94f693c922Shikaru 
95f693c922Shikaru #define	FPA_INT_ENB_XXX_63_28			UINT64_C(0xfffffffff0000000)
96f693c922Shikaru #define	FPA_INT_ENB_Q7_PERR			UINT64_C(0x0000000008000000)
97f693c922Shikaru #define	FPA_INT_ENB_Q7_COFF			UINT64_C(0x0000000004000000)
98f693c922Shikaru #define	FPA_INT_ENB_Q7_UND			UINT64_C(0x0000000002000000)
99f693c922Shikaru #define	FPA_INT_ENB_Q6_PERR			UINT64_C(0x0000000001000000)
100f693c922Shikaru #define	FPA_INT_ENB_Q6_COFF			UINT64_C(0x0000000000800000)
101f693c922Shikaru #define	FPA_INT_ENB_Q6_UND			UINT64_C(0x0000000000400000)
102f693c922Shikaru #define	FPA_INT_ENB_Q5_PERR			UINT64_C(0x0000000000200000)
103f693c922Shikaru #define	FPA_INT_ENB_Q5_COFF			UINT64_C(0x0000000000100000)
104f693c922Shikaru #define	FPA_INT_ENB_Q5_UND			UINT64_C(0x0000000000080000)
105f693c922Shikaru #define	FPA_INT_ENB_Q4_PERR			UINT64_C(0x0000000000040000)
106f693c922Shikaru #define	FPA_INT_ENB_Q4_COFF			UINT64_C(0x0000000000020000)
107f693c922Shikaru #define	FPA_INT_ENB_Q4_UND			UINT64_C(0x0000000000010000)
108f693c922Shikaru #define	FPA_INT_ENB_Q3_PERR			UINT64_C(0x0000000000008000)
109f693c922Shikaru #define	FPA_INT_ENB_Q3_COFF			UINT64_C(0x0000000000004000)
110f693c922Shikaru #define	FPA_INT_ENB_Q3_UND			UINT64_C(0x0000000000002000)
111f693c922Shikaru #define	FPA_INT_ENB_Q2_PERR			UINT64_C(0x0000000000001000)
112f693c922Shikaru #define	FPA_INT_ENB_Q2_COFF			UINT64_C(0x0000000000000800)
113f693c922Shikaru #define	FPA_INT_ENB_Q2_UND			UINT64_C(0x0000000000000400)
114f693c922Shikaru #define	FPA_INT_ENB_Q1_PERR			UINT64_C(0x0000000000000200)
115f693c922Shikaru #define	FPA_INT_ENB_Q1_COFF			UINT64_C(0x0000000000000100)
116f693c922Shikaru #define	FPA_INT_ENB_Q1_UND			UINT64_C(0x0000000000000080)
117f693c922Shikaru #define	FPA_INT_ENB_Q0_PERR			UINT64_C(0x0000000000000040)
118f693c922Shikaru #define	FPA_INT_ENB_Q0_COFF			UINT64_C(0x0000000000000020)
119f693c922Shikaru #define	FPA_INT_ENB_Q0_UND			UINT64_C(0x0000000000000010)
120f693c922Shikaru #define	FPA_INT_ENB_FED1_DBE			UINT64_C(0x0000000000000008)
121f693c922Shikaru #define	FPA_INT_ENB_FED1_SBE			UINT64_C(0x0000000000000004)
122f693c922Shikaru #define	FPA_INT_ENB_FED0_DBE			UINT64_C(0x0000000000000002)
123f693c922Shikaru #define	FPA_INT_ENB_FED0_SBE			UINT64_C(0x0000000000000001)
124f693c922Shikaru 
125f693c922Shikaru #define	FPA_CTL_STATUS_XXX_63_18		UINT64_C(0xfffffffffffc0000)
126f693c922Shikaru #define	FPA_CTL_STATUS_RESET			UINT64_C(0x0000000000020000)
127f693c922Shikaru #define	FPA_CTL_STATUS_USE_LDT			UINT64_C(0x0000000000010000)
128f693c922Shikaru #define	FPA_CTL_STATUS_USE_STT			UINT64_C(0x0000000000008000)
129f693c922Shikaru #define	FPA_CTL_STATUS_ENB			UINT64_C(0x0000000000004000)
130f693c922Shikaru #define	FPA_CTL_STATUS_MEM1_ERR			UINT64_C(0x0000000000003f80)
131f693c922Shikaru #define	FPA_CTL_STATUS_MEM0_ERR			UINT64_C(0x000000000000007f)
132f693c922Shikaru 
133f693c922Shikaru #define	FPA_QUEX_AVAILABLE_XXX_63_29		UINT64_C(0xffffffffe0000000)
134f693c922Shikaru #define	FPA_QUEX_AVAILABLE_QUE_SIZ		UINT64_C(0x000000001fffffff)
135f693c922Shikaru 
136f693c922Shikaru #define	FPA_WART_CTL_XXX_63_16			UINT64_C(0xffffffffffff0000)
137f693c922Shikaru #define	FPA_WART_CTL_CTL			UINT64_C(0x000000000000ffff)
138f693c922Shikaru 
139f693c922Shikaru #define	FPA_WART_STATUS_XXX_63_32		UINT64_C(0xffffffff00000000)
140f693c922Shikaru #define	FPA_WART_STATUS_STATUS			UINT64_C(0x00000000ffffffff)
141f693c922Shikaru 
142f693c922Shikaru #define	FPA_BIST_STATUS_XXX_63_5		UINT64_C(0xffffffffffffffe0)
143f693c922Shikaru #define	FPA_BIST_STATUS_FRD			UINT64_C(0x0000000000000010)
144f693c922Shikaru #define	FPA_BIST_STATUS_FPF0			UINT64_C(0x0000000000000008)
145f693c922Shikaru #define	FPA_BIST_STATUS_FPF1			UINT64_C(0x0000000000000004)
146f693c922Shikaru #define	FPA_BIST_STATUS_FFR			UINT64_C(0x0000000000000002)
147f693c922Shikaru #define	FPA_BIST_STATUS_FDR			UINT64_C(0x0000000000000001)
148f693c922Shikaru 
149f693c922Shikaru #define	FPA_QUEX_PAGE_INDEX_XXX_63_25		UINT64_C(0xfffffffffe000000)
150f693c922Shikaru #define	FPA_QUEX_PAGE_INDEX_PG_NUM		UINT64_C(0x0000000001ffffff)
151f693c922Shikaru 
152f693c922Shikaru #define	FPA_QUE_EXP_XXX_63_32			UINT64_C(0xffffffff00000000)
153f693c922Shikaru #define	FPA_QUE_EXP_XXX_31_29			UINT64_C(0x00000000e0000000)
154f693c922Shikaru #define	FPA_QUE_EXP_EXP_QUE			UINT64_C(0x000000001c000000)
155f693c922Shikaru #define	FPA_QUE_EXP_EXP_INDX			UINT64_C(0x0000000003ffffff)
156f693c922Shikaru 
157f693c922Shikaru #define	FPA_QUE_ACT_XXX_63_32			UINT64_C(0xffffffff00000000)
158f693c922Shikaru #define	FPA_QUE_ACT_XXX_31_29			UINT64_C(0x00000000e0000000)
159f693c922Shikaru #define	FPA_QUE_ACT_ACT_QUE			UINT64_C(0x000000001c000000)
160f693c922Shikaru #define	FPA_QUE_ACT_ACT_INDX			UINT64_C(0x0000000003ffffff)
161f693c922Shikaru 
162f693c922Shikaru /* ---- operations */
163f693c922Shikaru 
164f693c922Shikaru /*
165f693c922Shikaru  * Free Pool Unit Operations
166f693c922Shikaru  */
167f693c922Shikaru 
168b9fcd28bSsimonb #define	FPA_MAJOR_DID				0x5
169f693c922Shikaru 
170f693c922Shikaru /* Store Operations */
171b9fcd28bSsimonb #define	FPA_OPS_STORE_ADDR			UINT64_C(0x000000ffffffffff)
172f693c922Shikaru 
173f693c922Shikaru #define	FPA_OPS_STORE_DATA_DWBCOUNT		UINT64_C(0x00000000000001ff)
174f693c922Shikaru 
175f693c922Shikaru /* ---- bus_space(9) */
176f693c922Shikaru 
177f693c922Shikaru #define	FPA_BASE				0x0001180028000000ULL
178f693c922Shikaru #define	FPA_SIZE				0x0200
179f693c922Shikaru 
180*eb61b502Ssimonb #define	FPA_NPOOLS				8
181*eb61b502Ssimonb 
182f693c922Shikaru #define	FPA_INT_SUM_OFFSET			0x0040
183f693c922Shikaru #define	FPA_INT_ENB_OFFSET			0x0048
184f693c922Shikaru #define	FPA_CTL_STATUS_OFFSET			0x0050
185f693c922Shikaru #define	FPA_QUE0_AVAILABLE_OFFSET		0x0098
186f693c922Shikaru #define	FPA_QUE1_AVAILABLE_OFFSET		0x00a0
187f693c922Shikaru #define	FPA_QUE2_AVAILABLE_OFFSET		0x00a8
188f693c922Shikaru #define	FPA_QUE3_AVAILABLE_OFFSET		0x00b0
189f693c922Shikaru #define	FPA_QUE4_AVAILABLE_OFFSET		0x00b8
190f693c922Shikaru #define	FPA_QUE5_AVAILABLE_OFFSET		0x00c0
191f693c922Shikaru #define	FPA_QUE6_AVAILABLE_OFFSET		0x00c8
192f693c922Shikaru #define	FPA_QUE7_AVAILABLE_OFFSET		0x00d0
193f693c922Shikaru #define	FPA_WART_CTL_OFFSET			0x00d8
194f693c922Shikaru #define	FPA_WART_STATUS_OFFSET			0x00e0
195f693c922Shikaru #define	FPA_BIST_STATUS_OFFSET			0x00e8
196f693c922Shikaru #define	FPA_QUE0_PAGE_INDEX_OFFSET		0x00f0
197f693c922Shikaru #define	FPA_QUE1_PAGE_INDEX_OFFSET		0x00f8
198f693c922Shikaru #define	FPA_QUE2_PAGE_INDEX_OFFSET		0x0100
199f693c922Shikaru #define	FPA_QUE3_PAGE_INDEX_OFFSET		0x0108
200f693c922Shikaru #define	FPA_QUE4_PAGE_INDEX_OFFSET		0x0110
201f693c922Shikaru #define	FPA_QUE5_PAGE_INDEX_OFFSET		0x0118
202f693c922Shikaru #define	FPA_QUE6_PAGE_INDEX_OFFSET		0x0120
203f693c922Shikaru #define	FPA_QUE7_PAGE_INDEX_OFFSET		0x0128
204f693c922Shikaru #define	FPA_QUE_EXP_OFFSET			0x0130
205f693c922Shikaru #define	FPA_QUE_ACT_OFFSET			0x0138
206f693c922Shikaru 
207f693c922Shikaru #endif /* _OCTEON_FPAREG_H_ */
208