1*31586d2cSmatt /* $NetBSD: ar_console.c,v 1.2 2011/07/10 06:26:02 matt Exp $ */
281d18a2fSmatt
381d18a2fSmatt /*-
481d18a2fSmatt * Copyright (c) 2011 The NetBSD Foundation, Inc.
581d18a2fSmatt * All rights reserved.
681d18a2fSmatt *
781d18a2fSmatt * This code is derived from software contributed to The NetBSD Foundation
881d18a2fSmatt * by Matt Thomas of 3am Software Foundry.
981d18a2fSmatt *
1081d18a2fSmatt * Redistribution and use in source and binary forms, with or without
1181d18a2fSmatt * modification, are permitted provided that the following conditions
1281d18a2fSmatt * are met:
1381d18a2fSmatt * 1. Redistributions of source code must retain the above copyright
1481d18a2fSmatt * notice, this list of conditions and the following disclaimer.
1581d18a2fSmatt * 2. Redistributions in binary form must reproduce the above copyright
1681d18a2fSmatt * notice, this list of conditions and the following disclaimer in the
1781d18a2fSmatt * documentation and/or other materials provided with the distribution.
1881d18a2fSmatt *
1981d18a2fSmatt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
2081d18a2fSmatt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
2181d18a2fSmatt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
2281d18a2fSmatt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
2381d18a2fSmatt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2481d18a2fSmatt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2581d18a2fSmatt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2681d18a2fSmatt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2781d18a2fSmatt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2881d18a2fSmatt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
2981d18a2fSmatt * POSSIBILITY OF SUCH DAMAGE.
3081d18a2fSmatt */
3181d18a2fSmatt
3281d18a2fSmatt /*
3381d18a2fSmatt * This file implement an Atheros dependent early console.
3481d18a2fSmatt */
3581d18a2fSmatt #include <sys/cdefs.h>
36*31586d2cSmatt __KERNEL_RCSID(0, "$NetBSD: ar_console.c,v 1.2 2011/07/10 06:26:02 matt Exp $");
3781d18a2fSmatt
3881d18a2fSmatt #include <sys/param.h>
3981d18a2fSmatt #include <sys/systm.h>
4081d18a2fSmatt #include <sys/kernel.h>
4181d18a2fSmatt #include <sys/termios.h>
4281d18a2fSmatt
4381d18a2fSmatt #include <dev/cons.h>
4481d18a2fSmatt
4581d18a2fSmatt #include <mips/cache.h>
4681d18a2fSmatt #include <mips/locore.h>
4781d18a2fSmatt #include <mips/cpuregs.h>
4881d18a2fSmatt
4981d18a2fSmatt #include <mips/atheros/include/platform.h>
5081d18a2fSmatt #include <mips/atheros/include/arbusvar.h>
5181d18a2fSmatt
52*31586d2cSmatt #include <mips/locore.h>
5381d18a2fSmatt #include "com.h"
5481d18a2fSmatt
5581d18a2fSmatt #include <dev/ic/ns16450reg.h>
5681d18a2fSmatt #include <dev/ic/comreg.h>
5781d18a2fSmatt #include <dev/ic/comvar.h>
5881d18a2fSmatt
5981d18a2fSmatt void
atheros_consinit(void)6081d18a2fSmatt atheros_consinit(void)
6181d18a2fSmatt {
6281d18a2fSmatt /*
6381d18a2fSmatt * Everything related to console initialization is done
6481d18a2fSmatt * in mach_init().
6581d18a2fSmatt */
6681d18a2fSmatt #if NCOM > 0
6781d18a2fSmatt /* Setup polled serial for early console I/O */
6881d18a2fSmatt /* XXX: pass in CONSPEED? */
69*31586d2cSmatt com_arbus_cnattach(platformsw->apsw_uart0_base,
70*31586d2cSmatt atheros_get_uart_freq());
7181d18a2fSmatt #else
7281d18a2fSmatt panic("Not configured to use serial console!\n");
7381d18a2fSmatt /* not going to see that message now, are we? */
7481d18a2fSmatt #endif
7581d18a2fSmatt }
7681d18a2fSmatt
7781d18a2fSmatt /*
7881d18a2fSmatt * Early console support.
7981d18a2fSmatt */
8081d18a2fSmatt static void
earlycons_putc(dev_t dev,int c)8181d18a2fSmatt earlycons_putc(dev_t dev, int c)
8281d18a2fSmatt {
8381d18a2fSmatt volatile uint32_t * const uart =
8481d18a2fSmatt (volatile uint32_t *)MIPS_PHYS_TO_KSEG1(platformsw->apsw_uart0_base);
8581d18a2fSmatt
8681d18a2fSmatt while (!(uart[com_lsr] & htobe32(LSR_TXRDY)))
8781d18a2fSmatt continue;
8881d18a2fSmatt
8981d18a2fSmatt uart[com_data] = htobe32(c);
9081d18a2fSmatt }
9181d18a2fSmatt
9281d18a2fSmatt static int
earlycons_getc(dev_t dev)9381d18a2fSmatt earlycons_getc(dev_t dev)
9481d18a2fSmatt {
9581d18a2fSmatt volatile uint32_t * const uart =
9681d18a2fSmatt (volatile uint32_t *)MIPS_PHYS_TO_KSEG1(platformsw->apsw_uart0_base);
9781d18a2fSmatt
9881d18a2fSmatt while (!(uart[com_lsr] & htobe32(LSR_RXRDY)))
9981d18a2fSmatt continue;
10081d18a2fSmatt
10181d18a2fSmatt return (uint8_t) be32toh(uart[com_data]);
10281d18a2fSmatt }
10381d18a2fSmatt
10481d18a2fSmatt static void
earlycons_flush(dev_t dev)10581d18a2fSmatt earlycons_flush(dev_t dev)
10681d18a2fSmatt {
10781d18a2fSmatt volatile uint32_t * const uart =
10881d18a2fSmatt (volatile uint32_t *)MIPS_PHYS_TO_KSEG1(platformsw->apsw_uart0_base);
10981d18a2fSmatt
11081d18a2fSmatt while (!(uart[com_lsr] & htobe32(LSR_TSRE)))
11181d18a2fSmatt continue;
11281d18a2fSmatt }
11381d18a2fSmatt
11481d18a2fSmatt
11581d18a2fSmatt void
atheros_early_consinit(void)11681d18a2fSmatt atheros_early_consinit(void)
11781d18a2fSmatt {
11881d18a2fSmatt static struct consdev earlycons_cn = {
11981d18a2fSmatt .cn_probe = NULL,
12081d18a2fSmatt .cn_init = NULL,
12181d18a2fSmatt .cn_getc = earlycons_getc,
12281d18a2fSmatt .cn_putc = earlycons_putc,
12381d18a2fSmatt .cn_pollc = nullcnpollc,
12481d18a2fSmatt .cn_bell = NULL,
12581d18a2fSmatt .cn_halt = NULL,
12681d18a2fSmatt .cn_flush = earlycons_flush,
12781d18a2fSmatt .cn_dev = makedev(0, 0),
12881d18a2fSmatt .cn_pri = CN_DEAD,
12981d18a2fSmatt };
13081d18a2fSmatt
13181d18a2fSmatt cn_tab = &earlycons_cn;
13281d18a2fSmatt }
133